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218896 Commits

Author SHA1 Message Date
Timm Bäder
b97b48f662 [llvm][tools] Hide unrelated llvm-cfi-verify options
Differential Revision: https://reviews.llvm.org/D106055
2021-07-16 10:43:52 +02:00
Simon Giesecke
d4960d7c98 Reformat files.
Differential Revision: https://reviews.llvm.org/D105982
2021-07-16 07:39:21 +00:00
Mehdi Amini
7d809bb14e Use ManagedStatic and lazy initialization of cl::opt in libSupport to make it free of global initializer
We can build it with -Werror=global-constructors now. This helps
in situation where libSupport is embedded as a shared library,
potential with dlopen/dlclose scenario, and when command-line
parsing or other facilities may not be involved. Avoiding the
implicit construction of these cl::opt can avoid double-registration
issues and other kind of behavior.

Reviewed By: lattner, jpienaar

Differential Revision: https://reviews.llvm.org/D105959
2021-07-16 07:38:16 +00:00
Mehdi Amini
b708f244c7 Revert "Use ManagedStatic and lazy initialization of cl::opt in libSupport to make it free of global initializer"
This reverts commit af9321739b20becf170e6bb5060b8d780e1dc8dd.
Still some specific config broken in some way that requires more
investigation.
2021-07-16 07:35:13 +00:00
Timm Bäder
5adb9eb982 Revert "[llvm][tools] Hide unrelated llvm-cfi-verify options"
This reverts commit 7c63726072005cc331bb21694c9022e6d18a3b93.
2021-07-16 09:30:57 +02:00
Timm Bäder
da6027db65 [llvm][tools] Hide unrelated llvm-cfi-verify options
Differential Revision: https://reviews.llvm.org/D106055
2021-07-16 09:25:54 +02:00
Marcos Horro
44d94bc849 [llvm-mca][JSON] Store extra information about driver flags used for the simulation
Added information stored in PipelineOptions and the MCSubtargetInfo.

Bug: https://bugs.llvm.org/show_bug.cgi?id=51041

Reviewed By: andreadb

Differential Revision: https://reviews.llvm.org/D106077
2021-07-16 09:18:40 +02:00
Mehdi Amini
64ec18abb6 Use ManagedStatic and lazy initialization of cl::opt in libSupport to make it free of global initializer
We can build it with -Werror=global-constructors now. This helps
in situation where libSupport is embedded as a shared library,
potential with dlopen/dlclose scenario, and when command-line
parsing or other facilities may not be involved. Avoiding the
implicit construction of these cl::opt can avoid double-registration
issues and other kind of behavior.

Reviewed By: lattner, jpienaar

Differential Revision: https://reviews.llvm.org/D105959
2021-07-16 06:54:26 +00:00
Serge Pavlov
8c4ac92d65 Fix typo in test 2021-07-16 12:43:57 +07:00
Max Kazantsev
e4a04110a4 [LSR] Handle case 1*reg => reg. PR50918
This patch addresses assertion failure in case when the only found formula for LSR
is `1*reg => reg` which was supposed to be an impossible situation, however there
is a test that shows it is possible.

In this case, we can use scale register with scale of 1 as the missing base register.

Reviewed By: huihuiz, reames
Differential Revision: https://reviews.llvm.org/D105009
2021-07-16 11:33:59 +07:00
Carl Ritson
539761ef24 [TableGen] Allow isAllocatable inheritence from any superclass
When setting Allocatable on a generated register class check all
superclasses and set Allocatable true if any superclass is
allocatable.

Without this change generated register classes based on an
allocatable class may end up unallocatable due to the topological
inheritance order.

This change primarily effects AMDGPU backend; however, there are
a few changes in MIPs GlobalISel register constraints as a result.

Reviewed By: kparzysz

Differential Revision: https://reviews.llvm.org/D105967
2021-07-16 13:02:24 +09:00
Shilei Tian
08c004d674 [Attributor] Add support for compound assignment for ChangeStatus
A common use of `ChangeStatus` is as follows:
```
ChangeStatus Changed = ChangeStatus::UNCHANGED;
Changed |= foo();
```
where `foo` returns `ChangeStatus` as well. Currently `ChangeStatus` doesn't
support compound assignment, we have to write as
```
Changed = Changed | foo();
```
which is not that convenient.

This patch add the support for compound assignment for `ChangeStatus`. Compound
assignment is usually implemented as a member function, and binary arithmetic
operator is therefore implemented using compound assignment. However, unlike
regular C++ class, enum class doesn't support member functions. As a result, they
can only be implemented in the way shown in the patch.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D106109
2021-07-15 23:51:46 -04:00
Mehdi Amini
0fd38b8415 Revert "Use ManagedStatic and lazy initialization of cl::opt in libSupport to make it free of global initializer"
This reverts commit 42f588f39c5ce6f521e3709b8871d1fdd076292f.
Broke some buildbots
2021-07-16 03:46:53 +00:00
Mehdi Amini
a9a8a9a361 Use ManagedStatic and lazy initialization of cl::opt in libSupport to make it free of global initializer
We can build it with -Werror=global-constructors now. This helps
in situation where libSupport is embedded as a shared library,
potential with dlopen/dlclose scenario, and when command-line
parsing or other facilities may not be involved. Avoiding the
implicit construction of these cl::opt can avoid double-registration
issues and other kind of behavior.

Reviewed By: lattner, jpienaar

Differential Revision: https://reviews.llvm.org/D105959
2021-07-16 03:33:20 +00:00
LLVM GN Syncbot
79801693ba [gn build] Port 766a08df12c1 2021-07-16 02:23:45 +00:00
Nico Weber
1cc643bb34 [gn build] port 766a08df12c1 2021-07-15 22:23:14 -04:00
Daniel Rodríguez Troitiño
13cc0cf34a [test] Use double pound to denote comments.
Use double pound at the start of the line to differentiate comments from
statements for Lit or FileCheck.

I will also use this small commit to check my commit access.

Differential Revision: https://reviews.llvm.org/D106103
2021-07-15 17:39:34 -07:00
Matt Arsenault
ef17052770 GlobalISel: Surface offsets parameter from ComputeValueVTs 2021-07-15 19:11:40 -04:00
Matt Arsenault
79609410ad AMDGPU/GlobalISel: Fix incorrect memory types in test 2021-07-15 19:11:40 -04:00
Matt Arsenault
240dff7427 GlobalISel: Track argument pointeriness with arg flags
Since we're still building on top of the MVT based infrastructure, we
need to track the pointer type/address space on the side so we can end
up with the correct pointer LLTs when interpreting CCValAssigns.
2021-07-15 19:11:40 -04:00
Vitaly Buka
d4f9cfda56 [NFC][hwasan] Remove default arguments in internal class 2021-07-15 15:28:02 -07:00
Victor Huang
61ce66a632 [PowerPC] Add PowerPC population count, reversed load and store related builtins and instrinsics for XL compatibility
This patch is in a series of patches to provide builtins for compatibility
with the XL compiler. This patch adds the builtins and instrisics for population
count, reversed load and store related operations.

Reviewed By: nemanjai, #powerpc

Differential revision: https://reviews.llvm.org/D106021
2021-07-15 17:23:56 -05:00
Shilei Tian
4f5c97bb0f [AbstractAttributor] Fold function calls to __kmpc_is_spmd_exec_mode if possible
In the device runtime there are many function calls to `__kmpc_is_spmd_exec_mode`
to query the execution mode of current kernels. In many cases, user programs
only contain target region executing in one mode. As a consequence, those runtime
function calls will only return one value. If we can get rid of these function
calls during compliation, it can potentially improve performance.

In this patch, we use `AAKernelInfo` to analyze kernel execution. Basically, for
each kernel (device) function `F`, we collect all kernel entries `K` that can
reach `F`. A new AA, `AAFoldRuntimeCall`, is created for each call site. In each
iteration, it will check all reaching kernel entries, and update the folded value
accordingly.

In the future we will support more function.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D105787
2021-07-15 18:23:23 -04:00
Amara Emerson
e11b55a90a GlobalISel: Introduce GenericMachineInstr classes and derivatives for idiomatic LLVM RTTI.
This adds some level of type safety, allows helper functions to be added for
specific opcodes for free, and also allows us to succinctly check for class
membership with the usual dyn_cast/isa/cast functions.

To start off with, add variants for the different load/store operations with some
places using it.

Differential Revision: https://reviews.llvm.org/D105751
2021-07-15 15:21:57 -07:00
Eli Friedman
b7cade9437 [DependenceAnalysis] Guard analysis using getPointerBase().
D104806 broke some uses of getMinusSCEV() in DependenceAnalysis:
subtraction with different pointer bases returns a SCEVCouldNotCompute.
Make sure we avoid cases involving such subtractions.

Differential Revision: https://reviews.llvm.org/D106099
2021-07-15 14:57:32 -07:00
Harald van Dijk
f675df37ba [X86] Fix handling of maskmovdqu in X32
The maskmovdqu instruction is an odd one: it has a 32-bit and a 64-bit
variant, the former using EDI, the latter RDI, but the use of the
register is implicit. In 64-bit mode, a 0x67 prefix can be used to get
the version using EDI, but there is no way to express this in
assembly in a single instruction, the only way is with an explicit
addr32.

This change adds support for the instruction. When generating assembly
text, that explicit addr32 will be added. When not generating assembly
text, it will be kept as a single instruction and will be emitted with
that 0x67 prefix. When parsing assembly text, it will be re-parsed as
ADDR32 followed by MASKMOVDQU64, which still results in the correct
bytes when converted to machine code.

The same applies to vmaskmovdqu as well.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D103427
2021-07-15 22:56:08 +01:00
Sanjay Patel
beede36179 [SLP] avoid leaking poison in reduction of safe boolean logic ops
This bug was introduced with D105730 / 25ee55c0baff .

If we are not converting all of the operations of a reduction
into a vector op, we need to preserve the existing select form
of the remaining ops. Otherwise, we are potentially leaking
poison where it did not in the original code.

Alive2 agrees that the version that freezes some inputs
and then falls back to scalar is correct:
https://alive2.llvm.org/ce/z/erF4K2
2021-07-15 17:33:06 -04:00
Nikita Popov
2bbc0bd7c0 [Verifier] Extend address taken check for unknown intrinsics
Intrinsics can only be called directly, taking their address is not
legal. This is currently only enforced for intrinsics that have an
ID, rather than all intrinsics. Adjust the check to cover all
intrinsics.

This came up in D106013.

Differential Revision: https://reviews.llvm.org/D106095
2021-07-15 23:16:14 +02:00
Jessica Paquette
9f8303a62c [AArch64][GlobalISel] Clamp <n x p0> vecs when legalizing G_EXTRACT_VECTOR_ELT
This case was missing from G_EXTRACT_VECTOR_ELT. It's the same as for s64.

https://godbolt.org/z/Tnq4acY8z

Differential Revision: https://reviews.llvm.org/D105952
2021-07-15 14:05:28 -07:00
zhijian
91dbc78882 [AIX][XCOFF][Bug-Fixed] parse the parameter type of the traceback table
Summary:
in the function PPCFunctionInfo::getParmsType(), there is if (Bits > 31 || (Bits > 30 && (Elt != FixedType || hasVectorParms())))

when the Bit is 31 and the Elt is not FixedType(for example the Elt is FloatingType) , the 31th bit will be not encoded, it leave the bit as zero, when the function Expected<SmallString<32>> XCOFF::parseParmsType() the original implement
**// unsigned ParmsNum = FixedParmsNum + FloatingParmsNum;

while (Bits < 32 && ParsedNum < ParmsNum) {
...
}//**
it will look the 31 bits (zero) as FixedType. which should be FloatingType,  and get a error.

Reviewers: Jason Liu,ZarkoCA

Differential Revision: https://reviews.llvm.org/D105023
2021-07-15 16:54:22 -04:00
Nikita Popov
01d9855563 [ObjCARC] Use objc_msgSend instead of llvm.objc.msgSend in tests
D55348 replaced @objc_msgSend with @llvm.objc.msgSend in tests
together with many other objc intrinsics. However, this is not a
recognized objc intrinsic (https://llvm.org/docs/LangRef.html#objective-c-arc-runtime-intrinsics)
and does not receive special treatment by LLVM. It's likely that
uses of this function were renamed by accident.

This came up in D106013, because the address of @llvm.objs.msgSend
is taken, something which is normally not allowed for intrinsics.

Differential Revision: https://reviews.llvm.org/D106094
2021-07-15 22:21:22 +02:00
George Burgess IV
1c70f4b1ff utils: fix broken assertion in revert_checker
`intermediate_commits` is a list of full SHAs, and `across_ref` may/may
not be a full SHA (or a SHA at all). We already have `across_sha`, which
is the resolved form of `across_ref`, so use that instead.

Thanks to probinson for catching this in post-commit review of
https://reviews.llvm.org/D105578!
2021-07-15 13:07:46 -07:00
Artem Belevich
0226799a56 [NVPTX, CUDA] Add .and.popc variant of the b1 MMA instruction.
That should allow clang to compile mma.h from CUDA-11.3.

Differential Revision: https://reviews.llvm.org/D105384
2021-07-15 12:02:09 -07:00
Sushma Unnibhavi
f7010a4bb7 [M68k][GloballSel] LegalizerInfo implementation
Added rules for G_ADD, G_SUB, G_MUL, G_UDIV to be legal.

Differential Revision: https://reviews.llvm.org/D105536
2021-07-15 13:00:43 -06:00
Philip Reames
a74c4e37ae [unittest] Exercise SCEV's udiv and udiv ceiling routines
The ceiling variant was recently added (due to the work towards D105216), and we're spending a lot of time trying to find optimizations for the expression. This patch brute forces the space of i8 unsigned divides and checks that we get a correct (well consistent with APInt) result for both udiv and udiv ceiling.

(This is basically what I've been doing locally in a hand rolled C++ program, and I realized there no good reason not to check it in as a unit test which directly exercises the logic on constants.)

Differential Revision: https://reviews.llvm.org/D106083
2021-07-15 11:55:00 -07:00
Nikita Popov
ff55ad2c7b [Verifier] Use isIntrinsic() (NFC)
Call Function::isIntrinsic() instead of manually checking the
function name for an "llvm." prefix.
2021-07-15 20:30:42 +02:00
Simon Pilgrim
d5316f9a80 [InstCombine] Add select(cond,gep(gep(x,y),z),gep(x,y)) tests from PR51069 2021-07-15 19:26:24 +01:00
Sam Tebbs
d16f1096a9 [ARM][LowOverheadLoops] Make some stack spills valid for tail predication
This patch makes vector spills valid for tail predication when all loads
from the same stack slot are within the loop

Differential Revision: https://reviews.llvm.org/D105443
2021-07-15 19:23:52 +01:00
Quinn Pham
ba35dd5a19 [PowerPC] Fix popcntb XL Compat Builtin for 32bit
This patch implements the `__popcntb` XL compatibility builtin for 32bit in the frontend and backend. This patch also updates tests for `__popcntb` and other XL Compat sync related builtins.

Reviewed By: #powerpc, nemanjai, amyk

Differential Revision: https://reviews.llvm.org/D105360
2021-07-15 13:19:47 -05:00
Simon Pilgrim
95f4ef0879 Fix "unknown pragma 'GCC'" MSVC warning. NFCI. 2021-07-15 18:50:19 +01:00
Simon Pilgrim
66ad7fe2fe [InstCombine] Add 3-operand gep test with different ptr and same indices 2021-07-15 18:50:19 +01:00
Philip Reames
6a45d08863 [SCEV] Fix unsound reasoning in howManyLessThans
This is split from D105216, it handles only a subset of the cases in that patch.

Specifically, the issue being fixed is that the code incorrectly assumed that (Start-Stide) < End implied that the backedge was taken at least once. This is not true when e.g. Start = 4, Stride = 2, and End = 3. Note that we often do produce the right backedge taken count despite the flawed reasoning.

The fix chosen here is to use an alternate form of uceil (ceiling of unsigned divide) lowering which is safe when max(RHS,Start) > Start - Stride.  (Note that signedness of both max expression and comparison depend on the signedness of the comparison being analyzed, and that overflow in the Start - Stride expression is allowed.)  Note that this is weaker than proving the backedge is taken because it allows start - stride < end < start.  Some cases which can't be proven safe are sent down the generic path, and we do end up generating less optimal expressions in a few cases.

Credit for coming up with the approach goes entirely to Eli.  I just split it off, tweaked the comments a bit, and did some additional testing.

Differential Revision: https://reviews.llvm.org/D105942
2021-07-15 10:32:47 -07:00
Fangrui Song
35af2802d5 [test] Avoid llvm-readelf/llvm-readobj one-dash long options and deprecated aliases (e.g. --file-headers) 2021-07-15 10:26:21 -07:00
Vy Nguyen
27626de14b [llvm-exegesis] Fix missing-headers build errors.
Details:

Switch all #includes to use <> because that is consistent with what happens in the cmake checks.
Otherwise, we could be in the situation where cmake checks see that headers exist at <perfmon/...>
but in  llvm-exegesis code, we use "perfmon/...", which may not exist.

Related PR/revisions: D84076, PR51017+D105615

    Differential Revision: https://reviews.llvm.org/D105861
2021-07-15 13:20:25 -04:00
Arthur Eubanks
ee15f89094 Revert "[SLP]Workaround for InsertSubVector cost."
This reverts commit 2eb50baf059648214cb1c624b5269978a62e86a1.

Causes hangs, see comments on D105827.
2021-07-15 10:19:41 -07:00
Jessica Paquette
d52865f98f [GlobalISel] Fix infinite loop in reassociationCanBreakAddressingModePattern
It didn't update the opcode while walking through G_INTTOPTR/G_PTRTOINT.

Differential Revision: https://reviews.llvm.org/D106080
2021-07-15 10:09:07 -07:00
Stanislav Mekhanoshin
5c27957af8 [AMDGPU] Refine -O0 and -O1 passes.
Differential Revision: https://reviews.llvm.org/D105579
2021-07-15 09:51:54 -07:00
Fangrui Song
5aac6f60bc [llvm-nm] Remove one-dash long options except -arch
The documentation and help messages have recommended the double-dash forms for
quite a while. Remove one-dash long options which are not recognized by GNU
style `getopt_long`.

`-arch` is kept as it is in the manpage of classic nm
https://keith.github.io/xcode-man-pages/nm.1.html

Note: the dyldinfo related options don't have a test.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D105948
2021-07-15 09:50:37 -07:00
Andrzej Warzynski
e5843d83d7 Enable Flang by default in the test-release.sh script
I've also brought this up on llvm-dev:
  https://lists.llvm.org/pipermail/llvm-dev/2021-July/151744.html

Differential Revision: https://reviews.llvm.org/D105885
2021-07-15 17:17:49 +01:00
Nikita Popov
d58a8fbeab [IR] Add elementtype attribute
This implements the elementtype attribute specified in D105407. It
just adds the attribute and the specified verifier rules, but
doesn't yet make use of it anywhere.

Differential Revision: https://reviews.llvm.org/D106008
2021-07-15 18:04:26 +02:00