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17722 Commits

Author SHA1 Message Date
Owen Anderson
50766bc2f2 Fix encoding of Thumb BLX register instructions. Patch by Koan-Sin Tan. 
llvm-svn: 131189
 2011-05-11 17:00:48 +00:00
Nadav Rotem
2a654a69ed Add custom lowering of X86 vector SRA/SRL/SHL when the shift amount is a splat vector. 
llvm-svn: 131179
 2011-05-11 08:12:09 +00:00
Bill Wendling
453a924d29 Give the 'eh.sjlj.dispatchsetup' intrinsic call the value coming from the setjmp 
intrinsic call. This prevents it from being reordered so that it appears
*before* the setjmp intrinsic (thus making it completely useless).
<rdar://problem/9409683>

llvm-svn: 131174
 2011-05-11 01:11:55 +00:00
Eric Christopher
3c17ef53c3 Optimize atomic lock or that doesn't use the result value. 
Next up: xor and and.

Part of rdar://8470697

llvm-svn: 131171
 2011-05-10 23:57:45 +00:00
Eric Christopher
aa7c86ec19 Refactor lock versions of binary operators to be a little less 
cut and paste.

llvm-svn: 131139
 2011-05-10 18:36:16 +00:00
Jason W Kim
5b6e73e499 First cut at getting debugging support for ARM/MC/ELF/.o 
DWARF stuff also gets fixed up by ELFARMAsmBackend::ApplyFixup(),
but the offset is not guaranteed to be mod 4 == 0 as in text/data. 

llvm-svn: 131137
 2011-05-10 18:07:25 +00:00
Justin Holewinski
ecdabf3295 PTX: add PTX 2.3 setting in PTX sub-target. 
Patch by Wei-Ren Chen

llvm-svn: 131123
 2011-05-10 12:32:11 +00:00
Eric Christopher
49409b8534 Fix td file comments for Mips. 
Patch by Liu <proljc@gmail.com>!

llvm-svn: 131086
 2011-05-09 18:16:46 +00:00
Mon P Wang
08d3b69861 Fixed MC encoding for index_align for VLD1/VST1 (single element from one lane) for size 32 
llvm-svn: 131085
 2011-05-09 17:47:27 +00:00
Benjamin Kramer
ba7c9948e8 X86: Add a bunch of peeps for add and sub of SETB. 
"b + ((a < b) ? 1 : 0)" compiles into
	cmpl	%esi, %edi
	adcl	$0, %esi
instead of
	cmpl	%esi, %edi
	sbbl	%eax, %eax
	andl	$1, %eax
	addl	%esi, %eax

This saves a register, a false dependency on %eax
(Intel's CPUs still don't ignore it) and it's shorter.

llvm-svn: 131070
 2011-05-08 18:36:07 +00:00
Jakob Stoklund Olesen
4a57c64408 Eliminate the ARM sub-register indexes that are not needed by the sources. 
Tablegen will invent its own names for these indexes, and the register file is a
bit simpler.

llvm-svn: 131059
 2011-05-07 21:22:42 +00:00
Eric Christopher
47f9c0695c Fix the non-MC encoding of pkhbt and pkhtb. 
Patch by Stephen Hines.

llvm-svn: 131045
 2011-05-07 04:37:27 +00:00
Akira Hatanaka
fe1f642eb1 1. Keep lines in 80 columns. 
2. Remove unused function.
3. Correct indentation.

llvm-svn: 131028
 2011-05-06 22:11:29 +00:00
Eli Friedman
12e590e760 Make the logic for determining function alignment more explicit. No functionality change. 
llvm-svn: 131012
 2011-05-06 20:34:06 +00:00
Rafael Espindola
59462d8ae3 Dead code elimination. 
llvm-svn: 130984
 2011-05-06 14:56:22 +00:00
Justin Holewinski
e4a7007565 PTX: add PTX 2.3 language target 
Patch by Wei-Ren Chen

llvm-svn: 130980
 2011-05-06 11:40:36 +00:00
Rafael Espindola
6612ce475e Move PPC Linux to CFI. 
llvm-svn: 130951
 2011-05-05 21:34:33 +00:00
Eli Friedman
959064eae3 PR9848: pandn is not commutative. 
No test because I can't think of any way to write one that won't break quickly.

llvm-svn: 130932
 2011-05-05 17:45:31 +00:00
Bill Wendling
7a13f3bde3 Remove a flag that would set the ".eh" symbol as .globl. MachO was the only one 
who used this flag, and it now emits CFI and doesn't emit this anymore. All
other targets left this flag "false".
<rdar://problem/8486371>

llvm-svn: 130918
 2011-05-05 06:49:15 +00:00
Jakob Stoklund Olesen
da250b29e2 Fix X86RegisterInfo::getMatchingSuperRegClass for sub_8bit_hi. 
It is OK for B to be any GR8_ABCD_H superclass, the returned register class
doesn't have to map surjectively onto B.

llvm-svn: 130892
 2011-05-04 23:54:54 +00:00
Jakob Stoklund Olesen
6eef723c97 Implement SystemZRegisterInfo::getMatchingSuperRegClass to enable cross-class joins. 
llvm-svn: 130857
 2011-05-04 19:02:04 +00:00
Devang Patel
8823e24dde Do not emit location expression size twice. 
llvm-svn: 130854
 2011-05-04 19:00:57 +00:00
Rafael Espindola
9e59931156 Fix cmake build. 
llvm-svn: 130850
 2011-05-04 18:46:56 +00:00
Akira Hatanaka
e9a2d2a78f Prevent instructions using $gp from being placed between a jalr and the instruction that restores the clobbered $gp. 
llvm-svn: 130847
 2011-05-04 17:54:27 +00:00
Jakob Stoklund Olesen
9703690633 Implement MSP430RegisterInfo::getMatchingSuperRegClass to enable cross-class 
coalescing.

llvm-svn: 130814
 2011-05-04 01:01:36 +00:00
Jakob Stoklund Olesen
da28d31f03 Mark ultra-super-registers QQQQ as call-clobbered instead of the D sub-registers. 
LiveVariables doesn't understand that clobbering D0 and D1 completely overwrites
Q0, so if Q0 is live-in to a function, its live range will extend beyond a
function call that only clobbers D0 and D1. This shows up in the
ARM/2009-11-01-NeonMoves test case.

LiveVariables should probably implement the much stricter rules for physreg
liveness that RAFast imposes - a physreg is killed by the first use of any
alias.

llvm-svn: 130801
 2011-05-03 22:31:24 +00:00
Bill Wendling
67f5e8f0a7 Replace the "movnt" intrinsics with a native store + nontemporal metadata bit. 
<rdar://problem/8460511>

llvm-svn: 130791
 2011-05-03 21:11:17 +00:00
Akira Hatanaka
5a2b3f0120 Fix function MipsRegisterInfo::getRegisterNumbering. 
llvm-svn: 130774
 2011-05-03 18:41:54 +00:00
Bob Wilson
7ca16f2c1f Temporarily disable use of divmod compiler-rt functions for iOS. 
llvm-svn: 130766
 2011-05-03 17:33:22 +00:00
Bruno Cardoso Lopes
c818d784a2 Fold ARM coprocessor intrinsics patterns into the instructions defs whenever 
it's possible.

llvm-svn: 130764
 2011-05-03 17:29:29 +00:00
Bruno Cardoso Lopes
9dd575e4a9 Add a few ARM coprocessor intrinsics. Testcases included 
llvm-svn: 130763
 2011-05-03 17:29:22 +00:00
Benjamin Kramer
3fa83860ab Remove unused variables caught by GCC's -Wunused-but-set-variable. 
llvm-svn: 130755
 2011-05-03 16:00:27 +00:00
Michael J. Spencer
575cfa0f81 Add pentium{3,4}m cpus. Patch by Alexander Best! 
llvm-svn: 130749
 2011-05-03 03:42:50 +00:00
Eric Christopher
1de0dfaab0 xmm0 is an implicit parameter in this and so shouldn't be in the 
string template.

Fixes rdar://8493866

llvm-svn: 130747
 2011-05-03 01:28:32 +00:00
Dan Gohman
7beb845bab Add an unfolded offset field to LSR's Formula record. This is used to 
model constants which can be added to base registers via add-immediate
instructions which don't require an additional register to materialize
the immediate.

llvm-svn: 130743
 2011-05-03 00:46:49 +00:00
Eric Christopher
e637bff03a Apparently the check for direct calls is unnecessary. 
llvm-svn: 130716
 2011-05-02 20:16:33 +00:00
Rafael Espindola
339ecf7100 Add 130690 back. 
llvm-svn: 130693
 2011-05-02 15:58:16 +00:00
Rafael Espindola
b5ce7c77ac Revert while I debug the tests that use march but not mtriple. 
llvm-svn: 130691
 2011-05-02 15:42:31 +00:00
Rafael Espindola
80af9a69e8 Move ppc OS X to cfi too. I am building it on an old ppc mini, but it will take some time. 
llvm-svn: 130690
 2011-05-02 15:00:52 +00:00
Rafael Espindola
d49e7769a7 Add r130623 back now that ELF has been fixed to work with -fno-dwarf2-cfi-asm. 
llvm-svn: 130658
 2011-05-01 15:44:13 +00:00
Chandler Carruth
0d71210c33 Remove an unused variable from this function introduced in r130637, 
likely a result of copy/paste.

llvm-svn: 130640
 2011-05-01 06:14:10 +00:00
Rafael Espindola
eb5d0cb4f4 GCC uses a different encoding of pointers in the FDE when using 
-fno-dwarf2-cfi-asm. Implement the same behavior.

llvm-svn: 130637
 2011-05-01 04:49:54 +00:00
Rafael Espindola
21023ae86c I forgot these files in the previous commit. 
llvm-svn: 130635
 2011-05-01 04:19:24 +00:00
Rafael Espindola
2f2c3bf31f Simplify the handling of pcrel relocations on ELF. Now we do the right thing 
for all symbol differences and can drop the old EmitPCRelSymbolValue
method.

This also make getExprForFDESymbol on ELF equal to the one on MachO, and it
can be made non-virtual.

llvm-svn: 130634
 2011-05-01 03:50:49 +00:00
Rafael Espindola
886aa563be Revert the previous patch while I figure out how to make llvm-gcc 
less agressive about disabling cfi on linux :-(

llvm-svn: 130626
 2011-04-30 23:03:44 +00:00
Jakob Stoklund Olesen
534c3dfcc1 X86AsmPrinter doesn't know how to handle the X86II::MO_GOT_ABSOLUTE_ADDRESS flag 
after folding ADD32ri to ADD32mi, so don't do that.

This only happens when the greedy register allocator gets itself in trouble and
spills %vreg9 here:

16L             %vreg9<def> = MOVPC32r 0, %ESP<imp-use>; GR32:%vreg9
48L             %vreg9<def> = ADD32ri %vreg9, <es:_GLOBAL_OFFSET_TABLE_>[TF=1], %EFLAGS<imp-def,dead>; GR32:%vreg9

That should never happen, the live range should be split instead.

llvm-svn: 130625
 2011-04-30 23:00:05 +00:00
Rafael Espindola
9455887b10 Enable CFI on OS X. 
Currently the output should be almost identical to the one produced by CodeGen
to make the transition easier.

The only two differences I know of are:

* Some files get an extra advance loc of size 0. This will be fixed when
relaxations are enabled.
* The optimization of declaring an EH symbol as an external variable is not
implemented. This is a subset of adding the nounwind attribute, so we if really
this at -O0 we should probably do it at the IL level.

llvm-svn: 130623
 2011-04-30 22:29:54 +00:00
Rafael Espindola
7901d3790e Add all the plumbing needed for MC to expand cfi to the old tables in 
the final assembly. It is the same technique used when targeting
assemblers that don't support .loc.

llvm-svn: 130587
 2011-04-30 03:44:37 +00:00
Eric Christopher
ad02f6c78a 80-col. 
llvm-svn: 130558
 2011-04-29 23:12:01 +00:00
Eli Friedman
996092fea3 Zap a couple now-unused functions. 
llvm-svn: 130557
 2011-04-29 22:56:48 +00:00