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Commit Graph

174401 Commits

Author SHA1 Message Date
Alina Sbirlea
360be55b56 Check bool attribute value in getOptionalBoolLoopAttribute.
Summary:
Check the bool value of the attribute in getOptionalBoolLoopAttribute
not just its existance.
Eliminates the warning noise generated when vectorization is explicitly disabled.

Reviewers: Meinersbur, hfinkel, dmgreen

Subscribers: jlebar, sanjoy, llvm-commits

Differential Revision: https://reviews.llvm.org/D57260

llvm-svn: 352555
2019-01-29 22:33:20 +00:00
Sam Clegg
02dc9d91dc [WebAssembly] Ensure BasicSymbolRef.getRawDataRefImpl().p is non-null
Store a non-zero value to ref.d.a and use ref.d.b to store the symbol
index.  This means that ref.p is never null, which was confusing
llvm-nm.

Fixes PR40497

Differential Revision: https://reviews.llvm.org/D57373

llvm-svn: 352551
2019-01-29 22:22:32 +00:00
Shoaib Meenai
e4bff2064d [docs] Prevent O0 optnone for opt input
If we just compile with -O0, clang will add optnone attributes
everywhere, so opt won't actually be able to perform any passes.
Instruct clang to not emit the optnone so opt can do its thing.

Differential Revision: https://reviews.llvm.org/D56950

llvm-svn: 352550
2019-01-29 22:17:51 +00:00
Amara Emerson
478ae74dcd [AArch64][GlobalISel] Unmerge into scalars from a vector should use FPR bank.
This currently shows up as a selection fallback since the dest regs were given
GPR banks but the source was a vector FPR reg.

Differential Revision: https://reviews.llvm.org/D57408

llvm-svn: 352545
2019-01-29 21:19:33 +00:00
Paul Robinson
e0007a64ee [DWARF] Emit reasonable debug info for empty .s files.
llvm-svn: 352541
2019-01-29 20:53:51 +00:00
Sanjay Patel
e15a520f8c [InstCombine] canonicalize cmp/select form of uadd saturate with constant
I'm circling back around to a loose end from D51929.

The backend (either CGP or DAG) doesn't recognize this pattern, so we end up with different asm for these IR variants.

Regardless of any future changes to canonicalize to saturation/overflow intrinsics, we want to get raw IR variations 
into the minimal number of raw IR forms. If/when we can canonicalize to intrinsics, that will make that step easier.

  Pre: C2 == ~C1
  %a = add i32 %x, C1
  %c = icmp ugt i32 %x, C2
  %r = select i1 %c, i32 -1, i32 %a
  =>
  %a = add i32 %x, C1
  %c2 = icmp ult i32 %x, C2
  %r = select i1 %c2, i32 %a, i32 -1

  https://rise4fun.com/Alive/pkH

Differential Revision: https://reviews.llvm.org/D57352

llvm-svn: 352536
2019-01-29 20:02:45 +00:00
Sanjay Patel
f932631c7d [DAGCombiner] fold extract_subvector of extract_subvector
This is the sibling fold for insert-of-insert that was added with D56604.

Now that we have x86 shuffle narrowing (D57156), this change shows improvements for 
lots of AVX512 reduction code (not sure that we would ever expect extract-of-extract otherwise).

There's a small regression in some of the partial-permute tests (extracting followed by splat).
That is tracked by PR40500:
https://bugs.llvm.org/show_bug.cgi?id=40500

Differential Revision: https://reviews.llvm.org/D57336

llvm-svn: 352528
2019-01-29 19:13:39 +00:00
Michael J. Spencer
34ef654a47 [VFS] Fix warning and use better check.
llvm-svn: 352527
2019-01-29 19:07:15 +00:00
Matt Arsenault
a8f46258ff GlobalISel: Fix narrowScalar for load/store with different mem size
This was ignoring the memory size, and producing multiple loads/stores
if the operand size was different from the memory size.

I assume this is the intent of not having an explicit G_ANYEXTLOAD
(although I think that would probably be better).

llvm-svn: 352523
2019-01-29 18:13:02 +00:00
Sanjay Patel
f84ac4f615 [x86] add tests for vector bool math; NFC
llvm-svn: 352520
2019-01-29 17:00:47 +00:00
Sanjay Patel
7ab73abfa7 [AArch64] add tests for vector bool math; NFC
llvm-svn: 352519
2019-01-29 17:00:07 +00:00
Andrea Di Biagio
e37e1afe2c [X86][Btver2] Improved latency/throughput model for scalar int-to-float conversions.
Account for bypass delays when computing the latency of scalar int-to-float
conversions.
On Jaguar we need to account for an extra 6cy latency (see AMD fam16h SOG).
This patch also fixes the number of micropcodes for the register-memory variants
of scalar int-to-float conversions.

Differential Revision: https://reviews.llvm.org/D57148

llvm-svn: 352518
2019-01-29 16:47:27 +00:00
Sanjay Patel
26ad28f5ae [InstCombine] regenerate test checks; NFC
llvm-svn: 352517
2019-01-29 16:44:05 +00:00
Sanjay Patel
ddfc4a9239 [InstCombine] add tests for ext-of-bool + add/sub; NFC
We should choose one of these as canonical:

  %z = zext i1 %cmp to i32
  %r = sub i32 %x, %z
  =>
  %s = sext i1 %cmp to i32
  %r = add i32 %x, %s

The test comments assume that the zext form is better,
but we can adjust that if we decide to go the other way.

llvm-svn: 352515
2019-01-29 16:39:23 +00:00
James Y Knight
f09d803a07 Adjust documentation for git migration.
This fixes most references to the paths:
 llvm.org/svn/
 llvm.org/git/
 llvm.org/viewvc/
 github.com/llvm-mirror/
 github.com/llvm-project/
 reviews.llvm.org/diffusion/

to instead point to https://github.com/llvm/llvm-project.

This is *not* a trivial substitution, because additionally, all the
checkout instructions had to be migrated to instruct users on how to
use the monorepo layout, setting LLVM_ENABLE_PROJECTS instead of
checking out various projects into various subdirectories.

I've attempted to not change any scripts here, only documentation. The
scripts will have to be addressed separately.

Additionally, I've deleted one document which appeared to be outdated
and unneeded:
  lldb/docs/building-with-debug-llvm.txt

Differential Revision: https://reviews.llvm.org/D57330

llvm-svn: 352514
2019-01-29 16:37:27 +00:00
Nirav Dave
76d18106aa [SelectionDAGBuilder] Remove redundant variable. NFCI.
llvm-svn: 352506
2019-01-29 15:14:07 +00:00
Jordan Rupprecht
c155e3cc0d [llvm-objcopy] Implement --set-section-flags.
Summary:
--set-section-flags is used to change the section flags (e.g. SHF_ALLOC) for given sections. The flags allowed are the same from the existing --rename-section=.old=.new[,flags] feature.

Additionally, make sure that --set-section-flag cannot be used with --rename-section (either the source or destination), since --rename-section accepts flags. This avoids ambiguity for something like "--rename-section=.foo=.bar,alloc --set-section-flag=.bar,code".

Reviewers: jhenderson, jakehehrlich, alexshap, espindola

Reviewed By: jhenderson, jakehehrlich

Subscribers: llvm-commits, emaste, arichardson

Differential Revision: https://reviews.llvm.org/D57198

llvm-svn: 352505
2019-01-29 15:05:38 +00:00
Ayonam Ray
8e70d02d4b Reversing the checkin for version 352484 as tests are failing.
llvm-svn: 352504
2019-01-29 15:00:50 +00:00
Nico Weber
bd819efb52 gn build: Merge r352444, r352431, r352430
llvm-svn: 352502
2019-01-29 14:39:54 +00:00
Neil Henning
201753ef72 [AMDGPU] Fix a weird WWM intrinsic issue.
I found a really strange WWM issue through a very convoluted shader that
essentially boils down to a bug in SIInstrInfo where canReadVGPR did not
correctly identify that WWM is like a copy and can have a VGPR as its
source.

Differential Revision: https://reviews.llvm.org/D56002

llvm-svn: 352500
2019-01-29 14:28:17 +00:00
Hans Wennborg
167265e4b5 Revert r351833 and r352250.
They were breaking the Windows build when using MSBuild, see the
discussion on D56781.

r351833: "Use response file when generating LLVM-C.dll"

> Use response file when generating LLVM-C.dll
>
> As discovered in D56774 the command line gets to long, so use a response file to give the script the libs. This change has been tested and is confirmed working for me.
>
> Commited on behalf of Jakob Bornecrantz
>
> Differential Revision: https://reviews.llvm.org/D56781

r352250: "Build LLVM-C.dll by default on windows and enable in release package"

>  Build LLVM-C.dll by default on windows and enable in release package
>
>  With the fixes to the building of LLVM-C.dll in D56781 this should now
>  be safe to land. This will greatly simplify dealing with LLVM for people
>  that just want to use the C API on windows. This is a follow up from
>  D35077.
>
>  Patch by Jakob Bornecrantz!
>
>  Differential revision: https://reviews.llvm.org/D56774

llvm-svn: 352492
2019-01-29 13:43:22 +00:00
Ayonam Ray
99992bbde8 [CodeGen] Omit range checks from jump tables when lowering switches with unreachable default
During the lowering of a switch that would result in the generation of a 
jump table, a range check is performed before indexing into the jump 
table, for the switch value being outside the jump table range and a 
conditional branch is inserted to jump to the default block. In case the 
default block is unreachable, this conditional jump can be omitted. This 
patch implements omitting this conditional branch for unreachable 
defaults.

Review ID: D52002
Reviewers: Hans Wennborg, Eli Freidman, Roman Lebedev

llvm-svn: 352484
2019-01-29 12:01:32 +00:00
Simon Pilgrim
d095d23a47 [X86] Add PR40483 test case
llvm-svn: 352480
2019-01-29 10:58:42 +00:00
Dan Gohman
9634c88c3c [WebAssembly] Re-enable main-function signature rewriting
Re-enable the code to rewrite main-function signatures into
"int main(int argc, char *argv[])", but limited to only handling
the case of "int main(void)", so that it doesn't silently strip
an argument in the "int main(int argc, char *argv[], char *envp[])"
case.

This allows main to be called by C startup code, since WebAssembly
requires caller and callee signatures to match, so it can't rely
on passing main a different number of arguments than it expects.

Differential Revision: https://reviews.llvm.org/D57323

llvm-svn: 352479
2019-01-29 10:53:42 +00:00
James Henderson
b26151629d [llvm-symbolizer][doc] Tweak wording of --adjust-vma switch description
The address isn't dynamically relocated. The object is.

llvm-svn: 352477
2019-01-29 10:43:48 +00:00
Simon Pilgrim
55d2588d89 [X86] Fix linux32 pic tests to use correct relocation model (PR39684)
Differential Revision: https://reviews.llvm.org/D57301

llvm-svn: 352476
2019-01-29 10:41:48 +00:00
David Green
c802e04e3f [ARM] Use sub for negative offset load/store in thumb1
This attempts to optimise negative values used in load/store operands
a little. We currently try to selct them as rr, materialising the
negative constant using a MOV/MVN pair. This instead selects ri with
an immediate of 0, forcing the add node to become a simpler sub.

Differential Revision: https://reviews.llvm.org/D57121

llvm-svn: 352475
2019-01-29 10:40:31 +00:00
Simon Pilgrim
7e25d4dcfe [X86] Regenerate abi-isel.ll test
Adds note requested in D57301 and fixes some missing GOTPCREL addressmath checks

llvm-svn: 352474
2019-01-29 10:39:02 +00:00
David Green
07d01f5d4d [ARM] Add extra testcases for D57121. NFC
llvm-svn: 352472
2019-01-29 10:25:56 +00:00
Jeremy Morse
39a2061cd0 Remove 'XFAIL: powerpc64' from a debuginfo test
This test started XPASSing with r352467, and the change in behaviour
performed by that patch does appear to fix the cause of the original XFAIL
(missing FrameIndex DBG_VALUE), which I've replicated locally with
-mtriple=powerpc64--.

I'll write this up in PR21881 which documents the XFAIL, and seek
confirmation I haven't overlooked something here.

llvm-svn: 352471
2019-01-29 10:23:43 +00:00
Bjorn Pettersson
cd1da20799 [IPCP] Don't crash due to arg count/type mismatch between caller/callee
Summary:
This patch avoids an assert in IPConstantPropagation when
there is a argument count/type mismatch between the caller and
the callee.

While this is actually UB on C-level (clang emits a warning),
the IR verifier seems to accept it. I'm not sure what other
frontends/languages might think about this, so simply bailing out
to avoid hitting an assert (in CallSiteBase<>::getArgOperand or
Value::doRAUW) seems like a simple solution.

The problem is exposed by the fact that AbstractCallSites will look
through a bitcast at the callee position of a call/invoke.

Reviewers: jdoerfert, reames, efriedma

Reviewed By: jdoerfert, efriedma

Subscribers: eli.friedman, efriedma, llvm-commits

Differential Revision: https://reviews.llvm.org/D57052

llvm-svn: 352469
2019-01-29 10:19:44 +00:00
Jeremy Morse
74a6d4e258 [DebugInfo][DAG] Process FrameIndex dbg.values unconditionally
A FrameIndex should be valid throughout a block regardless of what instructions
get selected in that block -- therefore we shouldn't harness dbg.values that
refer to FrameIndexes to an SDNode. There are numerous codegen reasons why
an SDNode never appears or doesn't become a location that a DBG_VALUE can
refer to. None of them actually affect the variable location.

Therefore, before any other tests to encode dbg_values in a SelectionDAG,
identify FrameIndex operands and encode them unattached to any SDNode.

Differential Revision: https://reviews.llvm.org/D57328

llvm-svn: 352467
2019-01-29 09:40:05 +00:00
Max Kazantsev
d52a6c5060 [NFC] Use ArrayRef instead of SmallVectorImpl where possible
llvm-svn: 352466
2019-01-29 09:39:15 +00:00
Martin Storsjo
30a71b482a [COFF, ARM64] Don't put jump table into a separate COFF section for EK_LabelDifference32
Windows ARM64 has PIC relocation model and uses jump table kind
EK_LabelDifference32. This produces jump table entry as
".word LBB123 - LJTI1_2" which represents the distance between the block
and jump table.

A new relocation type (IMAGE_REL_ARM64_REL32) is needed to do the fixup
correctly if they are in different COFF section.

This change saves the jump table to the same COFF section as the
associated code. An ideal fix could be utilizing IMAGE_REL_ARM64_REL32
relocation type.

Patch by Tom Tan!

Differential Revision: https://reviews.llvm.org/D57277

llvm-svn: 352465
2019-01-29 09:36:48 +00:00
Jonas Paulsson
5d69ad9388 [CodeGenPrepare] Handle all debug calls in dupRetToEnableTailCallOpts()
This patch makes sure that a debug value that is after the bitcast in
dupRetToEnableTailCallOpts() is also skipped.

The reduced test case is from SPEC-2006 on SystemZ.

Review: Vedant Kumar, Wolfgang Pieb
https://reviews.llvm.org/D57050

llvm-svn: 352462
2019-01-29 09:03:35 +00:00
Jeremy Morse
66f0883cad Fix an incorrectly configured test.
This should have had a target triple in it, my mistake.

llvm-svn: 352460
2019-01-29 08:41:44 +00:00
Mikael Holmen
5f5050e3cd Fix compiler warning when using clang 3.6.0
Without the fix we get the following (with -Werror):

../lib/Target/X86/X86ISelLowering.cpp:14181:58: error: suggest braces around initialization of subobject [-Werror,-Wmissing-braces]
  SmallVector<std::array<int, 2>, 2> LaneSrcs(NumLanes, {-1, -1});
                                                         ^~~~~~
                                                         {     }
1 error generated.

llvm-svn: 352455
2019-01-29 06:51:28 +00:00
Philip Reames
c58a19255c Correct contents for r352453
I had a local change I hadn't realized when submitting that auto-update.  As such, the auto-update was wrong.  This should fix it, and with that, it's clearly time to stop submitting changes and go to bed.

llvm-svn: 352454
2019-01-29 06:40:02 +00:00
Philip Reames
a59eff0ca4 [Tests] Regen to remove future test diffs
This file appears to have been manually editted at some point after being auto-updated. A future change adjusts this file slightly, and all of the updates makes the diff super confusing.

llvm-svn: 352453
2019-01-29 06:34:46 +00:00
Philip Reames
233277bd5e [Test] Add tests for gather/maked.load demanded elements, and convert the whole file to auto generated checks.
llvm-svn: 352452
2019-01-29 05:58:32 +00:00
Max Kazantsev
7ed87fdb4e [SCEV] Take correct loop in AddRec simplification. PR40420
The code of AddRec simplification is using wrong loop when it creates a new
AddRecExpr. It should be using AddRecLoop which we have saved and against which
all gate checks are made, and not calling AddRec->getLoop() over and over
again because AddRec may change and become an AddRecurrency from outer loop
during the transform iterations.

Considering this change trivial, commiting for postcommit review.

llvm-svn: 352451
2019-01-29 05:37:59 +00:00
Max Kazantsev
0a4e1689f7 [NFC] Merge failing test from PR40420
llvm-svn: 352450
2019-01-29 05:12:40 +00:00
Teresa Johnson
572052ba14 Try to make new test more resilient to different orderings
New test added in r352441 getting a bot failure which I believe is
due to different ordering in the dumping which isn't being handled
well. Try to make test more resilient to ordering differences.

llvm-svn: 352446
2019-01-29 02:04:01 +00:00
Sam Clegg
a41348ea3f [WebAssembly] Handle more types of uses in WebAssemblyAddMissingPrototypes
Previously we were only handling bitcast operations, however
prototypeless functions can also appear in other places such as
comparisons and as function params.

Switch to using replaceAllUsesWith() to replace the prototype-less
function uses.  This new approach results in some redundant bitcasting
but is much simpler and handles all cases.

Differential Revision: https://reviews.llvm.org/D56938

llvm-svn: 352445
2019-01-29 00:30:46 +00:00
Reid Kleckner
c74fe1ac89 [PPC] Include tablegenerated PPCGenCallingConv.inc once
Move the CC analysis implementation to its own .cpp file instead of
duplicating it and artificually using functions in PPCISelLowering.cpp
and PPCFastISel.cpp. Follow-up to the same change done for X86, ARM, and
AArch64.

llvm-svn: 352444
2019-01-29 00:30:35 +00:00
Thomas Lively
4d2f1d680a [WebAssembly] Expand BUILD_PAIR nodes
Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish

Differential Revision: https://reviews.llvm.org/D57276

llvm-svn: 352442
2019-01-28 23:44:31 +00:00
Teresa Johnson
0c7ba752d1 [ThinLTO] Add option to dump per-module summary dot graph
Summary:
I found that there currently isn't a way to invoke exportToDot from
the command line for a per-module summary index, and therefore no
testing of that case. Add an internal option and use it to test dumping
of per module summary indexes.

In particular, I am looking at fixing the limitation that causes the
aliasee GUID in the per-module summary to be 0, and want to be able to
test that change.

Reviewers: evgeny777

Subscribers: mehdi_amini, inglorion, eraman, steven_wu, dexonsmith, llvm-commits

Differential Revision: https://reviews.llvm.org/D57206

llvm-svn: 352441
2019-01-28 23:43:26 +00:00
Philip Reames
c60736b986 Demanded elements support for vector GEPs
GEPs can produce either scalar or vector results. If we're extracting only a subset of the vector lanes, simplifying the operands is helpful in eliminating redundant computation, and (eventually) allowing further optimizations

Differential Revision: https://reviews.llvm.org/D57177

llvm-svn: 352440
2019-01-28 23:24:49 +00:00
Eli Friedman
2408979b55 [docs] Fix a couple spelling errors.
llvm-svn: 352439
2019-01-28 23:03:41 +00:00
Teresa Johnson
25aa36b695 [ThinLTO] Refine reachability check to fix compile time increase
Summary:
A recent fix to the ThinLTO whole program dead code elimination (D56117)
increased the thin link time on a large MSAN'ed binary by 2x.
It's likely that the time increased elsewhere, but was more noticeable
here since it was already large and ended up timing out.

That change made it so we would repeatedly scan all copies of linkonce
symbols for liveness every time they were encountered during the graph
traversal. This was needed since we only mark one copy of an aliasee as
live when we encounter a live alias. This patch fixes the issue in a
more efficient manner by simply proactively visiting the aliasee (thus
marking all copies live) when we encounter a live alias.

Two notes: One, this requires a hash table lookup (finding the aliasee
summary in the index based on aliasee GUID). However, the impact of this
seems to be small compared to the original pre-D56117 thin link time. It
could be addressed if we keep the aliasee ValueInfo in the alias summary
instead of the aliasee GUID, which I am exploring in a separate patch.

Second, we only populate the aliasee GUID field when reading summaries
from bitcode (whether we are reading individual summaries and merging on
the fly to form the compiled index, or reading in a serialized combined
index). Thankfully, that's currently the only way we can get to this
code as we don't yet support reading summaries from LLVM assembly
directly into a tool that performs the thin link (they must be converted
to bitcode first). I added a FIXME, however I have the fix under test
already. The easiest fix is to simply populate this field always, which
isn't hard, but more likely the change I am exploring to store the
ValueInfo instead as described above will subsume this. I don't want to
hold up the regression fix for this though.

Reviewers: trentxintong

Subscribers: mehdi_amini, inglorion, dexonsmith, llvm-commits

Differential Revision: https://reviews.llvm.org/D57203

llvm-svn: 352438
2019-01-28 22:27:05 +00:00