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Commit Graph

168580 Commits

Author SHA1 Message Date
Alexandre Ganea
370eeaa8fa More build fix for r341064.
llvm-svn: 341070
2018-08-30 14:05:49 +00:00
Daniel Cederman
0fa121db2e [Sparc] Use ANDN instead of AND if constant can be encoded more efficiently
Summary:
In the case of (and reg, constant) or (or reg, constant), it can be
beneficial to use a ANDNrr/ORNrr instruction instead of ANDrr/ORrr,
if the complement of the constant can be encoded using a single SETHI
instruction instead of a SETHI/ORri pair.

If the constant has more than one use, it is probably better to keep it
in its original form.

Reviewers: jyknight, venkatra

Reviewed By: jyknight

Subscribers: fedor.sergeev, jrtc27, llvm-commits

Differential Revision: https://reviews.llvm.org/D50964

llvm-svn: 341069
2018-08-30 14:05:26 +00:00
Alexander Timofeev
c7aa76e9cf [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1.
Reviewers: rampitec

Differential revision: https://reviews/llvm/org/D51316

llvm-svn: 341068
2018-08-30 13:55:04 +00:00
Alexandre Ganea
3eb239ed49 Build fix for r341064. Temporarily disable compile-time validation for createFileError().
llvm-svn: 341067
2018-08-30 13:36:07 +00:00
Alexandre Ganea
7644b9b0eb [Error] Add FileError helper; upgrade StringError behavior
FileError is meant to encapsulate both an Error and a file name/path. It should be used in cases where an Error occurs deep down the call chain, and we want to return it to the caller along with the file name.

StringError was updated to display the error messages in different ways. These can be:

1. display the error_code message, and convert to the same error_code (ECError behavior)
2. display an arbitrary string, and convert to a provided error_code (current StringError behavior)
3. display both an error_code message and a string, in this order; and convert to the same error_code

These behaviors can be triggered depending on the constructor. The goal is to use StringError as a base class, when a library needs to provide a explicit Error type.

Differential Revision: https://reviews.llvm.org/D50807

llvm-svn: 341064
2018-08-30 13:10:42 +00:00
Ties Stuij
43c46fbb66 [CodeGen] emit inline asm clobber list warnings for reserved (cont)
Summary:
This is a continuation of https://reviews.llvm.org/D49727
Below the original text, current changes in the comments:

Currently, in line with GCC, when specifying reserved registers like sp or pc on an inline asm() clobber list, we don't always preserve the original value across the statement. And in general, overwriting reserved registers can have surprising results.

For example:

  extern int bar(int[]);
  
  int foo(int i) {
    int a[i]; // VLA
    asm volatile(
        "mov r7, #1"
      :
      :
      : "r7"
    );
  
    return 1 + bar(a);
  }

Compiled for thumb, this gives:

  $ clang --target=arm-arm-none-eabi -march=armv7a -c test.c -o - -S -O1 -mthumb
  ...
  foo:
          .fnstart
  @ %bb.0:                                @ %entry
          .save   {r4, r5, r6, r7, lr}
          push    {r4, r5, r6, r7, lr}
          .setfp  r7, sp, #12
          add     r7, sp, #12
          .pad    #4
          sub     sp, #4
          movs    r1, #7
          add.w   r0, r1, r0, lsl #2
          bic     r0, r0, #7
          sub.w   r0, sp, r0
          mov     sp, r0
          @APP
          mov.w   r7, #1
          @NO_APP
          bl      bar
          adds    r0, #1
          sub.w   r4, r7, #12
          mov     sp, r4
          pop     {r4, r5, r6, r7, pc}
  ...

r7 is used as the frame pointer for thumb targets, and this function needs to restore the SP from the FP because of the variable-length stack allocation a. r7 is clobbered by the inline assembly (and r7 is included in the clobber list), but LLVM does not preserve the value of the frame pointer across the assembly block.

This type of behavior is similar to GCC's and has been discussed on the bugtracker: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=11807 . No consensus seemed to have been reached on the way forward. Clang behavior has briefly been discussed on the CFE mailing (starting here: http://lists.llvm.org/pipermail/cfe-dev/2018-July/058392.html). I've opted for following Eli Friedman's advice to print warnings when there are reserved registers on the clobber list so as not to diverge from GCC behavior for now.

The patch uses MachineRegisterInfo's target-specific knowledge of reserved registers, just before we convert the inline asm string in the AsmPrinter.

If we find a reserved register, we print a warning:

  repro.c:6:7: warning: inline asm clobber list contains reserved registers: R7 [-Winline-asm]
        "mov r7, #1"
        ^

Reviewers: efriedma, olista01, javed.absar

Reviewed By: efriedma

Subscribers: eraman, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D51165

llvm-svn: 341062
2018-08-30 12:52:35 +00:00
David Green
b3ee777d21 [AArch64] Optimise load(adr address) to ldr address
Providing that the load is known to be 4 byte aligned, we can optimise a
ldr(adr address) to just ldr address.

Differential Revision: https://reviews.llvm.org/D51030

llvm-svn: 341058
2018-08-30 11:55:16 +00:00
Andrea Di Biagio
38dbf57876 [llvm-mca] correctly initialize field 'CycleRetired' in the TimelineView.
This fixes a [-Wmissing-field-initializers] warning reported by buildbot
lld-x86_64-darwin13, build #25152.

llvm-svn: 341056
2018-08-30 11:17:58 +00:00
Andrea Di Biagio
7e5d9331c7 [llvm-mca] Report the number of dispatched micro opcodes in the DispatchStatistics view.
This patch introduces the following changes to the DispatchStatistics view:
 * DispatchStatistics now reports the number of dispatched opcodes instead of
   the number of dispatched instructions.
 * The "Dynamic Dispatch Stall Cycles" table now also reports the percentage of
   stall cycles against the total simulated cycles.

This change allows users to easily compare dispatch group sizes with the
processor DispatchWidth.
Before this change, it was difficult to correlate the two numbers, since
DispatchStatistics view reported numbers of instructions (instead of opcodes).
DispatchWidth defines the maximum size of a dispatch group in terms of number of
micro opcodes.

The other change introduced by this patch is related to how DispatchStage
generates "instruction dispatch" events.
In particular:
 * There can be multiple dispatch events associated with a same instruction
 * Each dispatch event now encapsulates the number of dispatched micro opcodes.

The number of micro opcodes declared by an instruction may exceed the processor
DispatchWidth. Therefore, we cannot assume that instructions are always fully
dispatched in a single cycle.
DispatchStage knows already how to handle instructions declaring a number of
opcodes bigger that DispatchWidth. However, DispatchStage always emitted a
single instruction dispatch event (during the first simulated dispatch cycle)
for instructions dispatched.

With this patch, DispatchStage now correctly notifies multiple dispatch events
for instructions that cannot be dispatched in a single cycle.

A few views had to be modified. Views can no longer assume that there can only
be one dispatch event per instruction.

Tests (and docs) have been updated.

Differential Revision: https://reviews.llvm.org/D51430

llvm-svn: 341055
2018-08-30 10:50:20 +00:00
Max Kazantsev
14e6f46852 [NFC] Whitespace fix
llvm-svn: 341054
2018-08-30 10:42:08 +00:00
Alex Bradbury
4e6903f1f9 [RISCV] Fix r341050
A few stray lines were accidentally committed. Remove these.

llvm-svn: 341053
2018-08-30 10:39:30 +00:00
Florian Hahn
1e64646e86 Fix "Q" and "R" inline assembly template modifiers for big-endian Arm
Consider the endianness of the target when printing register names.  This is in line with the documentation at http://llvm.org/docs/LangRef.html#asm-template-argument-modifiers

Patch by Jackson Woodruff <jackson.woodruff@arm.com>

Reviewers: t.p.northover, echristo, javed.absar, efriedma

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D49778

llvm-svn: 341052
2018-08-30 10:28:23 +00:00
Max Kazantsev
71232db34a [NFC] Add severe validation of InstructionPrecedenceTracking
llvm-svn: 341051
2018-08-30 10:26:06 +00:00
Alex Bradbury
49965fa8fa [RISCV][NFC] Rework CHECK lines in rvi-aliases-valid.s
Previously CHECK prefixes weren't defined that can be used to check _only_ the 
InstPrinter output when generating .s from llvm-mc, or that check _only_ the 
output after passing the generated object through objdump. This means we can't 
write useful checks for instructions that reference symbols.

Instead, use:
CHECK-S                 Match the .s output with aliases enabled
CHECK-S-NOALIAS         Match the .s output with aliases disabled
CHECK-OBJ               Match the objdumped object output with aliases enabled
CHECK-OBJ-NOALIAS       Match the objdumped object output with aliases enabled
CHECK-S-OBJ             Match both the .s and objdumped object output with
                        aliases enabled
CHECK-S-OBJ-NOALIAS     Match both the .s and objdumped object output with
                        aliases disabled

While we're at it, use whitespace consistently within this file.

llvm-svn: 341050
2018-08-30 10:25:27 +00:00
Roman Lebedev
a497211e01 Revert "[Hexagon][Test] Remove undef and infinite loop from test"
Bots are unhappy:

/Users/buildslave/jenkins/workspace/clang-stage1-cmake-RA-incremental/llvm/test/CodeGen/Hexagon/swp-const-tc2.ll:10:14: error: CHECK-NOT: excluded string found in input
; CHECK-NOT: = mpy
             ^
<stdin>:22:6: note: found here
 r5 += mpyi(r2,r3)
     ^~~~~

This reverts commit r341046.

llvm-svn: 341049
2018-08-30 10:01:03 +00:00
Roman Lebedev
35f00e690f [NFC][CodeGen][SelectionDAG] Tests for X % C == 0 codegen improvement.
Hacker's Delight 10-17: when C is constant,
the result of X % C == 0 can be computed more cheaply
without actually calculating the remainder.

The motivation is discussed here:
https://bugs.llvm.org/show_bug.cgi?id=35479.

Patch by: hermord (Dmytro Shynkevych)!

For https://reviews.llvm.org/D50222

llvm-svn: 341047
2018-08-30 09:32:21 +00:00
Roman Lebedev
3953710755 [Hexagon][Test] Remove undef and infinite loop from test
Summary:
As suggested in D50222, this has been refactored into a separate patch.

The undef and the infinite loop at the end cause this test to be translated
unpredictably. In particular, the checked-for `mpy` disappears under
certain legal optimizations (e.g. the one in D50222).
Since the use of these constructs is not relevant to the behavior tested,
according to the header comment, this change, suggested by @kparzysz,
eliminates them.

Patch by: hermord (Dmytro Shynkevych)!

Reviewers: kparzysz

Reviewed By: kparzysz

Subscribers: llvm-commits, kparzysz

Differential Revision: https://reviews.llvm.org/D50944

llvm-svn: 341046
2018-08-30 09:32:15 +00:00
Roman Lebedev
3ff355fa36 Revert "[CMake] Use LLVM_ENABLE_IDE instead of CMAKE_CONFIGURATION_TYPES"
That resulted in the check-llvm-* targets not being avaliable
in the QtCreator-configured build directories.

Moreover, that was a clearly non-NFC change, and i can't find any review
for it.

This reverts commit rL340435.

llvm-svn: 341045
2018-08-30 09:32:09 +00:00
Max Kazantsev
b83b70f6e9 [NFC] Rename map to make the naming consistent
llvm-svn: 341043
2018-08-30 09:24:33 +00:00
Dean Michael Berris
38e0dbcb65 [XRay] Help gcc disambiguate names
Follow-up to D51210.

llvm-svn: 341042
2018-08-30 09:04:12 +00:00
Dean Michael Berris
570f2b1225 [XRay] Move out template and use perfect forwarding
Follow up to D51210.

llvm-svn: 341032
2018-08-30 08:15:42 +00:00
Martin Storsjo
c6f797ac53 Revert "[SimplifyCFG] Common debug handling [NFC]"
This reverts commit r340997.

This change turned out not to be NFC after all, but e.g. causes
clang to crash when building the linux kernel for aarch64.

llvm-svn: 341031
2018-08-30 08:06:50 +00:00
Dean Michael Berris
6fd28ff058 [XRay] Remove attribute packed
Followup to D51210.

llvm-svn: 341030
2018-08-30 07:57:32 +00:00
Dean Michael Berris
dc767da403 [XRay] FDRTraceWriter and FDR Trace Loading
Summary:
This is the first step in the larger refactoring and reduction of
D50441.

This step in the process does the following:

- Introduces more granular types of `Record`s representing the many
  kinds of records written/read by the Flight Data Recorder (FDR) mode
  `Trace` loading function(s).

- Introduces an abstract `RecordVisitor` type meant to handle the
  processing of the various `Record` derived types. This `RecordVisitor`
  has two implementations in this patch: `RecordInitializer` and
  `FDRTraceWriter`.

- We also introduce a convenience interface for building a collection of
  `Record` instances called a `LogBuilder`. This allows us to generate
  sequences of `Record` instances manually (used in unit tests but
  useful otherwise).

- The`FDRTraceWriter` class implements the `RecordVisitor` interface and
  handles the writing of metadata records to a `raw_ostream`. We
  demonstrate that in the unit test, we can generate in-memory FDR mode
  traces using the specific `Record` derived types, which we load
  through the `loadTrace(...)` function yielding valid `Trace` objects.

This patch introduces the required types and concepts for us to start
replacing the logic implemented in the `loadFDRLog` function to use the
more granular types. In subsequent patches, we will introduce more
visitor implementations which isolate the verification, printing,
indexing, production/consumption, and finally the conversion of the FDR
mode logs.

The overarching goal of these changes is to make handling FDR mode logs
better tested, more understandable, more extensible, and more
systematic. This will also allow us to better represent the execution
trace, as we improve the fidelity of the events we represent in an XRay
`Trace` object, which we intend to do after FDR mode log processing is
in better shape.

Reviewers: eizan

Reviewed By: eizan

Subscribers: mgorny, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D51210

llvm-svn: 341029
2018-08-30 07:22:21 +00:00
Matt Arsenault
9c6d728552 Don't count debug instructions towards neighborhood count
In computeRegisterLiveness, the max instructions to search
was counting dbg_value instructions, which could potentially
cause an observable codegen change from the presence of debug
info.

llvm-svn: 341028
2018-08-30 07:18:19 +00:00
Matt Arsenault
f28136694b CodeGen: Make computeRegisterLiveness search forward first
If there is an unused def, this would previously
report that the register was live. Check for uses
first so that it is reported as dead if never used.

llvm-svn: 341027
2018-08-30 07:18:10 +00:00
Matt Arsenault
55014dafc8 CodeGen: Make computeRegisterLiveness consider successors
If the end of the block is reached during the scan, check
the live ins of the successors. This was already done in the
other direction if the block entry was reached.

llvm-svn: 341026
2018-08-30 07:17:51 +00:00
Carlos Alberto Enciso
b3643235a3 [DWARF] Missing location debug information with -O2.
Check that Machine CSE correctly handles during the transformation, the
debug location information for local variables.

Differential Revision: https://reviews.llvm.org/D50887

llvm-svn: 341025
2018-08-30 07:17:41 +00:00
Andrew V. Tischenko
dff9d04945 [X86] Improved sched model for X86 CMPXCHG* instructions.
Differential Revision: https://reviews.llvm.org/D50070 

llvm-svn: 341024
2018-08-30 06:26:00 +00:00
Craig Topper
a9fb877147 [InstCombine] Add test cases for D51398
These tests contain the pattern (neg (max ~X, C)) which we should transform to ((min X, ~C) + 1)

llvm-svn: 341023
2018-08-30 06:14:54 +00:00
Craig Topper
d094523cbe [X86] Make Feature64Bit useful
We now only add +64bit to the CPU string for "generic" CPU. All other CPU names are assumed to have the feature flag already set if they support 64-bit. I've remove the implies from CMPXCHG8 so that Feature64Bit only comes in via CPUs or user passing -mattr=+64bit.

I've changed the assert to a report_fatal_error so it's not lost in Release builds.

The test updates are to fix things that tripped the new error.

Differential Revision: https://reviews.llvm.org/D51231

llvm-svn: 341022
2018-08-30 06:01:05 +00:00
Craig Topper
1baef1296f [X86] Update test command line to not use 64-bit mode on a 32-bit only athlon cpu.
llvm-svn: 341021
2018-08-30 06:01:03 +00:00
Craig Topper
cf2055bced [X86] Remove powerpc cpu name and features from uwtables.ll
llvm-svn: 341020
2018-08-30 06:01:01 +00:00
Matt Arsenault
b04c5924df DAG: Don't use ABI copies in some contexts
If an ABI-like value is used in a different block,
the type split used is not necessarily the same as
the call's ABI. The value is used through an intermediate
copy virtual registers from the other block. This
resulted in copies with inconsistent sizes later.

Fixes regressions since r338197 when AMDGPU started
splitting vector types for calls.

llvm-svn: 341018
2018-08-30 05:49:28 +00:00
Max Kazantsev
12bc747451 [NFC] Move OrderedInstructions and InstructionPrecedenceTracking to Analysis
These classes don't make any changes to IR and have no reason to be in
Transform/Utils. This patch moves them to Analysis folder. This will allow
us reusing these classes in some analyzes, like MustExecute.

llvm-svn: 341015
2018-08-30 04:49:03 +00:00
Max Kazantsev
09f3c2d133 Re-enable "[NFC] Unify guards detection"
rL340921 has been reverted by rL340923 due to linkage dependency
from Transform/Utils to Analysis which is not allowed. In this patch
this has been fixed, a new utility function moved to Analysis.

Differential Revision: https://reviews.llvm.org/D51152

llvm-svn: 341014
2018-08-30 03:39:16 +00:00
Dean Michael Berris
a9b91bad26 [XRay][llvm] Load XRay Profiles
Summary:
This change implements the profile loading functionality in LLVM to
support XRay's profiling mode in compiler-rt.

We introduce a type named `llvm::xray::Profile` which allows building a
profile representation. We can load an XRay profile from a file to build
Profile instances, or do it manually through the Profile type's API.

The intent is to get the `llvm-xray` tool to generate `Profile`
instances and use that as the common abstraction through which all
conversion and analysis can be done. In the future we can generate
`Profile` instances from `Trace` instances as well, through conversion
functions.

Some of the key operations supported by the `Profile` API are:

- Path interning (`Profile::internPath(...)`) which returns a unique path
  identifier.

- Block appending (`Profile::addBlock(...)`) to add thread-associated
  profile information.

- Path ID to Path lookup (`Profile::expandPath(...)`) to look up a
  PathID and return the original interned path.

- Block iteration.

A 'Path' in this context represents the function call stack in
leaf-to-root order. This is represented as a path in an internally
managed prefix tree in the `Profile` instance. Having a handle (PathID)
to identify the unique Paths we encounter for a particular Profile
allows us to reduce the amount of memory required to associate profile
data to a particular Path.

This is the first of a series of patches to migrate the `llvm-stacks`
tool towards using a single profile representation.

Depends on D48653.

Reviewers: kpw, eizan

Reviewed By: kpw

Subscribers: kpw, thakis, mgorny, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D48370

llvm-svn: 341012
2018-08-30 01:43:22 +00:00
Sam Clegg
5e06000233 [WebAssembly] Be a little more conservative in WebAssemblyFixFunctionBitcasts
We don't have enough information to know if struct types being
bitcast will cause validation failures or not, so be conservative
and allow such cases to persist (fot now).

Fixes: https://bugs.llvm.org/show_bug.cgi?id=38711

Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D51460

llvm-svn: 341010
2018-08-30 01:01:30 +00:00
Huihui Zhang
d0b6fb04cd [GlobalMerge] Fix GlobalMerge on bss external global variables.
Summary:
Global variables that are external and zero initialized are
supposed to be merged with global variables in the bss section
rather than the data section.

Reviewers: efriedma, rengolin, t.p.northover, javed.absar, asl, john.brawn, pcc

Reviewed By: efriedma

Subscribers: dmgreen, llvm-commits

Differential Revision: https://reviews.llvm.org/D51379

llvm-svn: 341008
2018-08-30 00:49:50 +00:00
Philip Reames
7247cd2d49 [SimplifyCFG] Rename a variable for readibility of a future change [NFC]
llvm-svn: 341004
2018-08-30 00:12:29 +00:00
Philip Reames
457e69f814 [SimplifyCFG] Fix a cost modeling oversight in branch commoning
The cost modeling was not accounting for the fact we were duplicating the instruction once per predecessor.  With a default threshold of 1, this meant we were actually creating #pred copies.

Adding to the fun, there is *absolutely no* test coverage for this.  Simply bailing for more than one predecessor passes all checked in tests.

llvm-svn: 341001
2018-08-30 00:03:02 +00:00
Zachary Turner
696ab67afc [MS Demangler] Fix several crashes and demangling bugs.
These bugs were found by writing a Python script which spidered
the entire Chromium build directory tree demangling every symbol
in every object file.  At the start, the tool printed:

  Processed 27443 object files.
  2926377/2936108 symbols successfully demangled (99.6686%)
  9731 symbols could not be demangled (0.3314%)
  14589 files crashed while demangling (53.1611%)

After this patch, it prints:

  Processed 27443 object files.
  41295518/41295617 symbols successfully demangled (99.9998%)
  99 symbols could not be demangled (0.0002%)
  0 files crashed while demangling (0.0000%)

The issues fixed in this patch are:

  * Ignore empty parameter packs.  Previously we would encounter
    a mangling for an empty parameter pack and add a null node
    to the AST.  Since we don't print these anyway, we now just
    don't add anything to the AST and ignore it entirely.  This
    fixes some of the crashes.

  * Account for "incorrect" string literal demanglings.  Apparently
    an older version of clang would not truncate mangled string
    literals to 32 bytes of encoded character data.  The demangling
    code however would allocate a 32 byte buffer thinking that it
    would not encounter more than this, and overrun the buffer.
    We now demangle up to 128 bytes of data, since the buggy
    clang would encode up to 32 *characters* of data.

  * Extended support for demangling init-fini stubs.  If you had
    something like
      struct Foo {
        static vector<string> S;
      };
    this would generate a dynamic atexit initializer *for the
    variable*.  We didn't handle this, but now we print something
    nice.  This is actually an improvement over undname, which will
    fail to demangle this at all.

  * Fixed one case of static this adjustment.  We weren't handling
    several thunk codes so we didn't recognize the mangling.  These
    are now handled.

  * Fixed a back-referencing problem.  Member pointer templates
    should have their components considered for back-referencing

The remaining 99 symbols which can't be demangled are all symbols
which are compiler-generated and undname can't demangle either.

llvm-svn: 341000
2018-08-29 23:56:09 +00:00
Eli Friedman
f9565a1015 [NFC] Make getPreferredAlignment honor section markings.
This should more accurately reflect what the AsmPrinter will actually
do.

This is NFC, as far as I can tell; all the places that might be affected
already have an extra check to avoid using the result of
getPreferredAlignment in this situation.

Differential Revision: https://reviews.llvm.org/D51377

llvm-svn: 340999
2018-08-29 23:46:26 +00:00
Philip Reames
4b33425c7d [SimplifyCFG] Common debug handling [NFC]
llvm-svn: 340997
2018-08-29 23:22:07 +00:00
Jordan Rupprecht
1fea6bcbb3 [llvm-strip] Fix -p|--preserve-dates to not truncate output when used in-place.
The restoreDateOnFile() method used to preserve dates uses sys::fs::openFileForWrite(). That method defaults to opening files with CD_CreateAlways, which truncates the output file if it exists. Use CD_OpenExisting instead to open it and *not* truncate it, which also has the side benefit of erroring if the file does not exist (it should always exist, because we just wrote it out).

Also, fix the test case to make sure the output is a valid output file, and not empty. The extra test assertions are enough to catch this regression.

llvm-svn: 340996
2018-08-29 23:21:56 +00:00
Alina Sbirlea
394fd0adc9 [MemorySSA] Silence warning.
llvm-svn: 340995
2018-08-29 23:20:29 +00:00
Matthias Braun
a9707dee3c Reverse subregister saved loops in register usage info collector; NFC
On AMDGPU we have 70 register classes, so iterating over all 70
each time and exiting is costly on the CPU, this flips the loop
around so that it loops over the 70 register classes first,
and exits without doing the inner loop if needed.

On my test just starting radv this takes
RegUsageInfoCollector::runOnMachineFunction
from 6.0% of total time to 2.7% of total time,
and reduces the startup from 2.24s to 2.19s

Patch by David Airlie!

Differential Revision: https://reviews.llvm.org/D48582

llvm-svn: 340993
2018-08-29 23:12:42 +00:00
Reid Kleckner
ddf31c570a Revert r340947 "[InstCombine] Expand the simplification of pow() into exp2()"
It broke the clang-cl self-host.

llvm-svn: 340991
2018-08-29 22:58:33 +00:00
Alina Sbirlea
99831b1f8e [MemorySSA] Fix checkClobberSanity to skip Start only for Defs and Uses.
llvm-svn: 340981
2018-08-29 22:38:51 +00:00
Philip Reames
b57d5d0305 Add a todo and tests to Address a review commnt from D50925 [NFC]
llvm-svn: 340978
2018-08-29 22:09:21 +00:00