Chris Lattner
378faeecc8
when legalizing extremely wide shifts, make sure that
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the shift amounts are in a suitably wide type so that
we don't generate out of range constant shift amounts.
This fixes PR9028.
llvm-svn: 125458
2011-02-13 09:10:56 +00:00
Evan Cheng
5a42a6a20f
After 3-addressifying a two-address instruction, update the register maps; add a missing check when considering whether it's profitable to commute. rdar://8977508.
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llvm-svn: 125259
2011-02-10 02:20:55 +00:00
Devang Patel
46db608b81
Reduce test case, smaller is better.
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llvm-svn: 125019
2011-02-07 18:24:18 +00:00
NAKAMURA Takumi
07a84f5950
Target/X86: Tweak allocating shadow area (aka home) on Win64. It must be enough for caller to allocate one.
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llvm-svn: 124949
2011-02-05 15:11:32 +00:00
Devang Patel
930b4b16a1
Merge .debug_loc entries whenever possible to reduce debug_loc size.
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llvm-svn: 124904
2011-02-04 22:57:18 +00:00
Nick Lewycky
a4f2b5a934
Mark that the return is using EAX so that we don't use it for some other
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purpose. Fixes PR9080!
llvm-svn: 124903
2011-02-04 22:44:08 +00:00
Devang Patel
a586bb8ecd
DebugLoc associated with a machine instruction is used to emit location entries. DebugLoc associated with a DBG_VALUE is used to identify lexical scope of the variable. After register allocation, while inserting DBG_VALUE remember original debug location for the first instruction and reuse it, otherwise dwarf writer may be mislead in identifying the variable's scope.
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llvm-svn: 124845
2011-02-04 01:43:25 +00:00
Rafael Espindola
b0a802c8bf
Add -march to fix the bots.
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llvm-svn: 124774
2011-02-03 04:21:01 +00:00
Rafael Espindola
5bfba89832
Fix PR9127 by reversing the operands even if they have more then one use.
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Reversing the operands allows us to fold, but doesn't force us to. Also, at
this point the DAG is still being optimized, so the check for hasOneUse is not
very precise.
llvm-svn: 124773
2011-02-03 03:58:05 +00:00
Devang Patel
97c467ee47
Keep track of incoming argument's location while emitting LiveIns.
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llvm-svn: 124611
2011-01-31 21:38:14 +00:00
Benjamin Kramer
6b3c3de09a
Teach DAGCombine to fold fold (sra (trunc (sr x, c1)), c2) -> (trunc (sra x, c1+c2) when c1 equals the amount of bits that are truncated off.
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This happens all the time when a smul is promoted to a larger type.
On x86-64 we now compile "int test(int x) { return x/10; }" into
movslq %edi, %rax
imulq $1717986919, %rax, %rax
movq %rax, %rcx
shrq $63, %rcx
sarq $34, %rax <- used to be "shrq $32, %rax; sarl $2, %eax"
addl %ecx, %eax
This fires 96 times in gcc.c on x86-64.
llvm-svn: 124559
2011-01-30 16:38:43 +00:00
Evan Cheng
4af5487b74
Re-apply r124518 with fix. Watch out for invalidated iterator.
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llvm-svn: 124526
2011-01-29 04:46:23 +00:00
Evan Cheng
1f943b9b13
Revert r124518. It broke Linux self-host.
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llvm-svn: 124522
2011-01-29 02:43:04 +00:00
Evan Cheng
a1e4cb5f09
Re-commit r124462 with fixes. Tail recursion elim will now dup ret into unconditional predecessor to enable TCE on demand.
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llvm-svn: 124518
2011-01-29 01:29:26 +00:00
Evan Cheng
5b6c72e549
Revert r124462. There are a few big regressions that I need to fix first.
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llvm-svn: 124478
2011-01-28 07:12:38 +00:00
Rafael Espindola
d93551f227
Add a triple.
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llvm-svn: 124471
2011-01-28 03:57:55 +00:00
Rafael Espindola
9bc19ee478
Print the visibility of declarations.
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llvm-svn: 124468
2011-01-28 03:20:10 +00:00
Evan Cheng
7031f450b3
- Stop simplifycfg from duplicating "ret" instructions into unconditional
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branches. PR8575, rdar://5134905, rdar://8911460.
- Allow codegen tail duplication to dup small return blocks after register
allocation is done.
llvm-svn: 124462
2011-01-28 02:19:21 +00:00
NAKAMURA Takumi
8ace7260cc
Target/X86: Tweak win64's tailcall.
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llvm-svn: 124272
2011-01-26 02:04:09 +00:00
NAKAMURA Takumi
066378440a
Fix whitespace.
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llvm-svn: 124270
2011-01-26 02:03:37 +00:00
Devang Patel
fce915414e
Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic.
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llvm-svn: 124203
2011-01-25 18:09:58 +00:00
Devang Patel
431a9b9c2f
Speculatively revert r124138.
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llvm-svn: 124142
2011-01-24 20:04:37 +00:00
Devang Patel
5ccc4e884c
Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic.
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llvm-svn: 124138
2011-01-24 19:24:37 +00:00
Chris Lattner
9ba0a83f2b
fix a missing shuffle pattern, PR9009. Patch by Artiom Myaskouvskey!
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llvm-svn: 124102
2011-01-24 03:42:46 +00:00
Eric Christopher
f7579ff174
Expand invalid return values for umulo and smulo. Handle these similarly
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to add/sub by doing the normal operation and then checking for overflow
afterwards. This generally relies on the DAG handling the later invalid
operations as well.
Fixes the 64-bit part of rdar://8622122 and rdar://8774702.
llvm-svn: 123908
2011-01-20 08:54:28 +00:00
Benjamin Kramer
869dc645f1
Fix an off-by-one error in ctpop combining.
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llvm-svn: 123664
2011-01-17 18:00:28 +00:00
Benjamin Kramer
e9488ed8eb
Add a DAGCombine to turn (ctpop x) u< 2 into (x & x-1) == 0.
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This shaves off 4 popcounts from the hacked 186.crafty source.
This is enabled even when a native popcount instruction is available. The
combined code is one operation longer but it should be faster nevertheless.
llvm-svn: 123621
2011-01-17 12:04:57 +00:00
Rafael Espindola
9afb7af08a
Update tests.
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llvm-svn: 123591
2011-01-16 18:02:57 +00:00
Chris Lattner
dde85de90f
fix PR8514, a bug where the "heroic" transformation of shift/and
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into and/shift would cause nodes to move around and a dangling pointer
to happen. The code tried to avoid this with a HandleSDNode, but
got the details wrong.
llvm-svn: 123578
2011-01-16 08:48:11 +00:00
Chris Lattner
24ea7f696e
fix PR8981, a crash trying to form a conditional inc with a floating point compare.
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llvm-svn: 123560
2011-01-16 02:56:53 +00:00
Chris Lattner
c4d1d86d3e
reapply my fix for PR8961 with a tweak to properly handle
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multi-instruction sequences like calls. Many thanks to Jakob for
finding a testcase.
llvm-svn: 123559
2011-01-16 02:27:38 +00:00
Chris Lattner
eba719204c
revert my fastisel patch again which apparently still gives the
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llvm-gcc-i386-linux-selfhost buildbot heartburn...
llvm-svn: 123431
2011-01-14 06:14:33 +00:00
Chris Lattner
ee950eeb24
reapply r123414 now that the botz are calmed down and the fix is already in.
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llvm-svn: 123427
2011-01-14 04:24:28 +00:00
Chris Lattner
349735530b
r123414 broke llvm-gcc bootstrap apparently, revert
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llvm-svn: 123422
2011-01-14 02:07:32 +00:00
Chris Lattner
5baec05809
fix PR8961 - a fast isel miscompilation where we'd insert a new instruction
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after sext's generated for addressing that got folded. Previously we compiled
test5 into:
_test5: ## @test5
## BB#0:
movq -8(%rsp), %rax ## 8-byte Reload
movq (%rdi,%rax), %rdi
addq %rdx, %rdi
movslq %esi, %rax
movq %rax, -8(%rsp) ## 8-byte Spill
movq %rdi, %rax
ret
which is insane and wrong. Now we produce:
_test5: ## @test5
## BB#0:
movslq %esi, %rax
movq (%rdi,%rax), %rax
addq %rdx, %rax
ret
llvm-svn: 123414
2011-01-14 00:01:01 +00:00
Eric Christopher
3821f63f4b
Experiment with changing the default 32-bit linux stack alignment to
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16 bytes for PR8969. Update all testcases accordingly.
llvm-svn: 123367
2011-01-13 06:47:10 +00:00
Jakob Stoklund Olesen
3987889b61
Try again enabling LiveDebugVariables.
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llvm-svn: 123342
2011-01-12 23:36:21 +00:00
Jakob Stoklund Olesen
1f7052b53b
The world is not ready for LiveDebugVariables yet.
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llvm-svn: 123290
2011-01-11 23:20:33 +00:00
Jakob Stoklund Olesen
d7a523358c
Enable LiveDebugVariables by default.
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llvm-svn: 123282
2011-01-11 22:45:28 +00:00
Dale Johannesen
cd78621861
Fix PR 8916 (qv for analysis), at least the immediate problem.
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There's an inherent tension in DAGCombine between assuming
that things will be put in canonical form, and the Depth
mechanism that disables transformations when recursion gets
too deep. It would not surprise me if there's a lot of little
bugs like this one waiting to be discovered. The mechanism
seems fragile and I'd suggest looking at it from a design viewpoint.
llvm-svn: 123191
2011-01-10 21:53:07 +00:00
Evan Cheng
1afd04fc59
Recognize inline asm 'rev /bin/bash, ' as a bswap intrinsic call.
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llvm-svn: 123048
2011-01-08 01:24:27 +00:00
Evan Cheng
aa16fd02ad
Do not model all INLINEASM instructions as having unmodelled side effects.
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Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.
This allows memory instructions to be moved around INLINEASM instructions.
llvm-svn: 123044
2011-01-07 23:50:32 +00:00
Devang Patel
d3ba97949a
Speculatively revert r123032.
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llvm-svn: 123039
2011-01-07 22:33:41 +00:00
Devang Patel
a52d6c216d
Appropriately truncate debug info range in dwarf output.
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Enable live debug variables pass.
llvm-svn: 123032
2011-01-07 21:30:41 +00:00
Evan Cheng
ae26b91353
Revert r122955. It seems using movups to lower memcpy can cause massive regression (even on Nehalem) in edge cases. I also didn't see any real performance benefit.
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llvm-svn: 123015
2011-01-07 19:35:30 +00:00
Benjamin Kramer
a842a10fc1
Try to unbreak the arm buildbot.
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llvm-svn: 122999
2011-01-07 11:35:21 +00:00
Duncan Sands
06444485ee
Fix the other problem reported in PR8582. Testcase and patch by
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Nadav Rotem.
llvm-svn: 122983
2011-01-06 23:45:22 +00:00
Evan Cheng
1a1771584e
Use movups to lower memcpy and memset even if it's not fast (like corei7).
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The theory is it's still faster than a pair of movq / a quad of movl. This
will probably hurt older chips like P4 but should run faster on current
and future Intel processors. rdar://8817010
llvm-svn: 122955
2011-01-06 07:58:36 +00:00
Evan Cheng
cb39cc2164
Re-implement r122936 with proper target hooks. Now getMaxStoresPerMemcpy
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etc. takes an option OptSize. If OptSize is true, it would return
the inline limit for functions with attribute OptSize.
llvm-svn: 122952
2011-01-06 06:52:41 +00:00
Evan Cheng
70711ea54d
Revert r122936. I'll re-implement the change.
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llvm-svn: 122949
2011-01-06 06:17:53 +00:00