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Author SHA1 Message Date
Chris Lattner
385977c252 remove asmparser support for the old getresult instruction, which has been subsumed by extractvalue. 
llvm-svn: 133247
 2011-06-17 06:57:15 +00:00
Chris Lattner
9e7c036d09 remove parser support for the obsolete "multiple return values" syntax, which 
was replaced with return of a "first class aggregate".

llvm-svn: 133245
 2011-06-17 06:49:41 +00:00
Chris Lattner
17983fc4ba stop accepting begin/end around function bodies in the .ll parser, this isn't pascal anymore. 
llvm-svn: 133244
 2011-06-17 06:42:57 +00:00
Chris Lattner
4eb6f76fa6 Remove support for using "foo" as symbols instead of %"foo". This is ancient 
syntax and has been long obsolete.  As usual, updating the tests is the nasty
part of this.

llvm-svn: 133242
 2011-06-17 06:36:20 +00:00
Rafael Espindola
7adb7e304b Enable early duplication of small blocks. There are still improvements to 
be made, but this is already a win.

llvm-svn: 133240
 2011-06-17 05:54:50 +00:00
Jakob Stoklund Olesen
626abc2bc3 Allocate SystemZ callee-saved registers backwards: R13-R6 
The reserved R14-R15 are always saved in the prolog, and using CSRs
starting from R13 allows them to be saved in one instruction.

Thanks to Anton for explaining this.

llvm-svn: 133233
 2011-06-17 03:47:30 +00:00
Chris Lattner
0824241aef Remove old backwards compatibility support from the parser for autoupgrading 
the old malloc/free instructions, and for 'sext' and 'zext' as function 
attributes (they are spelled signext/zeroext now), and support for result
value attributes being specified after a function.

Additionally, diagnose invalid attributes on functions with an error message
instead of an abort in the verifier.

llvm-svn: 133229
 2011-06-17 03:16:47 +00:00
Chris Lattner
9ec82f54d4 manually upgrade a bunch of tests to modern syntax, and remove some that 
are either unreduced or only test old syntax.

llvm-svn: 133228
 2011-06-17 03:14:27 +00:00
Cameron Zwarich
681f02ec26 Update an insertion point iterator after replacing a return instruction with a 
tail call pseudoinstruction. This fixes <rdar://problem/9624333>.

llvm-svn: 133227
 2011-06-17 02:16:43 +00:00
Jakob Stoklund Olesen
f9a3743f76 Explicitly invoke ArrayRef constructor to keep gcc happy. 
Patch by Richard Smith!

llvm-svn: 133220
 2011-06-17 00:18:25 +00:00
Jakob Stoklund Olesen
c185689b5c Rename TRI::getAllocationOrder() to getRawAllocationOrder(). 
Also switch the return type to ArrayRef<unsigned> which works out nicely
for ARM's implementation of this function because of the clever ArrayRef
constructors.

The name change indicates that the returned allocation order may contain
reserved registers as has been the case for a while.

llvm-svn: 133216
 2011-06-16 23:31:16 +00:00
Jakob Stoklund Olesen
91874697b3 Don't use register classes larger than TLI->getRegClassFor(VT). 
In Thumb mode we cannot handle GPR virtual registers, even though some
instructions can. When isel is lowering a CopyFromReg, it should limit
itself to subclasses of getRegClassFor(VT).

<rdar://problem/9624323>

llvm-svn: 133210
 2011-06-16 22:50:38 +00:00
Daniel Dunbar
4bbb5c8546 Regenerate configure. 
llvm-svn: 133207
 2011-06-16 22:30:41 +00:00
Daniel Dunbar
c8ac4fdd6d build/configure: Add support for --with-extra-ld-options flag (to provide extra 
options just to pass to ld).

llvm-svn: 133206
 2011-06-16 22:30:38 +00:00
Andrew Trick
30248d290d Added LLVM_BUILD_MODE to cmake so that lit supports tests with REQUIRES: {buildmode}. 
llvm-svn: 133205
 2011-06-16 22:19:20 +00:00
Jakob Stoklund Olesen
36ac2b0ece Teach antidependency breakers to use RegisterClassInfo. 
No functional change was intended.

llvm-svn: 133202
 2011-06-16 21:56:21 +00:00
Chris Lattner
59d895657b forward declare GraphTraits in Type.h instead of #includ'ing it. 
llvm-svn: 133201
 2011-06-16 21:49:23 +00:00
Andrew Trick
4d5f2bdf61 cmake may require LIT_TOOLS_DIR. 
Reviewed by chapuni. Sorry for breaking.

llvm-svn: 133200
 2011-06-16 21:48:57 +00:00
Chris Lattner
024b713434 change Type.h to forward declare ArrayRef instead of #including it. 
llvm-svn: 133197
 2011-06-16 21:37:15 +00:00
Chris Lattner
ed5c981e6f add some #includes that will soon be needed. 
llvm-svn: 133195
 2011-06-16 21:36:36 +00:00
Chris Lattner
29d631bcf3 prune #includes. 
llvm-svn: 133194
 2011-06-16 21:27:52 +00:00
Chris Lattner
b235992acc move the address space into the subclass data field, saving a word on PointerType. 
This limits the # address spaces to 2^23, which should be good enough.

llvm-svn: 133192
 2011-06-16 21:17:17 +00:00
Chris Lattner
e266e33a4b tidy up some comments, store the 'isvararg' bit for FunctionType in 
the SubclassData field, saving a word.

llvm-svn: 133191
 2011-06-16 21:08:21 +00:00
Chris Lattner
1c22baaf6c remove Type::getVAArgsPromotedType, which is dead, and tidy up a bit. 
llvm-svn: 133190
 2011-06-16 21:00:43 +00:00
Nick Lewycky
ba962a7115 There's no need to be so picky about the particular register. 
llvm-svn: 133189
 2011-06-16 21:00:00 +00:00
Dan Gohman
c9b4620575 Fix ARCOpt to insert releases on both successors of an invoke rather 
than trying to insert them immediately after the invoke.

llvm-svn: 133188
 2011-06-16 20:57:14 +00:00
Jakob Stoklund Olesen
548535e6d7 Move PBQP off allocation_order_begin. No functional change intended. 
I think PBQP could use RegisterClassInfo, but it didn't fit neatly with
the external interfaces that PBQP uses, so I'll leave that to Lang.

llvm-svn: 133186
 2011-06-16 20:37:45 +00:00
Jakub Staszak
5c7b7d64ba Introduce MachineBranchProbabilityInfo class, which has similar API to 
BranchProbabilityInfo (expect setEdgeWeight which is not available here).
Branch Weights are kept in MachineBasicBlocks. To turn off this analysis
set -use-mbpi=false.

llvm-svn: 133184
 2011-06-16 20:22:37 +00:00
Owen Anderson
c79aec8247 Change the REG_SEQUENCE SDNode to take an explict register class ID as its first operand. This operand is lowered away by the time we reach MachineInstrs, so the actual register-allocation handling of them doesn't need to change. 
This is intended to support using REG_SEQUENCE SDNode's with type MVT::untyped, and is part of the long road to eliminating some of the hacks we currently use to support register pairs and other strange constraints, particularly on ARM NEON.

llvm-svn: 133178
 2011-06-16 18:17:13 +00:00
Jakob Stoklund Olesen
7e56e59d68 Switch linear scan to using RegisterClassInfo. 
This avoids the manual filtering of reserved registers and removes the
dependency on allocation_order_begin().

Palliative care...

llvm-svn: 133177
 2011-06-16 18:17:00 +00:00
Galina Kistanova
aff6b72fc4 Move test for appropriate directory. 
llvm-svn: 133176
 2011-06-16 18:13:57 +00:00
Bruno Cardoso Lopes
8df123273d Mark ldrexd/strexd w/ volatile memory by default 
llvm-svn: 133175
 2011-06-16 18:11:32 +00:00
Jakub Staszak
fa3da986fa Test commit. 
llvm-svn: 133174
 2011-06-16 18:01:17 +00:00
Justin Holewinski
32a7bad9db PTX: Finish new calling convention implementation 
llvm-svn: 133172
 2011-06-16 17:50:00 +00:00
Justin Holewinski
a8d46115ce PTX: Rename register classes for readability and combine int and fp registers 
llvm-svn: 133171
 2011-06-16 17:49:58 +00:00
Jakob Stoklund Olesen
3bf75a3861 Add TargetRegisterInfo::getRawAllocationOrder(). 
This virtual function will replace allocation_order_begin/end as the one
to override when implementing custom allocation orders. It is simpler to
have one function return an ArrayRef than having two virtual functions
computing different ends of the same array.

Use getRawAllocationOrder() in place of allocation_order_begin() where
it makes sense, but leave some clients that look like they really want
the filtered allocation orders from RegisterClassInfo.

llvm-svn: 133170
 2011-06-16 17:42:25 +00:00
Nick Lewycky
86d55c2e39 Add testcase for r133050 which added support for printing and parsing escaped 
names for named metadata nodes.

llvm-svn: 133166
 2011-06-16 17:14:38 +00:00
Owen Anderson
a9bf21548f Fix formatting. 
llvm-svn: 133164
 2011-06-16 16:52:24 +00:00
Dan Gohman
6251ddaa83 Document nonlazybind. 
llvm-svn: 133160
 2011-06-16 16:03:13 +00:00
Dan Gohman
4762d28ff9 Add a comment describing why transforming (shl x, 1) to (add x, x) is to be 
considered safe enough in this context.

llvm-svn: 133159
 2011-06-16 15:55:48 +00:00
Justin Holewinski
94bacb9ece PTX: Fix whitespace errors 
llvm-svn: 133158
 2011-06-16 15:17:11 +00:00
Bruno Cardoso Lopes
f52f4dd0b8 Add AVX suport for fpextend. 
Original patch by Syoyo Fujita with more comments by me.

llvm-svn: 133153
 2011-06-16 07:03:21 +00:00
Jakob Stoklund Olesen
ba7bfc5c85 Prempt some obnoxious compiler from complaing about signed/unsigned 
compares.

2^30 is actually the limit on the number of physical registers per
TargetRegisterInfo.h.

llvm-svn: 133142
 2011-06-16 03:07:40 +00:00
Jakob Stoklund Olesen
55ebec6b47 Make sure to pass an unsigned to a printf format that is always %u. 
This should unbreak the native ARM testers.

llvm-svn: 133141
 2011-06-16 02:55:56 +00:00
Eli Friedman
4594e0f01a FileCheck-ize test, and make it work on EABI hosts, like clang-native-arm-cortex-a9. 
llvm-svn: 133139
 2011-06-16 02:36:32 +00:00
Eli Friedman
014d4feac5 Force a triple here so this test doesn't fail on EABI hosts (like clang-native-arm-cortex-a9). 
llvm-svn: 133134
 2011-06-16 01:49:31 +00:00
Nick Lewycky
c62f935caf Commit the right set of tests for r133124. Sorry 'bout that! 
llvm-svn: 133133
 2011-06-16 01:35:45 +00:00
Andrew Trick
8c37d99180 Reenabling this test with REQUIRES: Asserts 
llvm-svn: 133132
 2011-06-16 01:34:41 +00:00
Andrew Trick
5aee539bad Add support to lit for build mode requirements. e.g. 
REQUIRES: Asserts
REQUIRES: Debug

This required chaining test configuration properties. It seems like a
generally good thing to do.

llvm-svn: 133131
 2011-06-16 01:33:35 +00:00
Chad Rosier
26513932a2 Typos. 
llvm-svn: 133128
 2011-06-16 01:24:24 +00:00