RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-30 15:32:52 +01:00
Code Issues Projects Releases Wiki Activity
20,513 Commits 4 Branches 5 Tags 704 MiB
393200c3c6
Commit Graph

20513 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Chris Lattner
21c3cf756f Fix a powerpc crash on CodeGen/Generic/llvm-ct-intrinsics.ll 
llvm-svn: 23694
 2005-10-11 17:56:34 +00:00
Chris Lattner
e6fcb88ad1 Add a canonicalization that got lost, fixing PowerPC/fold-li.ll:SUB 
llvm-svn: 23693
 2005-10-11 06:07:15 +00:00
Chris Lattner
1441e42e56 clean up some corner cases 
llvm-svn: 23692
 2005-10-10 23:00:08 +00:00
Chris Lattner
5308a566ba Implement trivial DSE. If two stores are neighbors and store to the same 
location, replace them with a new store of the last value.  This occurs
in the same neighborhood in 197.parser, speeding it up about 1.5%

llvm-svn: 23691
 2005-10-10 22:31:19 +00:00
Chris Lattner
1c60abe065 Add support for CombineTo, allowing the dag combiner to replace nodes with 
multiple results.

Use this support to implement trivial store->load forwarding, implementing
CodeGen/PowerPC/store-load-fwd.ll.  Though this is the most simple case and
can be extended in the future, it is still useful.  For example, it speeds
up 197.parser by 6.2% by avoiding an LSU reject in xalloc:

        stw r6, lo16(l5_end_of_array)(r2)
        addi r2, r5, -4
        stwx r5, r4, r2
-       lwzx r5, r4, r2
-       rlwinm r5, r5, 0, 0, 30
        stwx r5, r4, r2
        lwz r2, -4(r4)
        ori r2, r2, 1

llvm-svn: 23690
 2005-10-10 22:04:48 +00:00
Chris Lattner
8290d31c12 new testcase 
llvm-svn: 23689
 2005-10-10 21:57:37 +00:00
Nate Begeman
703c8f57d6 Teach the DAGCombiner several new tricks, teaching it how to turn 
sext_inreg into zext_inreg based on the signbit (fires a lot), srem into
urem, etc.

llvm-svn: 23688
 2005-10-10 21:26:48 +00:00
Chris Lattner
e4634f54f1 A testcase sitting in my tree 
llvm-svn: 23687
 2005-10-10 21:21:36 +00:00
Chris Lattner
caed5bc79b Fix comment 
llvm-svn: 23686
 2005-10-10 16:52:03 +00:00
Chris Lattner
58f0f21ed1 Add ISD::ADD to MaskedValueIsZero 
llvm-svn: 23685
 2005-10-10 16:51:40 +00:00
Chris Lattner
5b6e18d6fd This function is now dead 
llvm-svn: 23684
 2005-10-10 16:49:22 +00:00
Chris Lattner
29613bce04 Enable Nate's excellent DAG combiner work by default. This allows the 
removal of a bunch of ad-hoc and crufty code from SelectionDAG.cpp.

llvm-svn: 23682
 2005-10-10 16:47:10 +00:00
Chris Lattner
1a77897107 These definitions have been moved to common code. 
llvm-svn: 23681
 2005-10-10 06:01:00 +00:00
Chris Lattner
2b9c260832 Pull DAG ISel generation nodes out of the PowerPC backend to where they 
can be used by other targets.  For those targets that want to use it,
have at.  :)

llvm-svn: 23680
 2005-10-10 06:00:30 +00:00
Chris Lattner
097b306215 add a todo for something I noticed 
llvm-svn: 23679
 2005-10-09 22:59:08 +00:00
Chris Lattner
d0eecf4e64 (X & Y) & C == 0 if either X&C or Y&C are zero 
llvm-svn: 23678
 2005-10-09 22:12:36 +00:00
Chris Lattner
1809933a31 Make MaskedValueIsZero a bit more aggressive 
llvm-svn: 23677
 2005-10-09 22:08:50 +00:00
Andrew Lenharth
bfa54fe229 This seems useful from the original patch that added the function. If there is a reason it is not useful on a RISC type target, let me know and I will pull it out 
llvm-svn: 23676
 2005-10-09 20:11:35 +00:00
Chris Lattner
d4ff47daf6 Fix funky xcode indentation 
llvm-svn: 23674
 2005-10-09 06:36:35 +00:00
Chris Lattner
f6c2411c40 Hrm, you didn't see this. 
llvm-svn: 23673
 2005-10-09 06:24:02 +00:00
Chris Lattner
6fa98d5979 Fix a source of non-determinism in the backend: the order of processing 
IV strides dependend on the pointer order of the strides in memory.
Non-determinism is bad.

llvm-svn: 23672
 2005-10-09 06:20:55 +00:00
Chris Lattner
d5ac294abd When emiting a CopyFromReg and the source is already a vreg, do not bother 
creating a new vreg and inserting a copy: just use the input vreg directly.

This speeds up the compile (e.g. about 5% on mesa with a debug build of llc)
by not adding a bunch of copies and vregs to be coallesced away.  On mesa,
for example, this reduces the number of intervals from 168601 to 129040
going into the coallescer.

llvm-svn: 23671
 2005-10-09 05:58:56 +00:00
Chris Lattner
97ee5c7f18 Disable formation of rlwinm instructions from SRA bases. This fixes 
the 177.mesa failure from last night, and fixes the
CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll regression test I added.
If this code cannot be fixed, it should be removed for good, but I'll leave
it to Nate to decide its fate.

llvm-svn: 23670
 2005-10-09 05:36:17 +00:00
Chris Lattner
d5397ddd27 Testcase that is miscompiled by the ppc backend 
llvm-svn: 23669
 2005-10-09 05:31:47 +00:00
Nate Begeman
ef7172f7b3 Remove another unused file. Preparing for the great "enable i64 on ppc32" 
merge, and using subtarget info for ptr size.

llvm-svn: 23668
 2005-10-08 01:32:34 +00:00
Chris Lattner
2800856064 remove a comma to compile with pedantic gcc 
llvm-svn: 23667
 2005-10-08 01:24:19 +00:00
Nate Begeman
77c1ff0239 Remove a file that is no longer used 
llvm-svn: 23666
 2005-10-08 01:21:27 +00:00
Nate Begeman
8feae2fcc9 Lo and behold, the last bits of SelectionDAG.cpp have been moved over. 
llvm-svn: 23665
 2005-10-08 00:29:44 +00:00
Chris Lattner
6809d07aa5 When preselecting, favor things that have low depth to select first. This 
is faster and uses less stack space.  This reduces our stack requirement
enough to compile sixtrack, and though it's a hack, should be enough until
we switch to iterative isel

llvm-svn: 23664
 2005-10-07 22:10:27 +00:00
Chris Lattner
f8b0332dfc remove debugging code 
llvm-svn: 23663
 2005-10-07 15:31:26 +00:00
Chris Lattner
dff6183cd7 implement CodeGen/PowerPC/div-2.ll:test2-4 by propagating zero bits through 
C-X's

llvm-svn: 23662
 2005-10-07 15:30:32 +00:00
Chris Lattner
eab561a2e6 These don't need to be sdivs. 
llvm-svn: 23661
 2005-10-07 15:27:12 +00:00
Chris Lattner
5e0581c32b fix indentation 
llvm-svn: 23660
 2005-10-07 06:37:02 +00:00
Chris Lattner
36b58a015b Turn sdivs into udivs when we can prove the sign bits are clear. This 
implements CodeGen/PowerPC/div-2.ll

llvm-svn: 23659
 2005-10-07 06:10:46 +00:00
Chris Lattner
720d11da49 New testcase, should turn into a ushr 
llvm-svn: 23658
 2005-10-07 06:10:03 +00:00
Jeff Cohen
3151f1ba38 Remove prolific source of VC++ truncation warnings. 
llvm-svn: 23657
 2005-10-07 05:29:25 +00:00
Jeff Cohen
3c6db93125 Remove useless variable. 
llvm-svn: 23656
 2005-10-07 05:28:29 +00:00
Chris Lattner
5adabfc4fb add a hack to work around broken VC++ scoping rules. Thx to JeffC for pointing 
this out to me

llvm-svn: 23655
 2005-10-07 05:23:36 +00:00
Chris Lattner
8481412db8 Fix a CQ regression from my patch to split F32/F64 into seperate register 
classes on PPC.  We were emitting fmr instructions to do fp extensions, which
weren't getting coallesced.  This fixes Regression/CodeGen/PowerPC/fpcopy.ll

llvm-svn: 23654
 2005-10-07 05:00:52 +00:00
Chris Lattner
8741e905da double to float casts should nto result in an fmr 
llvm-svn: 23653
 2005-10-07 04:59:41 +00:00
Chris Lattner
9be9eb2f7f Fix CodeGen/Generic/bool-to-double.ll 
llvm-svn: 23652
 2005-10-07 04:50:48 +00:00
Chris Lattner
d61ac59816 test broken in the IA64 backend. 
llvm-svn: 23651
 2005-10-07 04:49:00 +00:00
Chris Lattner
f572bec811 Pull out Call, reducing stack frame size from 6032 bytes to 5184 bytes. 
llvm-svn: 23650
 2005-10-06 19:07:45 +00:00
Chris Lattner
0e0c65b680 Pull out setcc, this reduces stack frame size from 7520 to 6032 bytes 
llvm-svn: 23649
 2005-10-06 19:03:35 +00:00
Chris Lattner
0e97719aa3 Pull two more methods out, reducing stack frame size from 8224 -> 7520 bytes 
llvm-svn: 23648
 2005-10-06 18:56:10 +00:00
Chris Lattner
4b1b6161ef Add a recursive-iterative hybrid stage to attempt to reduce stack space, this 
helps but not enough.

Start pulling cases out of PPC32DAGToDAGISel::Select.  With GCC 4, this function
required 8512 bytes of stack space for each invocation (GCC 3 required less
than 700 bytes).  Pulling this first function out gets us down to 8224.  More
to come :(

llvm-svn: 23647
 2005-10-06 18:45:51 +00:00
Chris Lattner
7709ee0085 silence a bogus GCC warning 
llvm-svn: 23646
 2005-10-06 17:39:10 +00:00
Chris Lattner
3b848038ab Fix the LLC regressions on X86 last night. In particular, when undoing 
previous copy elisions and we discover we need to reload a register, make
sure to use the regclass of the original register for the reload, not the
class of the current register.  This avoid using 16-bit loads to reload 32-bit
values.

llvm-svn: 23645
 2005-10-06 17:19:06 +00:00
Andrew Lenharth
c9e3e3ee73 This is suppose to work now 
llvm-svn: 23644
 2005-10-06 16:54:29 +00:00
Andrew Lenharth
a3b71accf4 remove VAX compatibility instruction, we will never use this 
llvm-svn: 23643
 2005-10-06 16:53:32 +00:00