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108 Commits

Author SHA1 Message Date
Chris Lattner
1e089aac3a rename isOperandValidForConstraint to LowerAsmOperandForConstraint, 
changing the interface to allow for future changes.

llvm-svn: 41384
 2007-08-25 00:47:38 +00:00
Dale Johannesen
79551baaad long double 9 of N. This finishes up the X86-32 bits 
(constants are still not handled).  Adds ConvertActions
to control fp-to-fp conversions (these are currently
defaulted for all other targets, so no changes there).

llvm-svn: 40958
 2007-08-09 01:04:01 +00:00
Dan Gohman
be352027e6 Initialize the IndexedModeActions array with memset before 
updating it with calls to setIndexedLoadAction/setIndexedStoreAction,
which only update a few bits at a time. This avoids ostensible
undefined behavior of operationg on values which may be
trap-representations, and as a practical matter fixes errors from
valgrind, which doesn't track uninitialized memory with bit
granularity.

llvm-svn: 38468
 2007-07-09 20:49:44 +00:00
Dan Gohman
c6bdcfa8c0 Add new TargetLowering code to provide the final register type that an 
illegal value type will be transformed to, for code that needs the
register type after all transformations instead of just after the first
transformation.

Factor out the code that uses this information to do copy-from-regs and
copy-to-regs for various purposes into separate functions so that they
are done consistently.

llvm-svn: 37781
 2007-06-28 23:29:44 +00:00
Dan Gohman
354f02e03d Generalize MVT::ValueType and associated functions to be able to represent 
extended vector types. Remove the special SDNode opcodes used for pre-legalize
vector operations, and the special MVT::Vector type used with them. Adjust
lowering and legalize to work with the normal SDNode kinds instead, and to
use the normal MVT functions to work with vector types instead of using the
two special operands that the pre-legalize nodes held.

This allows pre-legalize and post-legalize DAGs, and the code that operates
on them, to be more consistent. Pre-legalize vector operators can be handled
more consistently with scalar operators. And, -view-dag-combine1-dags and
-view-legalize-dags now look prettier for vector code.

llvm-svn: 37719
 2007-06-25 16:23:39 +00:00
Dan Gohman
a62327ea40 Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from 
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.

llvm-svn: 37704
 2007-06-22 14:59:07 +00:00
Dan Gohman
72af1305fb Tidy up ValueType names in comments. 
llvm-svn: 37688
 2007-06-21 14:48:26 +00:00
Dan Gohman
1815e9bdb3 Rename TargetLowering::getNumElements and friends to 
TargetLowering::getNumRegisters and similar, to avoid confusion with
the actual number of elements for vector types.

llvm-svn: 37687
 2007-06-21 14:42:22 +00:00
Chris Lattner
14bcacb40b Fix CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll, and PR1473. 
llvm-svn: 37362
 2007-05-30 16:30:06 +00:00
Chris Lattner
27b469b945 same patch as the previous one, but the symmetric case 
llvm-svn: 37249
 2007-05-19 00:46:51 +00:00
Chris Lattner
2430b7c4aa Disable the (A == (B-A)) -> 2*A == B xform when the sub has multiple uses (in 
this case, the xform introduces an extra operation).  This compiles
PowerPC/compare-duplicate.ll into:

_test:
        subf r2, r3, r4
        cmplw cr0, r2, r3
        bne cr0, LBB1_2 ;F

instead of:

_test:
        slwi r2, r3, 1
        subf r3, r3, r4
        cmplw cr0, r4, r2
        bne cr0, LBB1_2 ;F

This is target independent of course.

llvm-svn: 37246
 2007-05-19 00:43:44 +00:00
Dan Gohman
d6a33914fb Qualify several calls to functions in the MVT namespace, for consistency. 
llvm-svn: 37230
 2007-05-18 17:52:13 +00:00
Chris Lattner
910abfbfd1 disable MaskedValueIsZero, ComputeMaskedBits, and SimplifyDemandedBits for 
i128 integers.  The 64-bit masks are not wide enough to represent the results.
These should be converted to APInt someday.

llvm-svn: 37169
 2007-05-17 18:19:23 +00:00
Evan Cheng
3163b77d5e Add target hook to specify block size limit for if-conversion. 
llvm-svn: 37134
 2007-05-16 23:45:53 +00:00
Chris Lattner
e95894e9f9 Allow i/s to match (gv+c). This fixes CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll 
and PR1382

llvm-svn: 36672
 2007-05-03 16:54:34 +00:00
Chris Lattner
639f807048 fix a pasto 
llvm-svn: 36242
 2007-04-18 03:01:40 +00:00
Chris Lattner
1677782ef0 Fix a bug in my previous patch, grabbing the shift amount width from the 
wrong operand.

llvm-svn: 36223
 2007-04-17 22:53:02 +00:00
Chris Lattner
b55496c660 Fold (x << c1)>> c2 into a single shift if the bits shifted out aren't used. 
This compiles:
int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }

into:
_baz:
        srwi r2, r3, 1
        extsh r3, r2
        blr

on PPC, instead of:
_baz:
        slwi r2, r3, 8
        srwi r2, r2, 9
        extsh r3, r2
        blr

GCC produces:
_baz:
        srwi r10,r4,24
        insrwi r10,r3,24,0
        srawi r9,r3,24
        srawi r3,r10,9
        extsh r3,r3
        blr

This implements CodeGen/PowerPC/shl_elim.ll

llvm-svn: 36221
 2007-04-17 21:14:16 +00:00
Anton Korobeynikov
f3e62a428a Removed tabs everywhere except autogenerated & external files. Add make 
target for tabs checking.

llvm-svn: 36146
 2007-04-16 18:10:23 +00:00
Chris Lattner
2f221a83ec Fix weirdness handling single element vectors. 
llvm-svn: 35941
 2007-04-12 04:44:28 +00:00
Chris Lattner
461f7ed33b remove dead target hooks. 
llvm-svn: 35847
 2007-04-09 23:34:08 +00:00
Chris Lattner
ae6e2c0ee5 remove some dead target hooks, subsumed by isLegalAddressingMode 
llvm-svn: 35840
 2007-04-09 22:27:04 +00:00
Chris Lattner
8747705792 switch TL::getValueType to use MVT::getValueType. 
llvm-svn: 35527
 2007-03-31 04:05:24 +00:00
Chris Lattner
143464e05f add one addressing mode description hook to rule them all. 
llvm-svn: 35520
 2007-03-30 23:14:50 +00:00
Evan Cheng
a55449c051 Remove isLegalAddressImmediate. 
llvm-svn: 35406
 2007-03-28 01:53:55 +00:00
Chris Lattner
4a7feb72f5 implement initial support for the silly X constraint. Testcase here: CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll 
llvm-svn: 35327
 2007-03-25 04:35:41 +00:00
Chris Lattner
91adfbe0ff Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll 
llvm-svn: 35324
 2007-03-25 02:18:14 +00:00
Chris Lattner
b19069959d switch TargetLowering::getConstraintType to take the entire constraint, 
not just the first letter.  No functionality change.

llvm-svn: 35322
 2007-03-25 02:14:49 +00:00
Dale Johannesen
44c0a5d545 repair x86 performance, dejagnu problems from previous change 
llvm-svn: 35245
 2007-03-21 21:51:52 +00:00
Dale Johannesen
3e422e3b49 do not share old induction variables when this would result in invalid 
instructions (that would have to be split later)

llvm-svn: 35227
 2007-03-20 21:54:54 +00:00
Evan Cheng
ce8b779c6c Added isLegalAddressExpression hook to test if the given expression can be 
folded into target addressing mode for the given type.

llvm-svn: 35121
 2007-03-16 08:42:32 +00:00
Evan Cheng
b2a5499d86 More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. 
llvm-svn: 35076
 2007-03-12 23:37:10 +00:00
Chris Lattner
b9f2992e38 initialize a instance variable 
llvm-svn: 34567
 2007-02-25 01:28:05 +00:00
Chris Lattner
6faf9e8e97 Fix CodeGen/Generic/2007-02-23-DAGCombine-Miscompile.ll and PR1219 
llvm-svn: 34551
 2007-02-24 02:09:29 +00:00
Jim Laskey
f29366635a Need to init. 
llvm-svn: 34499
 2007-02-22 18:04:49 +00:00
Chris Lattner
871a3e6c91 Implement i/n/s constraints correctly. This fixes 
test/CodeGen/PowerPC/2007-02-16-InlineAsmNConstraint.ll

llvm-svn: 34368
 2007-02-17 06:00:35 +00:00
Reid Spencer
55e4e98a2a For PR1195: 
Rename PackedType -> VectorType, ConstantPacked -> ConstantVector, and
PackedTyID -> VectorTyID. No functional changes.

llvm-svn: 34293
 2007-02-15 02:26:10 +00:00
Chris Lattner
c305c08493 Fix PR1198, by adding initial i128 support. Patch by Dan Gohman. 
llvm-svn: 34256
 2007-02-13 23:41:38 +00:00
Evan Cheng
1b155ac243 Move SimplifySetCC to TargetLowering and allow it to be shared with legalizer. 
llvm-svn: 34065
 2007-02-08 22:13:59 +00:00
Chris Lattner
36dbbd2550 Fit in 80 columns 
llvm-svn: 33745
 2007-02-01 04:55:59 +00:00
Evan Cheng
3ec2e08a37 Allow the target to override the ISD::CondCode that's to be used to test the 
result of the comparison libcall against zero.

llvm-svn: 33701
 2007-01-31 09:29:11 +00:00
Reid Spencer
6468d49755 Move a function out of line. 
llvm-svn: 33158
 2007-01-12 23:30:31 +00:00
Evan Cheng
e2a6d79cad Minor fix. 
llvm-svn: 33149
 2007-01-12 22:51:10 +00:00
Evan Cheng
032a597692 Store default libgcc routine names and allow them to be redefined by target. 
llvm-svn: 33105
 2007-01-12 02:11:51 +00:00
Anton Korobeynikov
e76b69846d Cleaned setjmp/longjmp lowering interfaces. Now we're producing right 
code (both asm & cbe) for Mingw32 target.
Removed autoconf checks for underscored versions of setjmp/longjmp.

llvm-svn: 32415
 2006-12-10 23:12:42 +00:00
Evan Cheng
a366d082b5 Preliminary soft float support. 
llvm-svn: 32394
 2006-12-09 02:42:38 +00:00
Chris Lattner
71a7a2d781 Fix the dag combiner bug corresponding to PR1014. 
llvm-svn: 31943
 2006-11-27 21:50:02 +00:00
Evan Cheng
c050bb298f Add a mechanism to specify whether a target supports a particular indexed load / store. 
llvm-svn: 31597
 2006-11-09 18:56:43 +00:00
Reid Spencer
4bafa71dc1 For PR786: 
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.

llvm-svn: 31380
 2006-11-02 20:25:50 +00:00
Chris Lattner
d9afd310a6 Change the prototype for TargetLowering::isOperandValidForConstraint 
llvm-svn: 31318
 2006-10-31 19:40:43 +00:00
Evan Cheng
fe5bb5dbe6 Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. 
llvm-svn: 30945
 2006-10-13 21:14:26 +00:00
Evan Cheng
9b31a4d4ed Naming consistency. 
llvm-svn: 30878
 2006-10-11 07:10:22 +00:00
Evan Cheng
d22f3dd3ed Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. 
llvm-svn: 30844
 2006-10-09 20:57:25 +00:00
Chris Lattner
3f92c791b4 initialize ivar 
llvm-svn: 30780
 2006-10-06 22:52:08 +00:00
Evan Cheng
494e8e6971 Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an 
extra operand to LOADX to specify the exact value extension type.

llvm-svn: 30714
 2006-10-04 00:56:09 +00:00
Chris Lattner
5f36aaa98f Change the default to 0, which means 'default'. 
llvm-svn: 30114
 2006-09-05 17:39:15 +00:00
Duraid Madina
e1bb6d9ff8 forgot this 
llvm-svn: 30097
 2006-09-04 07:44:11 +00:00
Chris Lattner
92a0b69813 Add some advice 
llvm-svn: 29324
 2006-07-27 04:24:14 +00:00