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Commit Graph

75285 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
734febce18 Mark VZEROALL as clobbering all YMM registers
llvm-svn: 138461
2011-08-24 18:48:33 +00:00
Jim Grosbach
9ae0de4db3 Add missing explicit writeback operand to tSTMIA_UPD.
rdar://10014745

llvm-svn: 138457
2011-08-24 18:19:42 +00:00
Evan Cheng
420bf5446c Move TargetRegistry and TargetSelect from Target to Support where they belong.
These are strictly utilities for registering targets and components.

llvm-svn: 138450
2011-08-24 18:08:43 +00:00
Rafael Espindola
e864ec28bd Fix a crashing bug in SplitBlock when it is called on a block with no
dominator information even though dominators were previously computed.

Patch by Nick Sumner.

llvm-svn: 138449
2011-08-24 18:07:01 +00:00
Jim Grosbach
bf012c3f19 Thumb add SP assembly syntax fix.
llvm-svn: 138448
2011-08-24 18:04:27 +00:00
Jim Grosbach
b33129ebad Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode.
Add the predicate operand to the instructions. Update the back end
accordingly where the instructions are used. Restrict the SP operands
to actually only be SP, as otherwise these break assembly parsing for the
normal instruction variants.

llvm-svn: 138445
2011-08-24 17:46:13 +00:00
Owen Anderson
ee4d781cd3 Be stricter in enforcing IT instruction predicate values, so that we don't end up trying to print out an illegal predicate.
llvm-svn: 138443
2011-08-24 17:21:43 +00:00
Owen Anderson
6325690c08 Port over more encoding tests to decoding tests.
llvm-svn: 138441
2011-08-24 17:08:34 +00:00
Jim Grosbach
6d81544e1a Tidy up. Trailing whitespace.
llvm-svn: 138437
2011-08-24 16:44:17 +00:00
Richard Osborne
6b6b0b535d Add Uses=[SP] to call instructions. This fixes a miscompilation with a
variable sized alloca.

llvm-svn: 138433
2011-08-24 13:32:43 +00:00
Craig Topper
1da38a34a6 Break 256-bit vector int add/sub/mul into two 128-bit operations to avoid costly scalarization. Fixes PR10711.
llvm-svn: 138427
2011-08-24 06:14:18 +00:00
Bill Wendling
2cd76365f2 Add the sentinal "no handle" value to the ResumeInst.
A value of -1 at a call site tells the personality function that this call isn't
handled by the current function. Since the ResumeInsts are converted to calls to
_Unwind_SjLj_Resume, add a (volatile) store of -1 to its 'call site'.

llvm-svn: 138416
2011-08-24 00:00:23 +00:00
Bill Wendling
79b1f95f89 Don't replace *all* uses with the new stuff.
This is not necessarily the first or dominating use of the EH values. The IR
breaks if it's not. So replace the specific value in the instruction with the
new value.

llvm-svn: 138406
2011-08-23 22:55:03 +00:00
Bill Wendling
acd21d7162 Look at the end of the entry block for an invoke.
The invoke could be at the end of the entry block. If it's the only one, then we
won't process all of the landingpad instructions correctly. This code is
currently ugly, but should be made much nicer once the new EH switch is thrown.

llvm-svn: 138397
2011-08-23 22:20:16 +00:00
Bruno Cardoso Lopes
8959b54713 Fix a nasty bug where a v4i64 was being wrong emitted with 32-bit
permutations. Also tidy up some patterns and make them close to their
instruction definition!

llvm-svn: 138392
2011-08-23 22:06:37 +00:00
Bill Wendling
3de8a041b7 A landingpad instruction is neither folded nor dead.
llvm-svn: 138387
2011-08-23 21:33:05 +00:00
Jim Grosbach
b65ec7c64f Move ARM frame-unwinding EHABI handling a touch earlier.
It should go before AsmPrinter MC pseudo expansion since it's based on
MachineInstr, not MCInst. Otherwise any frame related pseudo instructions
may be missed.

llvm-svn: 138386
2011-08-23 21:32:34 +00:00
Jim Grosbach
3832c5ac34 [SU]XT[BH] are only available on ARMv6 and up.
llvm-svn: 138373
2011-08-23 20:53:08 +00:00
Nate Begeman
87ffb9491b Add some useful accessors to c++ api that appear to be missing from the c api
llvm-svn: 138371
2011-08-23 20:27:46 +00:00
Evan Cheng
ed13551c1d Some refactoring so TargetRegistry.h no longer has to include any files
from MC.

llvm-svn: 138367
2011-08-23 20:15:21 +00:00
Eric Christopher
aa4993b9aa Revert "Address Duncan's CR request:"
This reverts commit 20a05be15ea5271ab6185b83200fa88263362400. (svn rev 138340)

Conflicts:

	test/Transforms/InstCombine/bitcast.ll

llvm-svn: 138366
2011-08-23 20:11:10 +00:00
Jim Grosbach
f5d628146a Thumb parsing and encoding for WFE, WFI and YIELD.
llvm-svn: 138364
2011-08-23 20:02:30 +00:00
Jim Grosbach
9f0be95d20 Thumb parsing and encoding for UXTB and UXTH.
llvm-svn: 138363
2011-08-23 19:59:32 +00:00
Jim Grosbach
87c7a2b16b Thumb parsing and encoding for TST.
llvm-svn: 138362
2011-08-23 19:53:17 +00:00
Jim Grosbach
7ceb45dd61 Thumb parsing and encoding for SXTB and SXTH.
llvm-svn: 138361
2011-08-23 19:51:42 +00:00
Jim Grosbach
1f5b8e9044 Thumb parsing and encoding for SVC.
llvm-svn: 138360
2011-08-23 19:49:10 +00:00
Jim Grosbach
d343e1a13f Thumb parsing and encoding for SUB.
llvm-svn: 138359
2011-08-23 19:45:45 +00:00
Evan Cheng
ff0339eccc Fix 80 col violations.
llvm-svn: 138356
2011-08-23 19:17:21 +00:00
Nick Lewycky
11874a4e0a PerformSubCombine to work on integers larger than i128. Fixes a crasher.
llvm-svn: 138354
2011-08-23 19:01:24 +00:00
Jim Grosbach
9795206370 Thumb parsing and encoding for STRH.
llvm-svn: 138352
2011-08-23 18:56:20 +00:00
Caitlin Sadowski
9a011eafa9 Thread safety: Adding in an option for variadic expr* array of arguments
llvm-svn: 138351
2011-08-23 18:49:23 +00:00
Jim Grosbach
d507a9c6b9 Thumb parsing and encoding for STRB.
llvm-svn: 138349
2011-08-23 18:43:06 +00:00
Jim Grosbach
f9bc99b518 Thumb parsing and encoding for tSTRspi.
llvm-svn: 138348
2011-08-23 18:39:41 +00:00
Jim Grosbach
7ece5d431c Thumb parsing and encoding for STR.
Not including tSTRspi.

llvm-svn: 138347
2011-08-23 18:33:38 +00:00
Rafael Espindola
5ad9eaf265 Fix an example in the documentation.
Patch by Sanjoy Das!

llvm-svn: 138346
2011-08-23 18:26:56 +00:00
Jim Grosbach
3b20e779cd Thumb parsing and encoding for STM.
llvm-svn: 138345
2011-08-23 18:15:37 +00:00
Jim Grosbach
709c1644b0 Factor low reg checking into a helper function.
llvm-svn: 138344
2011-08-23 18:13:04 +00:00
Nadav Rotem
442df41879 Fix a typo in the test from the previous commit.
llvm-svn: 138342
2011-08-23 17:56:54 +00:00
Owen Anderson
3de2d7656d Fix decoding of Thumb2 prefetch instructions, which account for all the remaining Thumb2 decoding failures found by randomized testing so far.
llvm-svn: 138341
2011-08-23 17:51:38 +00:00
Nadav Rotem
d449bc9bff Address Duncan's CR request:
1. Cleanup the tests in ConstantFolding.cpp
2. Implement isAllOnes for Constant, ConstantFP, ConstantVector

llvm-svn: 138340
2011-08-23 17:48:43 +00:00
Owen Anderson
4ae835d7c9 Fix Thumb2 decoding of CPS instructions to mirror ARM decoding of the same instructions.
llvm-svn: 138339
2011-08-23 17:45:18 +00:00
Jim Grosbach
6ada94c011 Clean up Thumb load/store multiple definitions.
There is no non-writeback store multiple instruction in Thumb1, so
don't define one. As a result load multiple is the only instantiation of
the multiclass, so refactor that away entirely.

llvm-svn: 138338
2011-08-23 17:41:15 +00:00
Owen Anderson
9d5074746f Fix two more instances of mis-matched operand names breaking disassembly. Found by randomized testing.
llvm-svn: 138337
2011-08-23 17:37:32 +00:00
Owen Anderson
b97912374e Port more assemble tests over to disassembly tests.
llvm-svn: 138336
2011-08-23 17:26:35 +00:00
Ivan Krasin
aa3c2057c5 This patch adds support of le32 pseudo-cpu that stands for generic
32-bit little-endian CPU. Used by PNaCl and Emscripten.

llvm-svn: 138335
2011-08-23 16:59:00 +00:00
Eric Christopher
cd47076a67 Fix fpimmm->fpimm typo.
Patch by Micah Villmow!

llvm-svn: 138330
2011-08-23 15:42:35 +00:00
Ivan Krasin
b2cd1f27c1 Update config.sub, config.guess and configure.
The motivation to do that:

1. Now, llvm would use the stock config.sub. Before that we had an
uncommitted FreeBSD-related patch. Now, it has been upstreamed and
comes back. It means that it would be easier to update these files in
the next time (less magic knowledge)

2. Fix a typo for pseudo-CPUs: 32e[lb] -> [lb]e32, 64e[lb]->[lb]64.
One of these CPUs is used for PNaCl and it was not really convenient
to have a CPU that starts with a digit.

llvm-svn: 138323
2011-08-23 06:43:49 +00:00
Craig Topper
67b22aedb4 Add support for breaking 256-bit v16i16 and v32i8 VSETCC into two 128-bit ones, avoiding sclarization. Add vex form of pcmpeqq and pcmpgtq. Fixes more cases for PR10712.
llvm-svn: 138321
2011-08-23 04:36:33 +00:00
NAKAMURA Takumi
6b729bec35 lib/Support/Windows/Windows.h: Update required IE ver. 0x0600 should be enough for Windows XP.
llvm-svn: 138319
2011-08-23 03:49:11 +00:00
Bruno Cardoso Lopes
8024703a16 Introduce a pass to insert vzeroupper instructions to avoid AVX to
SSE transition penalty. The pass is enabled through the "x86-use-vzeroupper"
llc command line option. This is only the first step (very naive and
conservative one) to sketch out the idea, but proper DFA is coming next
to allow smarter decisions. Comments and ideas now and in further commits
will be very appreciated.

llvm-svn: 138317
2011-08-23 01:14:17 +00:00