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Commit Graph

194295 Commits

Author SHA1 Message Date
Duncan P. N. Exon Smith
3a5bd3107b utils: Tweak clang-parse-diagnostics-file for modules includes
Diagnostics from modules do not have a `main-file` listed.  Tweak
`clang-parse-diagnostics-file` to patch this up.  Previously, the call
to `os.path.basename` would crash.

Radar-Id: rdar://problem/59000292
2020-04-02 14:16:26 -07:00
Nico Weber
b63fb1d467 Reland "Make it possible for lit.site.cfg to contain relative paths, and use it for llvm and clang"
The problem on Windows was that the \b in "..\bin" was interpreted
as an escape sequence. Use r"" strings to prevent that.

This reverts commit ab11b9eefa16661017c2c7b3b34c46b069f43fb7,
with raw strings in the lit.site.cfg.py.in files.

Differential Revision: https://reviews.llvm.org/D77184
2020-04-02 16:12:03 -04:00
Cyndy Ishida
619546feb9 [llvm][TextAPI] adding inlining reexported libraries support
Summary:
[llvm][TextAPI] adding inlining reexported libraries support

* this patch adds reader/writer support for MachO tbd files.
The usecase is to represent reexported libraries in top level library
that won't need to exist for linker indirection because all of the
needed content will be inlined in the same document.

Reviewers: ributzka, steven_wu, jhenderson

Reviewed By: ributzka

Subscribers: JDevlieghere, hiraditya, mgrang, dexonsmith, rupprecht, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67646
2020-04-02 13:05:08 -07:00
Craig Topper
a316b89267 [X86] Enable combineExtSetcc for vectors larger than 256 bits when we've disabled 512 bit vectors.
The compares are going to be type legalized to 256 bits so we
might as well fold the extend.
2020-04-02 12:44:27 -07:00
Fangrui Song
59c870af32 Reland D75382 "[lld] Initial commit for new Mach-O backend"
With a fix for http://lab.llvm.org:8011/builders/clang-cmake-armv8-lld/builds/3636

Also trims some unneeded dependencies.
2020-04-02 12:03:43 -07:00
Nico Weber
529e4baab6 Revert "Make it possible for lit.site.cfg to contain relative paths, and use it for llvm and clang"
This reverts commit fb80b6b2d58c476747a3206bd4371b787108591b and
follow-up 631ee8b24adf36359b61ecb47484e8e82de35be8.

Seems to not work on Windows:
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast/builds/31684
http://lab.llvm.org:8011/builders/llvm-clang-win-x-aarch64/builds/6512

Let's revert while I investigate.
2020-04-02 15:00:09 -04:00
Nico Weber
52b31b6f35 Make fb80b6b2d58c4 actually work.
I broke it with last-minute changes right before committing.

Differential Revision: https://reviews.llvm.org/D77184
2020-04-02 14:28:34 -04:00
Anna Thomas
ac950491d8 [InlineFunction] Update valid return attributes at callsite within callee body
Consider a callee function that has a call (C) within it which feeds
into the return. When we inline that callee into a callsite that has
return attributes, we can backward propagate valid attributes to the
call (C) within that inlined callee body.

This is safe to do so only if we can guarantee transfer of execution to
successor in the window of instructions between return value (i.e. the
call C) and the return instruction.

Also, this is valid only for attributes which are a property of a
callsite and not those that are not dependent on the ABI, or a property
of the call itself.

Reviewed-By: reames, jdoerfert

Differential Revision: https://reviews.llvm.org/D76140
2020-04-02 14:13:12 -04:00
Matt Arsenault
5836a23b95 AMDGPU: Hack out noinline on functions using LDS globals
This is a workaround for clang adding noinline to all functions at
-O0. Previously, we would just add alwaysinline, and the verifier
would complain about having both noinline and alwaysinline. We
currently can't truly codegen this case as a freestanding function, so
override the user forcing noinline.
2020-04-02 14:12:07 -04:00
Nico Weber
16fa9028fd Make it possible for lit.site.cfg to contain relative paths, and use it for llvm and clang
Currently, all generated lit.site.cfg files contain absolute paths.

This makes it impossible to build on one machine, and then transfer the
build output to another machine for test execution. Being able to do
this is useful for several use cases:

1. When running tests on an ARM machine, it would be possible to build
   on a fast x86 machine and then copy build artifacts over after building.

2. It allows running several test suites (clang, llvm, lld) on 3
   different machines, reducing test time from sum(each test suite time) to
   max(each test suite time).

This patch makes it possible to pass a list of variables that should be
relative in the generated lit.site.cfg.py file to
configure_lit_site_cfg(). The lit.site.cfg.py.in file needs to call
`path()` on these variables, so that the paths are converted to absolute
form at lit start time.

The testers would have to have an LLVM checkout at the same revision,
and the build dir would have to be at the same relative path as on the
builder.

This does not yet cover how to figure out which files to copy from the
builder machine to the tester machines. (One idea is to look at the
`--graphviz=test.dot` output and copy all inputs of the `check-llvm`
target.)

Differential Revision: https://reviews.llvm.org/D77184
2020-04-02 13:53:16 -04:00
Sanjay Patel
54629ce96c [InstCombine] try to reduce shuffle with bitcasted operand
shuf (bitcast X), undef, Mask --> bitcast X'

The 'inverse shuffles' test (shuf_bitcast_operand) is a pattern
in the motivating examples from PR35454:
https://bugs.llvm.org/show_bug.cgi?id=35454
(see also D76727)

We can deal with this class of patterns in generic instcombine
because we are not creating any new shuffles, just a bitcast.

Alive2 proof:
http://volta.cs.utah.edu:8080/z/mwDUZf

Differential Revision: https://reviews.llvm.org/D76844
2020-04-02 13:44:50 -04:00
Sanjay Patel
1e7408d565 [VectorCombine] transform bitcasted shuffle to narrower elements
bitcast (shuf V, MaskC) --> shuf (bitcast V), MaskC'

We do not attempt this in InstCombine because we do not want to change
types and create new shuffle ops that are potentially not lowered as
well as the original code. Here, we can check the cost model to see if
it is worthwhile.

I've aggressively enabled this transform even if the types are the same
size and/or equal cost because moving the bitcast allows InstCombine to
make further simplifications.

In the motivating cases from PR35454:
https://bugs.llvm.org/show_bug.cgi?id=35454
...this is enough to let instcombine and the backend eliminate the
redundant shuffles, but we probably want to extend VectorCombine to
handle the inverse pattern (shuffle-of-bitcast) to get that
simplification directly in IR.

Differential Revision: https://reviews.llvm.org/D76727
2020-04-02 13:30:22 -04:00
Stanislav Mekhanoshin
0097125e1d [AMDGPU] Fix crash in SILoadStoreOptimizer
SILoadStoreOptimizer::checkAndPrepareMerge() expects base and
paired instruction to come in order and scans MBB from base to
the paired instruction. An original order can be changed if
there were a dependent instruction in between and base instruction
was moved.

Fixed by bailing the optimization. In theory it might be possible
still to perform a merge by swapping instructions, but on practice
it bails anyway because it finds dependency on that same instruction
which has resulted in the base move.

Differential Revision: https://reviews.llvm.org/D77245
2020-04-02 10:26:47 -07:00
Sanjay Patel
c0d3491f6b [InstCombine] add tests for cmyk benchmark; NFC
These are versions of a function that regressed with:
rGf2fbdf76d8d0

That particular problem occurs with an instcombine-simplifycfg-instcombine
sequence, but we can show that it exists within instcombine only with
other variations of the pattern.
2020-04-02 13:00:46 -04:00
LLVM GN Syncbot
48b726dc65 [gn build] Port c00cb76274f 2020-04-02 16:36:36 +00:00
LLVM GN Syncbot
09b61bacb4 [gn build] Port 24bb2d1e776 2020-04-02 16:36:35 +00:00
Nico Weber
0d00935cb5 Revert "[gn build] Port 03f43b3aca36"
This reverts commit 45b6364e8d74f6038e94b760f017e03740acf725,
03f43b3aca36 was reverted in af39151f3c54.
2020-04-02 12:36:06 -04:00
Benjamin Kramer
d8fb1c1c6d [LoopDataPrefetch] Remove unused include that's a layering violation 2020-04-02 17:46:10 +02:00
Jonas Paulsson
41c67725a7 NFC: Comment in TargetTransformInfo.h reformatted (by Michael Kruse). 2020-04-02 17:40:53 +02:00
Benjamin Kramer
11841a12af Revert "[SimplifyLibCalls] Erase replaced instructions"
This reverts commit 2a77544ad5911a38f81c0300385033fced1cc66d. This
introduces a use-after-free in Transforms/InstCombine/sincospi.ll.
Found by asan.
2020-04-02 17:30:47 +02:00
Tyker
cf3e3f7a6f [NFC] remove delcartion that shouldn't be there 2020-04-02 17:09:16 +02:00
Alexander Lanin
d41f20efe6 [docs] use git diff instead of git format-patch
Uploading output from `git format-patch` fails when version has
more than 2 dots, e.g. git version 2.24.1.windows.2 which is
currently recommended by e.g. GitExtensions or 2.24.1.rc on Linux.

Differential Revision: https://reviews.llvm.org/D72374
2020-04-02 07:20:27 -07:00
Jonas Paulsson
df92dbf944 [SystemZ] Add isCommutable flag on vector instructions.
This does not change much in code generation, but in rare cases MachineCSE
can figure out that an instruction is redundant after commuting it.

Review: Ulrich Weigand
2020-04-02 16:06:15 +02:00
Sanjay Patel
3b4bae41a3 Revert "[InstCombine] do not exclude min/max from icmp with casted operand fold"
This reverts commit f2fbdf76d8d07f6a0fbd97825cbc533660d64a37.
As noted in the post-commit thread:
https://reviews.llvm.org/rGf2fbdf76d8d0
...this can obscure a min/max pattern where the components
have extra uses. We can show that the problem is independent
of this change with a slightly modified source example, so
this revert just delays/reduces the need to fix the real
problem.

We need to improve our analysis of negation or -- more
generally -- subtraction using patches like D77230 or D68408.
2020-04-02 09:15:23 -04:00
Tyker
361dc8333f [NFC] Split Knowledge retention and place it more appropriatly
Summary:
Splitting Knowledge retention into Queries in Analysis and Builder into Transform/Utils
allows Queries and Transform/Utils to use Analysis.

Reviewers: jdoerfert, sstefan1

Reviewed By: jdoerfert

Subscribers: mgorny, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77171
2020-04-02 15:01:41 +02:00
Jonas Paulsson
e80a23909b [LoopDataPrefetch + SystemZ] Let target decide on prefetching for each loop.
This patch adds

- New arguments to getMinPrefetchStride() to let the target decide on a
  per-loop basis if software prefetching should be done even with a stride
  within the limit of the hw prefetcher.

- New TTI hook enableWritePrefetching() to let a target do write prefetching
  by default (defaults to false).

- In LoopDataPrefetch:

  - A search through the whole loop to gather information before emitting any
    prefetches. This way the target can get information via new arguments to
    getMinPrefetchStride() and emit prefetches more selectively. Collected
    information includes: Does the loop have a call, how many memory
    accesses, how many of them are strided, how many prefetches will cover
    them. This is NFC to before as long as the target does not change its
    definition of getMinPrefetchStride().

  - If a previous access to the same exact address was 'read', and the
    current one is 'write', make it a 'write' prefetch.

  - If two accesses that are covered by the same prefetch do not dominate
    each other, put the prefetch in a block that dominates both of them.

  - If a ConstantMaxTripCount is less than ItersAhead, then skip the loop.

- A SystemZ implementation of getMinPrefetchStride().

Review: Ulrich Weigand, Michael Kruse

Differential Revision: https://reviews.llvm.org/D70228
2020-04-02 14:57:46 +02:00
Kang Zhang
36b5d019b5 [NFC][PowerPC] Using update_llc_test_checks.py to update atomics-regression.ll 2020-04-02 12:47:35 +00:00
Sanjay Patel
015f93cd9d [PhaseOrdering] add test for vector trunc; NFC
See discussion in D76983.
2020-04-02 08:13:19 -04:00
Sanjay Patel
cb353ea7b8 [InstCombine] add tests for disguised vector trunc; NFC 2020-04-02 08:13:19 -04:00
Stefanos Baziotis
ba8ef2dbdd [LoopTerminology] Make term names bold
Differential Revision: https://reviews.llvm.org/D77151
2020-04-02 14:53:18 +03:00
LLVM GN Syncbot
0f044a53c0 [gn build] Port 5e508b9bac0 2020-04-02 11:15:00 +00:00
Djordje Todorovic
b4201a6dd9 [llvm-dwarfdump] Add the --show-sections-sizes option
Add an option to llvm-dwarfdump to calculate the bytes within
the debug sections. Dump this numbers when using --statistics
option as well.

This is an initial patch (e.g. we should support other units,
since we only support 'bytes' now).

Differential Revision: https://reviews.llvm.org/D74205
2020-04-02 13:14:30 +02:00
Simon Pilgrim
f3f5e6c3a7 Fix "result of 32-bit shift implicitly converted to 64 bits" MSVC warning. NFCI.
The shift of 1 by an amount that is never more than 31 means that the warning is a false positive but is safe and fixes Werror builds.
2020-04-02 12:02:04 +01:00
Simon Pilgrim
402e566b58 [llvm-mca] Cleanup unnecessary includes from headers
This removes some includes/forward-declarations that don't seem to be necessary in the MCA core headers

Based off a cppclean report

Differential Revision: https://reviews.llvm.org/D77073
2020-04-02 11:50:29 +01:00
LLVM GN Syncbot
e1cbcb3148 [gn build] Port d1705c1196f 2020-04-02 10:21:22 +00:00
LLVM GN Syncbot
5cc9c72530 [gn build] Port d08fadd6628 2020-04-02 10:21:21 +00:00
Nico Weber
f305b51045 [gn build] remove NOSORT from clang/Headers/BUILD.gn
Having the sync script work for this file seems better
than matching the order of headers in the cmake file.
Also, not having to manually sort the list is nice, even
if gn's automated sorting doesn't quite match the artisanal
order in the cmake file.
2020-04-02 06:20:13 -04:00
Kang Zhang
03c4111ede [NFC][PowerPC] Add a new test case loop-comment.ll 2020-04-02 10:16:02 +00:00
David Green
70cd6d231e [ARM] MVE VMULL patterns
This adds MVE vmull patterns, which are conceptually the same as
mul(vmovl, vmovl), and so the tablegen patterns follow the same
structure.

For i8 and i16 this is simple enough, but in the i32 version the
multiply (in 64bits) is illegal, meaning we need to catch the pattern
earlier in a dag fold. Because bitcasts are involved in the zext
versions and the patterns are a little different in little and big
endian. I have only added little endian support in this patch.

Differential Revision: https://reviews.llvm.org/D76740
2020-04-02 10:57:40 +01:00
David Green
ed90d278a6 [ARM] Make remaining MVE instruction predictable
The unpredictable/hasSideEffects flag is usually inferred by tablegen
from whether the instruction has a tablegen pattern (and that pattern
only has a single output instruction). Now that the MVE intrinsics are
all committed and producing code, the remaining instructions still
marked as unpredictable need to be specially handled. This adds the flag
directly to instructions that need it, notably the V*MLAL instructions
and some of the MOV's.

Differential Revision: https://reviews.llvm.org/D76910
2020-04-02 10:57:40 +01:00
Kang Zhang
fb0145ca24 [NFC][update_llc_test_checks] Remove the redundant SCRUB_LOOP_COMMENT_RE in asm.py
Summary:
In the patch: https://reviews.llvm.org/D42654
De-duplicate utils/update_{llc_,}test_checks.py, Some common part has
been move to common.py. The SCRUB_LOOP_COMMENT_RE has been moved to
common.py, but forgetting to remove from asm.py.
This patch is to remove the redundant SCRUB_LOOP_COMMENT_RE in asm.py
and use common.SCRUB_LOOP_COMMENT_RE.
2020-04-02 09:46:45 +00:00
Guillaume Chatelet
03a8e72720 [NFC] Preparatory work for D77292 2020-04-02 09:30:33 +00:00
Clement Courbet
b890445131 [ExpandMemCmp] Allow overlaping loads in the zero-relational case.
Summary:
This allows doing `memcmp(p, q, 7)` with 2 loads instead of a call to
memcmp.
This fixes part of PR45147.

Reviewers: spatel

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76133
2020-04-02 11:20:47 +02:00
Florian Hahn
ba00c0bef1 [CallSiteSplitting] Simplify isPredicateOnPHI & continue checking PHIs.
As pointed out by @thakis, currently CallSiteSplitting bails out after
checking the first PHI node. We should check all PHI nodes, until we
find one where call site splitting is beneficial.

This patch also slightly simplifies the code using BasicBlock::phis().

Reviewers: davidxl, junbuml, thakis

Reviewed By: davidxl

Differential Revision: https://reviews.llvm.org/D77089
2020-04-02 10:11:27 +01:00
Guillaume Chatelet
bf6dd4469b [Alignment][NFC] Use more Align versions of various functions
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: MatzeB, qcolombet, arsenm, sdardis, jvesely, nhaehnle, hiraditya, jrtc27, atanasyan, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77291
2020-04-02 09:00:53 +00:00
OCHyams
5a42c7fbee [NFC] Fix performance issue in LiveDebugVariables
When compiling AMDGPUDisassembler.cpp in a stage 1 trunk build with
CMAKE_BUILD_TYPE=RelWithDebInfo LLVM_USE_SANITIZER=Address LiveDebugVariables
accounts for 21.5% wall clock time. This fix reduces that to 1.2% by switching
out a linked list lookup with a map lookup.

Note that the linked list is still used to group UserValues by vreg. The vreg
lookups don't cause any problems in this pathological case.

This is the same idea as D68816, which was reverted, except that it is a less
intrusive fix.

Reviewed By: vsk

Differential Revision: https://reviews.llvm.org/D77226
2020-04-02 09:39:33 +01:00
Djordje Todorovic
df20828951 [Object] Add the method for checking if a section is a debug section
Different file formats have different naming style for the debug
sections. The method is implemented for ELF, COFF and Mach-O formats.

Differential Revision: https://reviews.llvm.org/D76276
2020-04-02 10:56:00 +02:00
Kristof Beyls
d97943eb3e Fix RUN line in AArch64/speculation-hardening.ll 2020-04-02 09:42:15 +01:00
Julian Lettner
e0089cc716 [lit] Improve handling of timeouts and max failures
This work prepares us for the overall goal of clean shutdown on user
keyboard interrupt [Ctrl+C].
2020-04-02 01:24:02 -07:00
WangTianQing
9f322059fe [X86] Add SERIALIZE instruction.
Summary: For more details about this instruction, please refer to the latest ISE document: https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference

Reviewers: craig.topper, RKSimon, LuoYuanke

Reviewed By: craig.topper

Subscribers: mgorny, hiraditya, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77193
2020-04-02 16:19:23 +08:00