Akira Hatanaka
3b3ee53886
Add an option to use a virtual register as the global base register instead of
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reserving a physical register ($gp or $28) for that purpose.
This will completely eliminate loads that restore the value of $gp after every
function call, if the register allocator assigns a callee-saved register, or
eliminate unnecessary loads if it assigns a temporary register.
example:
.cpload $25 // set $gp.
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.cprestore 16 // store $gp to stack slot 16($sp).
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jalr $25 // function call. clobbers $gp.
lw $gp, 16($sp) // not emitted if callee-saved reg is chosen.
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lw $2, 4($gp)
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jalr $25 // function call.
lw $gp, 16($sp) // not emitted if $gp is not live after this instruction.
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llvm-svn: 151402
2012-02-24 22:34:47 +00:00
Ahmed Charles
745c53c2a7
Remove dead code. Improve llvm_unreachable text. Simplify some control flow.
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llvm-svn: 150918
2012-02-19 11:37:01 +00:00
Jia Liu
cd92ae4cf2
remove Emacs-tag form .cpp files in Mips Backend, and fix some typo.
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llvm-svn: 150805
2012-02-17 08:55:11 +00:00
Jia Liu
ecc08b8cfe
add Emacs tag and fix some comment error in file headers
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llvm-svn: 150775
2012-02-17 01:23:50 +00:00
Bruno Cardoso Lopes
4ed60a4736
Cleanup Mips code and rename some variables. Patch by Jack Carter
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llvm-svn: 147383
2011-12-30 21:09:41 +00:00
Akira Hatanaka
7cb229496e
Detect unaligned loads/stores that have been added for Mips64 support.
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llvm-svn: 147234
2011-12-24 03:07:37 +00:00
Akira Hatanaka
5ac6df52af
Tidy up. Simplify logic. No functional change intended.
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llvm-svn: 146896
2011-12-19 19:52:25 +00:00
Akira Hatanaka
1c41fb2bb2
Expand .cprestore directive to multiple instructions if the offset does not fit
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in a 16-bit field.
llvm-svn: 146469
2011-12-13 03:09:05 +00:00
Evan Cheng
1acd685d87
Add bundle aware API for querying instruction properties and switch the code
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generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.
For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.
llvm-svn: 146026
2011-12-07 07:15:52 +00:00
Akira Hatanaka
13c76fc7a7
This patch makes the following changes necessary for MIPS' direct code emission.
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- lower unaligned loads/stores.
- encode the size operand of instructions INS and EXT.
- emit relocation information needed for JAL (jump-and-link).
llvm-svn: 145113
2011-11-23 22:19:28 +00:00
Akira Hatanaka
ef7310d4a2
Remove MipsMCSymbolRefExpr.
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llvm-svn: 144654
2011-11-15 18:20:08 +00:00
Bruno Cardoso Lopes
bc4e9ca90e
Mips MC object code emission improvements:
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"With this patch we can now generate runnable Mips code through LLVM
direct object emission. We have run numerous simple programs, both C
and C++ and with -O0 and -O3 from the output. The code is not production
ready, but quite useful for experimentation." Patch and message by
Jack Carter
llvm-svn: 144414
2011-11-11 22:58:42 +00:00
Bruno Cardoso Lopes
dc0559bff4
Properly handle Mips MC relocations and lower cpload and cprestore macros to MCInsts.
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Patch by Jack Carter.
llvm-svn: 144139
2011-11-08 22:26:47 +00:00
Benjamin Kramer
c597902ecc
Replace (Lower|Upper)caseString in favor of StringRef's newest methods.
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llvm-svn: 143891
2011-11-06 20:37:06 +00:00
Akira Hatanaka
8a43300a4f
Fix function isUnalignedLoadStore.
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llvm-svn: 141722
2011-10-11 22:04:01 +00:00
Akira Hatanaka
38d2ddcfac
Add patterns for unaligned load and store instructions and enable the
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instruction selector to generate them.
llvm-svn: 141471
2011-10-08 02:24:10 +00:00
Akira Hatanaka
d34925f313
Add enums and functions for symbols Mips64 uses.
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llvm-svn: 140295
2011-09-22 03:09:07 +00:00
Akira Hatanaka
88ce0f7440
Add a base class for Mips TargetMachines and add Mips64 TargetMachines.
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llvm-svn: 140233
2011-09-21 03:00:58 +00:00
Akira Hatanaka
45bb471537
O64 will not be supported.
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llvm-svn: 139421
2011-09-09 22:22:48 +00:00
Akira Hatanaka
f65d050693
Drop support for Mips1 and Mips2.
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llvm-svn: 139405
2011-09-09 20:45:50 +00:00
Evan Cheng
420bf5446c
Move TargetRegistry and TargetSelect from Target to Support where they belong.
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These are strictly utilities for registering targets and components.
llvm-svn: 138450
2011-08-24 18:08:43 +00:00
Akira Hatanaka
6eb513003d
Add support for half-word unaligned loads and stores.
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llvm-svn: 137848
2011-08-17 18:49:18 +00:00
Akira Hatanaka
12df91513e
Fix handling of double precision loads and stores when Mips1 is targeted.
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Mips1 does not support double precision loads or stores, therefore two single
precision loads or stores must be used in place of these instructions. This
patch treats double precision loads and stores as if they are legal
instructions until MCInstLowering, instead of generating the single precision
instructions during instruction selection or Prolog/Epilog code insertion.
Without the changes made in this patch, llc produces code that has the same
problem described in r137484 or bails out when
MipsInstrInfo::storeRegToStackSlot or loadRegFromStackSlot is called before
register allocation.
llvm-svn: 137711
2011-08-16 03:51:51 +00:00
Akira Hatanaka
c9c0190cbe
Define unaligned load and store.
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llvm-svn: 137515
2011-08-12 21:30:06 +00:00
Evan Cheng
040076bda2
Separate MCInstPrinter registration from AsmPrinter registration.
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llvm-svn: 135974
2011-07-25 21:20:24 +00:00
Akira Hatanaka
90fcf55a54
Lower MachineInstr to MC Inst and print to .s files.
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llvm-svn: 134661
2011-07-07 23:56:50 +00:00
Akira Hatanaka
ccdaa7946c
Rather than having printMemOperand change the way memory operands are printed
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based on a modifier, split it into two functions.
llvm-svn: 134637
2011-07-07 20:54:20 +00:00
Akira Hatanaka
382742199f
Change visibility of MipsAsmPrinter.
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llvm-svn: 134630
2011-07-07 20:10:52 +00:00
Akira Hatanaka
d3c031eb00
Reverse order of operands of address operand mem so that the base operand comes
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before the offset. This change will enable simplification of function
MipsRegisterInfo::eliminateFrameIndex.
llvm-svn: 134625
2011-07-07 18:57:00 +00:00
Akira Hatanaka
31119a50bc
Add missing return statement.
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llvm-svn: 134622
2011-07-07 18:27:36 +00:00
Akira Hatanaka
960f6898a6
Improve Mips back-end's handling of DBG_VALUE.
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llvm-svn: 134224
2011-07-01 01:04:43 +00:00
Akira Hatanaka
1e08980a21
Re-apply 132758 and 132768 which were speculatively reverted in 132777.
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llvm-svn: 133494
2011-06-21 00:40:49 +00:00
Eric Christopher
24dafa3dbc
Speculatively revert 132758 and 132768 to try to fix the Windows buildbots.
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llvm-svn: 132777
2011-06-09 16:03:19 +00:00
Akira Hatanaka
33ec063f3b
Initial support for inline asm memory operand constraints.
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llvm-svn: 132768
2011-06-09 03:31:05 +00:00
Bruno Cardoso Lopes
f6fa29e7a1
This patch implements the thread local storage. Implemented are General
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Dynamic, Initial Exec and Local Exec TLS models.
Patch by Sasa Stankovic
llvm-svn: 132322
2011-05-31 02:53:58 +00:00
Akira Hatanaka
161f211628
Enable printing of immediates that do not fit in 16-bit. .cprestore can have
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offsets that are larger than 0x10000.
llvm-svn: 132003
2011-05-24 21:22:21 +00:00
Akira Hatanaka
123ee4388c
Fix MipsAsmPrinter::printSavedRegsBitmaskChange. Remove functions and variables
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in MipsFunctionInfo that are no longer used.
llvm-svn: 131917
2011-05-23 20:34:30 +00:00
Akira Hatanaka
74d45b54f1
Reverse unnecessary changes made in r129606 and r129608. There is no change in functionality.
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llvm-svn: 129612
2011-04-15 21:51:11 +00:00
Akira Hatanaka
6f900185ed
Fix lines that have incorrect indentation or exceed 80 columns. There is no change in functionality.
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llvm-svn: 129606
2011-04-15 21:00:26 +00:00
Akira Hatanaka
6b700f35aa
Insert space before ';' to prevent warnings.
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llvm-svn: 128750
2011-04-02 00:15:58 +00:00
Akira Hatanaka
9257b524eb
Simplifies logic for printing target flags.
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llvm-svn: 128741
2011-04-01 21:41:06 +00:00
Akira Hatanaka
0b476a8e81
Modifies MipsAsmPrinter::isBlockOnlyReachableByFallthrough so that it handles delay slots correctly.
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llvm-svn: 128724
2011-04-01 18:57:38 +00:00
Bruno Cardoso Lopes
99619e5bef
Lowers block address. Currently asserts when relocation model is not PIC. Patch by Akira Hatanaka
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llvm-svn: 127027
2011-03-04 20:01:52 +00:00
Bruno Cardoso Lopes
5400401372
Remove (hopefully) all trailing whitespaces from the mips backend. Patch by Hatanaka, Akira
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llvm-svn: 127003
2011-03-04 17:51:39 +00:00
Anton Korobeynikov
cf5967630b
Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
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llvm-svn: 123170
2011-01-10 12:39:04 +00:00
Bruno Cardoso Lopes
0e14644599
Match a pattern generated by a dag combiner opt where:
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(select (load (load tga0)) (load tga1)) => (load (select (load tga0) tga1))
Thanks to Akira for pointing that.
llvm-svn: 121163
2010-12-07 19:00:20 +00:00
Anton Korobeynikov
269e7d3be1
Move hasFP() and few related hooks to TargetFrameInfo.
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llvm-svn: 119740
2010-11-18 21:19:35 +00:00
Chris Lattner
cec3b226a4
move all the target's asmprinters into the main target. The piece
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that should be split out is the InstPrinter (if a target is mc'ized).
This change makes all the targets be consistent.
llvm-svn: 119056
2010-11-14 18:43:56 +00:00
Anton Korobeynikov
9dc98b6a85
Separate MIPS asmprinter
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llvm-svn: 68383
2009-04-03 10:41:41 +00:00
Evan Cheng
3a7489a4cc
CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
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llvm-svn: 67668
2009-03-25 01:47:28 +00:00