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Commit Graph

411 Commits

Author SHA1 Message Date
Duraid Madina
11ff0a2a5f add what we need to fudge a 'floating point conditional move', this is
used to get FP div-by-zero working properly (shunt the right answer
depending on how frcpa sets its predicate output)

llvm-svn: 20954
2005-03-31 07:32:32 +00:00
Duraid Madina
7b5f67baf9 Emit .global @function and .global @object entries so the Intel ias
assembler may be used; identify LLVM output as such.

llvm-svn: 20892
2005-03-28 15:21:43 +00:00
Nate Begeman
f821401825 Change interface to LowerCallTo to take a boolean isVarArg argument.
llvm-svn: 20842
2005-03-26 01:29:23 +00:00
Chris Lattner
2e2035aa72 fix a compilation error, patch contributed by Bill Wendling!
llvm-svn: 20807
2005-03-24 05:12:48 +00:00
Nate Begeman
175a9f1cc6 Remove comments that are now meaningless from the pattern ISels, at Chris's
request.

llvm-svn: 20804
2005-03-24 04:39:54 +00:00
Alkis Evlogimenos
d8f23f17f0 Stop using deprecated interface.
llvm-svn: 20679
2005-03-19 09:22:17 +00:00
Duraid Madina
ad26d89f4a typo/denial
llvm-svn: 20663
2005-03-17 20:23:27 +00:00
Duraid Madina
341917d75b clean up warnings when building in release mode
llvm-svn: 20658
2005-03-17 19:00:40 +00:00
Duraid Madina
0b84eec44b OK, IA64 is statically linked into llc
llvm-svn: 20655
2005-03-17 18:37:05 +00:00
Duraid Madina
08bd58412a build the IA64 target as a .so for now
llvm-svn: 20654
2005-03-17 18:29:04 +00:00
Duraid Madina
79022e1b87 and so it begins...
PHASE 1: write instruction selector
PHASE 2: ???
PHASE 3: profit!

llvm-svn: 20652
2005-03-17 18:17:03 +00:00