RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 11:42:57 +01:00
Code Issues Projects Releases Wiki Activity
39,897 Commits 4 Branches 5 Tags 704 MiB
3bde8f2e24
Commit Graph

411 Commits

Author SHA1 Message Date
Duraid Madina
81b9a8f8f7 fix storing booleans (grawp missed this one) 
llvm-svn: 26120
 2006-02-11 07:33:17 +00:00
Duraid Madina
a514d8d8a6 now short immediates will get matched (previously constants were all 
triggering movl 64bit imm fat instructions)

llvm-svn: 26119
 2006-02-11 07:32:15 +00:00
Evan Cheng
6bd0f9c4ba Match getTargetNode() changes (now return SDNode* instead of SDOperand). 
llvm-svn: 26085
 2006-02-09 07:17:49 +00:00
Evan Cheng
521e5a1bfe Change Select() from 
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);

llvm-svn: 26067
 2006-02-09 00:37:58 +00:00
Evan Cheng
fb902782e8 Use SelectRoot() as entry of any tblgen based isel. 
llvm-svn: 25997
 2006-02-05 06:46:41 +00:00
Nate Begeman
0be60963bd Fix some of the stuff in the PPC README file, and clean up legalization 
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.

llvm-svn: 25875
 2006-02-01 07:19:44 +00:00
Evan Cheng
f115c17f23 Allow the specification of explicit alignments for constant pool entries. 
llvm-svn: 25855
 2006-01-31 22:23:14 +00:00
Chris Lattner
5f0a3df176 Targets all now request ConstantFP to be legalized into TargetConstantFP. 
'fpimm' in .td files is now TargetConstantFP.

llvm-svn: 25771
 2006-01-29 06:26:08 +00:00
Nate Begeman
87c2c0e66b Implement Promote for VAARG, and allow it to be custom promoted for people 
who don't want the default behavior (Alpha).

llvm-svn: 25726
 2006-01-28 03:14:31 +00:00
Chris Lattner
d467a681e9 Remove some dead code 
llvm-svn: 25719
 2006-01-28 00:02:51 +00:00
Nate Begeman
d2c6fbef4a Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for 
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.

llvm-svn: 25696
 2006-01-27 21:09:22 +00:00
Chris Lattner
20d4194a0d PHI and INLINEASM are now built-in instructions provided by Target.td 
llvm-svn: 25674
 2006-01-27 01:46:15 +00:00
Duraid Madina
f868d1777b fix stack corruption! Previously, 16-byte whole-FP-register stores were 
being treated as needing only 8 bytes (though they were 16 byte aligned.)

This should fix a bunch of tests - anyone have any comments, though?

  - in Target.td , SpillSize and SpillAlignment seem dead - is this what
    Size and Alignment do now?
  - in CodeGenRegisters.h/CodeGenTarget.cpp , DeclaredSpillSize and
    DeclaredSpillAlignment seem dead.
  - there are a bunch of comments here and there that don't clearly
    distinguish between 'size' and 'spillsize' etc. hmm.

llvm-svn: 25644
 2006-01-26 09:45:03 +00:00
Duraid Madina
13335846a8 some hoovering 
llvm-svn: 25643
 2006-01-26 09:08:31 +00:00
Evan Cheng
7da6daadc7 Set SchedulingForLatency to be the default scheduling preference for all. 
llvm-svn: 25607
 2006-01-25 18:52:42 +00:00
Nate Begeman
c29fac7fce First part of bug 680: 
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.

llvm-svn: 25606
 2006-01-25 18:21:52 +00:00
Evan Cheng
c368fb710f Default scheduling preference is SchedulingForLatency. 
llvm-svn: 25603
 2006-01-25 09:15:54 +00:00
Duraid Madina
7d51a9b8e3 add bundling! well not really, for now it's just stop-insertion. 
llvm-svn: 25593
 2006-01-25 02:23:38 +00:00
Duraid Madina
fa9095ff95 die, die!! r15, you are not callee-saved 
llvm-svn: 25527
 2006-01-23 06:11:45 +00:00
Duraid Madina
43e8616515 fix register corruption! (my god.) r15 is a scratch reg, using that as 
a frame pointer is a pretty doofus thing to do. use r5 instead, and
mark it callee-saved, coz that's what it is!

llvm-svn: 25526
 2006-01-23 06:08:46 +00:00
Chris Lattner
aafc339b4e Add explicit #includes of <iostream> 
llvm-svn: 25515
 2006-01-22 23:41:00 +00:00
Duraid Madina
019bfb760c insignificant, but next up is proper stack frame layout! 
llvm-svn: 25497
 2006-01-21 14:27:19 +00:00
Duraid Madina
2715941e86 remove RET hack, add proper support for rets (watching out for ret voids) 
llvm-svn: 25486
 2006-01-20 20:24:31 +00:00
Duraid Madina
94bace229d fix sext breakage: now we correctly deal with functions that return 
int vs uint

llvm-svn: 25478
 2006-01-20 16:10:05 +00:00
Duraid Madina
b18a42fd3a fix storing bools! eek! 
llvm-svn: 25476
 2006-01-20 03:40:25 +00:00
Duraid Madina
069b517767 fix boolean XOR (which fixes up comparisons..) 
llvm-svn: 25462
 2006-01-19 15:18:56 +00:00
Duraid Madina
4b75614c9c BOOM! 
llvm-svn: 25460
 2006-01-19 14:14:11 +00:00
Duraid Madina
08771721f9 click click 
llvm-svn: 25459
 2006-01-19 14:13:11 +00:00
Duraid Madina
1946b2ff30 fix calls that return f32 
llvm-svn: 25455
 2006-01-19 08:31:51 +00:00
Duraid Madina
c667c360e3 oops, this shouldn't have gotten in 
llvm-svn: 25388
 2006-01-17 03:09:48 +00:00
Duraid Madina
365cb4f82d use proper (82-bit) spills/fills when spilling FP regs, so that 
divides don't get broken. this fixes obsequi, smg2000, and probably
a bunch of other stuff (tm)

llvm-svn: 25385
 2006-01-17 02:04:52 +00:00
Duraid Madina
f9cc57d93b fixing divides 
llvm-svn: 25383
 2006-01-17 01:19:49 +00:00
Duraid Madina
d359468147 fixing divides: FP should now be 100%, and integers are fine too 
unless you try to div/mod 0 by anything, in which case you will
get some cute number, and not 0, which is bad.

llvm-svn: 25358
 2006-01-16 14:33:04 +00:00
Duraid Madina
12da32f440 fix division! again!! pattern isel, prepare to die. 
llvm-svn: 25353
 2006-01-16 06:33:38 +00:00
Duraid Madina
eb89d7a5d1 explain that r12 is the stack pointer reg 
llvm-svn: 25336
 2006-01-15 09:45:23 +00:00
Chris Lattner
be7efab5dc Cleanup IA64ISD, tell the graph drawer what the symbolic names for the enums are. 
llvm-svn: 25324
 2006-01-14 22:27:21 +00:00
Nate Begeman
85b2dc0c4e bswap implementation 
llvm-svn: 25312
 2006-01-14 03:14:10 +00:00
Duraid Madina
e8b42dc96d don't be a doofus - this fixes storing bools 
llvm-svn: 25274
 2006-01-13 10:28:25 +00:00
Chris Lattner
ea59d9a498 new nodes 
llvm-svn: 25271
 2006-01-13 02:40:58 +00:00
Duraid Madina
f6131d02a9 sabre's (correct) fix means these guys need to be flagged as well (else 
the scheduler will complain)

llvm-svn: 25241
 2006-01-12 03:28:40 +00:00
Chris Lattner
2514d94ca3 Fix an itanium call lowering bug for duraid 
llvm-svn: 25235
 2006-01-12 01:33:08 +00:00
Nate Begeman
2b45fdffcb Missed a spot. 
llvm-svn: 25233
 2006-01-11 23:20:28 +00:00
Nate Begeman
cff96008ac Add bswap, rotl, and rotr nodes 
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them

llvm-svn: 25222
 2006-01-11 21:21:00 +00:00
Chris Lattner
f9e32005dd tblgen does this now 
llvm-svn: 25220
 2006-01-11 19:53:22 +00:00
Duraid Madina
52e3f53ea5 cleanup GETFD 
llvm-svn: 25198
 2006-01-11 03:50:40 +00:00
Duraid Madina
3246f5317b this just might work 
llvm-svn: 25195
 2006-01-11 01:38:07 +00:00
Duraid Madina
242414e621 add support for selecting bools 
FIXME: this is commented out because it makes tblgen go a bit fruity
llvm-svn: 25193
 2006-01-11 01:21:12 +00:00
Chris Lattner
6a671ed26f silence a bogus warning 
llvm-svn: 25185
 2006-01-10 19:45:18 +00:00
Duraid Madina
e2986589aa heh, 'sif it'd be a legalizer bug. 
llvm-svn: 25172
 2006-01-10 05:26:01 +00:00
Duraid Madina
7034571679 support functions that return bool (this "should" work but doesn't, 
*maybe* due to a legalizer bug.)

llvm-svn: 25171
 2006-01-10 05:08:25 +00:00
Chris Lattner
88239024ca silence a bogus gcc warning 
llvm-svn: 25129
 2006-01-06 17:56:38 +00:00
Jim Laskey
41b3ee3c4f Had expand logic backward. 
llvm-svn: 25105
 2006-01-05 01:47:43 +00:00
Jim Laskey
5eddaee9f3 Added initial support for DEBUG_LABEL allowing debug specific labels to be 
inserted in the code.

llvm-svn: 25104
 2006-01-05 01:25:28 +00:00
Duraid Madina
2ea271c8bf nasty paste-o, calls passing more than 8 arguments along were having 
args >8 put into the wrong place

llvm-svn: 25027
 2005-12-27 10:17:03 +00:00
Evan Cheng
231b11ba87 Added field noResults to Instruction. 
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.

llvm-svn: 25017
 2005-12-26 09:11:45 +00:00
Duraid Madina
303d3f1f96 unbreak calls, a few more tests should run. Tomorrow: bugpoint! 
llvm-svn: 25010
 2005-12-25 14:09:08 +00:00
Duraid Madina
00fbe7a7e4 we don't feed our call instructions extra operands 
llvm-svn: 25009
 2005-12-25 14:07:01 +00:00
Chris Lattner
73f38507d9 remove dead code 
llvm-svn: 24965
 2005-12-22 21:16:08 +00:00
Duraid Madina
e009e40008 this is a hack, which may or may not hang around. In short: 
whimper out of doing things the Right Way, and hack up a generic
'BRCALL' instruction, that gets generated when calls are lowered.
This gets selected by hand in the DAG isel, where it gets turned
into real (i.e. in tablegen) br.call instructions.

BUG: this dies on void calls, but seems to work otherwise?
llvm-svn: 24952
 2005-12-22 13:29:14 +00:00
Duraid Madina
325c2cc07b we can't do this directly in lowering, so we need this case 
llvm-svn: 24951
 2005-12-22 07:14:45 +00:00
Duraid Madina
bf2a5de0d5 oops, back this out 
llvm-svn: 24950
 2005-12-22 07:13:51 +00:00
Duraid Madina
d87738a097 we can't all have brains now, can we 
llvm-svn: 24948
 2005-12-22 06:41:39 +00:00
Duraid Madina
b43dc0ff5b this should take care of calls to varadic functions, but it doesn.,t 
BUG: calling printf(string, float) will load the float into the wrong
register, completely forget about loading the string, etce

llvm-svn: 24947
 2005-12-22 06:39:57 +00:00
Duraid Madina
d1c9d5ae4d we need to emit the getf.d instruction in lowering, so add it 
to IA64ISD

llvm-svn: 24946
 2005-12-22 06:38:38 +00:00
Duraid Madina
47cd4eeab0 I shoulda done this a *long* time ago (tm): implement calls properly, 
i.e. r1/r12/rp are saved/restored regardless of scheduling/luck

TODO: calls to external symbols, indirect (function descriptor) calls,
      performance (we're being paranoid right now)

BUG: the code for handling calls to vararg functions breaks if FP
args are passed (this will make printf() go haywire so a bunch of
tests will fail)

BUG: this seems to trigger some legalize nastiness
llvm-svn: 24942
 2005-12-22 04:07:40 +00:00
Duraid Madina
22eb8a3fb4 kill SelectCALL() in the DAG isel, we handle this in lowering now, like 
SPARCv8. (we copy sparcv8's workaround for tablegen not being nice about
ISD::CALL/TAILCALL)

llvm-svn: 24941
 2005-12-22 03:58:17 +00:00
Duraid Madina
2c940da498 update tablegen files - nothing to see here 
llvm-svn: 24939
 2005-12-22 03:56:03 +00:00
Jim Laskey
d82881490c Disengage DEBUG_LOC from non-PPC targets. 
llvm-svn: 24919
 2005-12-21 20:51:37 +00:00
Chris Lattner
487742bf85 Add some explicit type casts so that tblgen knows the type of the shiftamount, which is not necessarily the same as the type being shifted. 
llvm-svn: 24595
 2005-12-05 02:34:29 +00:00
Chris Lattner
b86aeb6db6 IA64 doesn't support the LOCATION node, and for some reason the ISelPattern 
stuff isn't using ISelLowering.cpp

llvm-svn: 24567
 2005-12-01 18:19:53 +00:00
Nate Begeman
811a41a87c Support multiple ValueTypes per RegisterClass, needed for upcoming vector 
work.  This change has no effect on generated code.

llvm-svn: 24563
 2005-12-01 04:51:06 +00:00
Chris Lattner
a7d31504f9 Pay attn to the node returned by SelectNodeTo 
llvm-svn: 24551
 2005-11-30 23:02:08 +00:00
Nate Begeman
84be54b731 No longer track value types for asm printer operands, and remove them as 
an argument to every operand printing function.  Requires some slight
tweaks to x86, the only user.

llvm-svn: 24541
 2005-11-30 18:54:35 +00:00
Chris Lattner
47feb1ecbb No targets support line number info yet. 
llvm-svn: 24513
 2005-11-29 06:16:21 +00:00
Duraid Madina
9c2283e7c7 add support for dynamic_stackalloc to the dag isel (thanks andrew ;) 
next up: support argument passing in memory, not just registers

llvm-svn: 24490
 2005-11-25 07:49:25 +00:00
Duraid Madina
5fe9d39b8d add support for div/rem to the dag->dag isel. yay. 
llvm-svn: 24472
 2005-11-21 14:14:54 +00:00
Chris Lattner
f4b9a79b79 Eliminate unneeded intermediate class. Move doFinalizeMethod to bottom of 
file.

llvm-svn: 24470
 2005-11-21 08:40:17 +00:00
Chris Lattner
b24983c574 Start using shared asmprinter Constant Pool emitter, use shorter cpi names. 
llvm-svn: 24469
 2005-11-21 08:38:26 +00:00
Chris Lattner
3e2c6c1d15 Adjust to capitalized AsmPrinter method names 
llvm-svn: 24456
 2005-11-21 07:51:23 +00:00
Chris Lattner
a0905b348a Use PrivateGlobalPrefix for basic block labels 
llvm-svn: 24452
 2005-11-21 07:39:22 +00:00
Chris Lattner
b273e59ae8 Start using SwitchSection, allowing globals and functions to be emitted 
to specific sections.  Delete some dead functions copied from the X86 backend.

llvm-svn: 24449
 2005-11-21 07:26:04 +00:00
Chris Lattner
e5d0064a9d Rename SwitchSection -> switchSection to avoid conflicting with a future 
change.

llvm-svn: 24443
 2005-11-21 06:55:27 +00:00
Chris Lattner
07ea769304 Start using PrivateGlobalPrefix correctly 
llvm-svn: 24442
 2005-11-21 06:51:52 +00:00
Duraid Madina
a60348b6b2 add FP select. next up - divide! 
llvm-svn: 24346
 2005-11-14 01:17:30 +00:00
Chris Lattner
3fdc97d460 Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build. 
llvm-svn: 24233
 2005-11-08 02:11:51 +00:00
Duraid Madina
fb806bb309 add support for storing and returning bools 
llvm-svn: 24228
 2005-11-07 03:11:02 +00:00
Duraid Madina
f0469f0376 just some random hacking - calls (particularly indirect) need a lot of 
love (especially with -sched=simple)

llvm-svn: 24225
 2005-11-06 13:43:30 +00:00
Duraid Madina
cf11aefc91 ask for 16-byte aligned jmpbufs. This should unbreak C++ on IA64 (and 
a bunch of other things) but is currently ignored by the code
generator.

llvm-svn: 24206
 2005-11-06 04:29:30 +00:00
Duraid Madina
c2c2e353ee oops, forgot to load GP for indirect calls, though the old code now commented 
out failed (e.g. methcall) - now the code compiles, though it's not quite
right just yet (tm) ;)

would fix this but it's 3am! :O

llvm-svn: 24186
 2005-11-04 17:55:53 +00:00
Duraid Madina
e8456a9175 kill redundant SP/GP/RP save/restores across calls 
llvm-svn: 24183
 2005-11-04 10:01:10 +00:00
Duraid Madina
1c632094d4 add support for loading bools 
llvm-svn: 24182
 2005-11-04 09:59:06 +00:00
Duraid Madina
f5824e4fa3 fun with predicates! (add TRUNC i64->i1, AND i1 i1, fix XOR i1 i1) 
llvm-svn: 24175
 2005-11-04 00:57:56 +00:00
Duraid Madina
4adb8143ce add pattern to load constant 0 into a predicate reg 
llvm-svn: 24164
 2005-11-03 10:09:32 +00:00
Chris Lattner
cfb7edb4ed Fix a bug that prevented this pattern from matching 
llvm-svn: 24161
 2005-11-03 05:45:34 +00:00
Duraid Madina
7975eea64d "fix" support for FP constants (this code asserts in the scheduler, 
though)

llvm-svn: 24152
 2005-11-02 07:32:59 +00:00
Duraid Madina
e89d6f5197 add F0 and F1 to the FP register class 
llvm-svn: 24151
 2005-11-02 07:30:39 +00:00
Chris Lattner
04749a46a0 This works now 
llvm-svn: 24150
 2005-11-02 06:49:37 +00:00
Duraid Madina
94dd783c92 add support for SELECT to TargetSelectionDAG.td, add support for 
selecting ints to IA64, and a few other ia64 bits and pieces

llvm-svn: 24147
 2005-11-02 02:37:18 +00:00
Duraid Madina
b743794294 add support for loading FP constants +0.0 and +1.0 to the dag isel, 
stop pretending -0.0 and -1.0 are machine constants

llvm-svn: 24146
 2005-11-02 02:35:04 +00:00
Duraid Madina
28dbc1f9d0 heh, scheduling was easy? 
need to send chris, jim and sampo a box of fish each

llvm-svn: 24135
 2005-11-01 05:49:08 +00:00
Duraid Madina
6314b5fc35 FORTRAN!!! :( and other similarly unfortunate things mean that on ia64 
one sometimes needs to pass FP args in both FP *and* integer registers.

llvm-svn: 24134
 2005-11-01 05:46:16 +00:00
Duraid Madina
7f2a0b1290 so tablegen was thinking I might want to convert FPs to predicates. 
clever little tablegen!

llvm-svn: 24133
 2005-11-01 03:32:15 +00:00
Duraid Madina
c754478fbe add support for int->FP and FP->int ops, and add ia64 patterns for these 
llvm-svn: 24132
 2005-11-01 03:07:25 +00:00
Duraid Madina
ba4b2d2a1b add zeroextend predicate->integer 
llvm-svn: 24131
 2005-11-01 01:29:55 +00:00
Duraid Madina
76abe0f46c add FP compares and implicit register defs to the dag isel 
llvm-svn: 24118
 2005-10-31 01:42:11 +00:00
Duraid Madina
5168a7dea5 fix some broken comparisons, this affected the Pattern isel too. 
llvm-svn: 24109
 2005-10-30 10:14:19 +00:00
Duraid Madina
9c1cbbe5d1 add some FP stuff, some mix.* stuff, and constant pool support to the 
DAG instruction selector, which should be destroyed one day (in the pattern
isel also) since ia64 can pack any constant in the instruction stream

llvm-svn: 24094
 2005-10-29 16:08:30 +00:00
Duraid Madina
6280da9a88 add shladd 
llvm-svn: 24080
 2005-10-29 04:13:40 +00:00
Chris Lattner
0a69a4a837 These are autogenerated 
llvm-svn: 24063
 2005-10-28 18:26:52 +00:00
Duraid Madina
251185e626 DAG->DAG instruction selection for ia64! "hello world" works, not much else. 
use -enable-ia64-dag-isel to turn this on

TODO: delete lowering stuff from the pattern isel
    : get operations on predicate bits working
    : get other bits of pseudocode going
    : use sampo's mulh/mull-using divide-by-constant magic
    : *so* many patterns ("extr", "tbit" and "dep" will be fun :)
    : add FP
    : add a JIT!
    : get it working 100%

in short: this'll be happier in a couple of weeks, but it's here now so
the tester can make me feel guilty sooner.

OTHER: there are a couple of fixes to the pattern isel, in particular
making the linker happy with big blobs of fun like pypy.

llvm-svn: 24058
 2005-10-28 17:46:35 +00:00
Chris Lattner
110c713ccc remove dead stuff 
llvm-svn: 24054
 2005-10-28 04:58:24 +00:00
Chris Lattner
77b4595a7b Eliminate getClass, it is not needed 
llvm-svn: 24053
 2005-10-28 04:57:11 +00:00
Nate Begeman
5a915709c3 Don't generate operations that aren't yet supported 
llvm-svn: 23858
 2005-10-21 01:52:45 +00:00
Chris Lattner
9be9eb2f7f Fix CodeGen/Generic/bool-to-double.ll 
llvm-svn: 23652
 2005-10-07 04:50:48 +00:00
Chris Lattner
49117a5dcc these registers don't belong to any register classes, so don't mark them 
as callee save.  They can never be generated by the compiler.

llvm-svn: 23551
 2005-09-30 06:42:24 +00:00
Chris Lattner
3c59b33016 these methods get extra args 
llvm-svn: 23538
 2005-09-30 01:30:55 +00:00
Chris Lattner
d3b3d07c41 Add FP versions of the binary operators, keeping the int and fp worlds seperate. 
Though I have done extensive testing, it is possible that this will break
things in configs I can't test.  Please let me know if this causes a problem
and I'll fix it ASAP.

llvm-svn: 23505
 2005-09-28 22:29:17 +00:00
Chris Lattner
cd5eeef9ee Give all operands names 
llvm-svn: 23357
 2005-09-14 21:11:13 +00:00
Chris Lattner
1f7f2544fc ignore generated files 
llvm-svn: 23263
 2005-09-07 23:47:44 +00:00
Chris Lattner
eb4736b128 Handle ANY_EXTEND like ZERO_EXTEND. Simplify the extend/truncate code on 
the observation that it only has to handle i1 -> i64 and i64 -> i1.

llvm-svn: 23201
 2005-09-02 00:15:30 +00:00
Jim Laskey
f32ef9a37f 1. Use SubtargetFeatures in llc/lli. 
2. Propagate feature "string" to all targets.

3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.

llvm-svn: 23192
 2005-09-01 21:38:21 +00:00
Chris Lattner
439ef36320 Fix a bug in my previous checkin 
llvm-svn: 23082
 2005-08-26 17:18:44 +00:00
Chris Lattner
a31708e6b3 Change ConstantPoolSDNode to actually hold the Constant itself instead of 
putting it into the constant pool.  This allows the isel machinery to
create constants that it will end up deciding are not needed, without them
ending up in the resultant function constant pool.

llvm-svn: 23081
 2005-08-26 17:15:30 +00:00
Chris Lattner
4349a69f74 fix a warning in optimized build 
llvm-svn: 23030
 2005-08-25 00:03:21 +00:00
Chris Lattner
ef8f06856f Fix a crash I introduced into the IA64 backend with my copyfromreg change. 
It used to crash on any function that took float arguments.

llvm-svn: 22973
 2005-08-22 21:33:11 +00:00
Chris Lattner
36b8efcedd Add a pass name for -time-passes output 
llvm-svn: 22970
 2005-08-22 18:28:09 +00:00
Duraid Madina
06affa0edd reenable collapse of loadimm+AND -> dep.z (thanks guys) 
llvm-svn: 22944
 2005-08-21 15:43:53 +00:00
Jim Laskey
43192e173f Repair an out by one error for IA64. 
llvm-svn: 22942
 2005-08-20 11:05:23 +00:00
Chris Lattner
2ac3fd08d2 Split RegisterClass 'Methods' into MethodProtos and MethodBodies 
llvm-svn: 22929
 2005-08-19 19:13:20 +00:00
Chris Lattner
9d61d4a3e4 Put register classes in namespaces 
llvm-svn: 22924
 2005-08-19 18:50:46 +00:00
Chris Lattner
f0b42a6f29 This code has always been dead on itanium 
llvm-svn: 22916
 2005-08-19 18:34:37 +00:00
Duraid Madina
4efc0b6f2b a bugfix (up top) and a quick repair job: disable generation of dep.z 
(which died about a week ago) so we're back to load-(2^n-1)-then-AND
sequences. slow, but things should now be Almost Completely Working,
modulo those pesky alignment/ABI issues.

llvm-svn: 22904
 2005-08-19 13:25:50 +00:00
Chris Lattner
5194ff37c4 Mark some instructions as variable_ops, and PSEUDO_ALLOC as taking a GPR. 
I'm not convinced this is all of them,  but I can't do much testing, because
IA64 LLC crashes on big programs :(

llvm-svn: 22892
 2005-08-19 00:47:42 +00:00
Chris Lattner
583658a766 update the backends to work with the new CopyFromReg/CopyToReg/ImplicitDef nodes 
llvm-svn: 22807
 2005-08-16 21:56:37 +00:00
Nate Begeman
f6b6378f23 Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty 
fixme from the PowerPC backend.  Emit slightly better code for legalizing
select_cc.

llvm-svn: 22805
 2005-08-16 19:49:35 +00:00
Duraid Madina
6325af5006 sorry!! this is temporary; for some reason the nasty constmul code seems to 
be an infinite loop when using g++-4.0.1*, this kills the ia64 nightly
tester. A proper fix shall be forthcoming!!! thanks for not killing me. :)

llvm-svn: 22748
 2005-08-10 12:38:57 +00:00
Chris Lattner
1277703a48 Update the targets to the new SETCC/CondCodeSDNode interfaces. 
llvm-svn: 22729
 2005-08-09 20:21:10 +00:00
Chris Lattner
cc8ae687e1 Update to use the new MathExtras.h support for log2 computation. 
Patch contributed by Jim Laskey!

llvm-svn: 22594
 2005-08-02 19:26:06 +00:00
Jeff Cohen
bd51ec7461 Eliminate all remaining tabs and trailing spaces. 
llvm-svn: 22523
 2005-07-27 06:12:32 +00:00
Chris Lattner
ffaf40a143 Change *EXTLOAD to use an VTSDNode operand instead of being an MVTSDNode. 
This is the last MVTSDNode.

This allows us to eliminate a bunch of special case code for handling
MVTSDNodes.

Also, remove some uses of dyn_cast that should really be cast (which is
cheaper in a release build).

llvm-svn: 22368
 2005-07-10 01:56:13 +00:00
Chris Lattner
273b81e0c0 Change TRUNCSTORE to use a VTSDNode operand instead of being an MVTSTDNode 
llvm-svn: 22366
 2005-07-10 00:29:18 +00:00
Chris Lattner
199560c668 Make several cleanups to Andrews varargs change: 
1. Pass Value*'s into lowering methods so that the proper pointers can be
   added to load/stores from the valist
2. Intrinsics that return void should only return a token chain, not a token
   chain/retval pair.
3. Rename LowerVAArgNext -> LowerVAArg, because VANext is long gone.
4. Now that we have Value*'s available in the lowering methods, pass them
   into any load/stores from the valist that are emitted

llvm-svn: 22339
 2005-07-05 19:58:54 +00:00
Chris Lattner
06282f51cf Refactor the addPassesToEmitAssembly interface into a addPassesToEmitFile 
interface.

llvm-svn: 22282
 2005-06-25 02:48:37 +00:00
Andrew Lenharth
4fd2bde906 If we support structs as va_list, we must pass pointers to them to va_copy 
See last commit for LangRef, this implements it on all targets.

llvm-svn: 22273
 2005-06-22 21:04:42 +00:00
Andrew Lenharth
a9214fec08 core changes for varargs 
llvm-svn: 22254
 2005-06-18 18:34:52 +00:00
Duraid Madina
44ac7502fd re-enable direct calls, this should just be a performance boost 
llvm-svn: 22148
 2005-05-20 11:39:17 +00:00
Duraid Madina
03a7327d63 make angry compilers happy again 
llvm-svn: 22054
 2005-05-15 14:44:13 +00:00
Chris Lattner
93007dda7d treat TAILCALL nodes identically to CALL nodes 
llvm-svn: 21977
 2005-05-13 20:29:26 +00:00
Chris Lattner
9d788e93a6 Add an isTailCall flag to LowerCallTo 
llvm-svn: 21958
 2005-05-13 18:50:42 +00:00
Chris Lattner
094bbfcebb rename the ADJCALLSTACKDOWN/ADJCALLSTACKUP nodes to be CALLSEQ_START/BEGIN. 
llvm-svn: 21915
 2005-05-12 23:24:06 +00:00
Chris Lattner
7e08dd591c Pass in Calling Convention to use into LowerCallTo 
llvm-svn: 21899
 2005-05-12 19:56:45 +00:00
Duraid Madina
b9062e56cf add the popcount instruction and support this in the isel 
the primary user of this will probably end up being find-first-set-bit/find-
last-set-bit, which i'll get around to...

llvm-svn: 21860
 2005-05-11 05:16:09 +00:00
Chris Lattner
d5d2886ee7 No really IA*64* :) 
llvm-svn: 21858
 2005-05-11 05:03:56 +00:00
Duraid Madina
64a52fc615 fix and cleanup constmul code a bit, this fixes mediabench/toast and 
probably a couple of other tests.

llvm-svn: 21814
 2005-05-09 13:18:34 +00:00
Andrew Lenharth
8e2beec4d1 fix typo 
llvm-svn: 21693
 2005-05-04 19:25:37 +00:00
Duraid Madina
4d9c8f8dce support multiplication by constant negative integers 
this constmul code is still buggy though, so beware. mul by 7427 is currently
broken, for example. will fix it when I get a moment :)

llvm-svn: 21652
 2005-05-02 07:27:14 +00:00
Duraid Madina
7a185a79a5 add support for bools to SELECT, this fixes Prolangs-C/bison from the 
testsuite, however 09-vor is still dead (hopefully for other reasons!)

llvm-svn: 21651
 2005-05-02 06:41:13 +00:00
Chris Lattner
ce0d8c2408 This target doesn't support the FSIN/FCOS/FSQRT nodes yet 
llvm-svn: 21633
 2005-04-30 04:26:06 +00:00
Andrew Lenharth
2a00530fa7 Implement Value* tracking for loads and stores in the selection DAG. This enables one to use alias analysis in the backends. 
(TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*.  Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null.

llvm-svn: 21599
 2005-04-27 20:10:01 +00:00
Duraid Madina
2f8f3f018d clean up some warnings 
llvm-svn: 21590
 2005-04-27 11:57:39 +00:00
Duraid Madina
90bcae7fd2 constmul bugfix: multiply by 27611 was broken 
llvm-svn: 21564
 2005-04-26 09:42:50 +00:00
Duraid Madina
675a0b9769 clean up the code! (oops) lots more cleaning left, however. 
llvm-svn: 21563
 2005-04-26 08:43:47 +00:00
Duraid Madina
ee826ec8f6 * Add code to reduce multiplies by constant integers to shifts, adds and 
subtracts. This is a very rough and nasty implementation of Lefevre's
  "pattern finding" algorithm. With a few small changes though, it should
  end up beating most other methods in common use, regardless of the size
  of the constant (currently, it's often one or two shifts worse)

  TODO: rewrite it so it's not hideously ugly (this is a translation from
        perl, which doesn't help ;)
        bypass most of it for multiplies by 2^n+1
	(eventually) teach it that some combinations of shift+add are
	cheaper than others (e.g. shladd on ia64, scaled adds on alpha)
	get it to try multiple booth encodings in search of the cheapest
	routine
	make it work for negative constants

  This is hacked up as a DAG->DAG transform, so once I clean it up I hope
  it'll be pulled out of here and put somewhere else. The only thing backends
  should really have to worry about for now is where to draw the line
  between using this code vs. going ahead and doing an integer multiply
  anyway.

llvm-svn: 21560
 2005-04-26 07:23:02 +00:00
Misha Brukman
66d3c6e020 Convert tabs to spaces 
llvm-svn: 21452
 2005-04-22 17:54:37 +00:00
Misha Brukman
1fdf39f2ea Remove trailing whitespace 
llvm-svn: 21424
 2005-04-21 23:13:11 +00:00
Duraid Madina
0c40c548c0 print negative 64 bit immediates as negative numbers, makes things a little 
easier on the eyes, not that numbers like 18446744073709541376 are bad or
anything

llvm-svn: 21300
 2005-04-14 10:08:01 +00:00
Duraid Madina
b8dfae92e9 oops, this stopped us turning movl r4=0xFFFFFFFF;; and rX, r4 into zxt4 
llvm-svn: 21299
 2005-04-14 10:06:35 +00:00
Duraid Madina
eb4c15b42c we have zextloads, not sextloads! 
llvm-svn: 21296
 2005-04-14 08:37:32 +00:00
Duraid Madina
b9d2d9ac63 * add the shladd instruction 
* fold left shifts of 1, 2, 3 or 4 bits into adds

  This doesn't save much now, but should get a serious workout once
  multiplies by constants get converted to shift/add/sub sequences.
  Hold on! :)

llvm-svn: 21282
 2005-04-13 06:12:04 +00:00
Duraid Madina
67e553e521 * if ANDing with a constant of the form: 
0x00000..00FFF..FF
      ^      ^
      ^      ^
    any number of
    0's followed by
    some number of
    1's

    then we use dep.z to just paste zeros over the input. For the special
    cases where this is zxt1/zxt2/zxt4, we use those instructions instead,
    because we're all about readability!!!
    that's what it's about!! readability!

  *twitch* ;D

llvm-svn: 21279
 2005-04-13 04:50:54 +00:00
Chris Lattner
a2e92e69da Remove special handling of ZERO_EXTEND_INREG. This pessimizes code, causing 
things like this:

       mov r9 = 65535;;
       and r8 = r8, r9;;

To be emitted instead of:

        zxt2 r8 = r8;;

To get this back, the selector for ISD::AND should recognize this case.

llvm-svn: 21269
 2005-04-13 02:41:52 +00:00
Duraid Madina
39fcec1541 * OK, after changing to use liveIn/liveOut instead of IDEFs, 
to avoid redundant mov out3=r44 type instructions, we need to
tell the register allocator the truth about out? registers.

FIXME: unfortunately, since the list of allocatable registers is immutable,
we can't simply 'delete r127' from the allocation order, say, if 'out0' is
used. The only correct thing we can do is have a linear order of regs:

out7, out6 ... out2, out1, out0, r32, r33, r34 ... r126, r127

and slide a 'window' of 96 registers along this line, depending on how many
of the out? regs a function actually uses. The only downside of this is
that the out? registers will be allocated _first_, which makes the
resulting assembly ugly. :( Note this in the README. Hope this gets fixed
soon. :) (note the 3rd person speech there)

llvm-svn: 21252
 2005-04-12 18:42:59 +00:00
Chris Lattner
be2dceff48 Put out* into the allocation order, allowing the register allocator to 
coallesce moves into outgoing args.

llvm-svn: 21249
 2005-04-12 15:12:51 +00:00
Chris Lattner
37712352c0 Make sure to realize that calls use their argument regs 
llvm-svn: 21248
 2005-04-12 15:12:19 +00:00
Duraid Madina
2821f99f19 stop emitting IDEFs for args - change to using liveIn/liveOut 
llvm-svn: 21247
 2005-04-12 14:54:44 +00:00
Chris Lattner
55e620f08d IA64 supports this operation. 
llvm-svn: 21228
 2005-04-11 18:55:36 +00:00
Duraid Madina
01aaf77792 hmm, should probably change addImm() to take 64-bit arguments one day anyway. 
llvm-svn: 21224
 2005-04-11 07:16:39 +00:00
Duraid Madina
d2ae9221c7 assorted fixes: 
* clean up immediates (we use 14, 22 and 64 bit immediates now. sane.)
  * fold r0/f0/f1 registers into comparisons against 0/0.0/1.0
  * fix nasty thinko - didn't use two-address form of conditional add
    for extending bools to integers, so occasionally there would be
    garbage in the result. it's amazing how often zeros are just
    sitting around in registers ;) - this should fix a bunch of tests.

llvm-svn: 21221
 2005-04-11 05:55:56 +00:00
Duraid Madina
2d3e52576d ok, the "ia64 has a boatload of registers" joke stopped being funny today ;) 
* fix overallocation of integer (stacked) registers: we can't allocate
  registers for local use if they are required as output registers

this fixes 'toast' in the test suite, and all sorts of larger programs
like bzip2 etc.

llvm-svn: 21178
 2005-04-09 11:53:00 +00:00
Chris Lattner
39f963f968 This target does not support/want ISD::BRCONDTWOWAY 
llvm-svn: 21164
 2005-04-09 03:22:37 +00:00
Duraid Madina
e7412561bf fix bogus division-by-power-of-2 (was wrong for negative input, adds extr insn) 
fix hack in division (clean up frcpa instruction)

llvm-svn: 21153
 2005-04-08 10:01:48 +00:00
Duraid Madina
ab6e2cfaeb teach asmprinter to print s8/s14 operands 
llvm-svn: 21131
 2005-04-07 12:34:36 +00:00
Duraid Madina
ed8eb83203 codegen immediate forms of add/sub/shift 
llvm-svn: 21130
 2005-04-07 12:33:38 +00:00
Duraid Madina
5c4a7b68b3 add immediate forms of add, sub, shift 
llvm-svn: 21129
 2005-04-07 12:32:24 +00:00
Duraid Madina
5fa854a7fe steal sampo's div-by-constant-power-of-2 stuff 
thanks sampo!!

llvm-svn: 21113
 2005-04-06 09:55:17 +00:00
Duraid Madina
1d156293cb add fms instruction 
llvm-svn: 21112
 2005-04-06 09:54:09 +00:00
Duraid Madina
2db29b8016 lie a bit and say that r1/r12 (GP/SP) _aren't_ callee-save, as we take 
care of this ourselves

llvm-svn: 21110
 2005-04-06 06:18:36 +00:00
Duraid Madina
62c4de8d62 make sure 'special' registers don't get allocated 
llvm-svn: 21109
 2005-04-06 06:17:54 +00:00
Duraid Madina
920aea2fa7 fix SREM/UREM, which gave incorrect results for x%y if x was zero. This is 
an ugly hack, but it seems to work. I should fix this properly and add a test
as well.

fixes multisource/obsequi (maybe others)

llvm-svn: 21075
 2005-04-04 05:05:52 +00:00
Duraid Madina
d896a18d33 add implicit use op 
llvm-svn: 21074
 2005-04-04 04:50:57 +00:00
Duraid Madina
bfbfb0e4c7 .bss is no problem here. 
llvm-svn: 21061
 2005-04-03 14:52:01 +00:00
Duraid Madina
63f75bdf49 ia64 asmprinter fixes: 
- turn off assembler's autoalignment
  - set FunctionAddrPrefix/Suffix so that .data8 entries pointing to
    functions have their value wrapped in @fptr(), so that a function
    descriptor will be materialized for that function.

llvm-svn: 21025
 2005-04-02 12:30:47 +00:00
Duraid Madina
5367cc3b49 support IDEF, fnegabs (thanks sampo) 
llvm-svn: 21023
 2005-04-02 10:33:53 +00:00
Duraid Madina
81675e4031 add fnegabs op 
llvm-svn: 21022
 2005-04-02 10:06:27 +00:00
Duraid Madina
333132da85 add support FNEG and FABS 
llvm-svn: 21012
 2005-04-02 05:18:38 +00:00
Chris Lattner
a5d4718875 This target doesn't support fabs/fneg yet. 
llvm-svn: 21010
 2005-04-02 05:03:24 +00:00
Duraid Madina
48ef32d6d3 repair mindless SELECT waste. 
llvm-svn: 20982
 2005-04-01 10:35:00 +00:00
Duraid Madina
47fed18416 Assorted fixes: 
* Stop being pessimistic about output register allocation
  * Start to handle function descriptors: compute target GPs and so on
  when doing indirect calls etc. Not there yet, though. For the moment,
  we try to use _indirect_ branches wherever possible, to stress test
  function descriptors.
  * FP divide-by-zero should work now
  * add varargs (it doesn't work, though)

At this point, all of SingleSource passes (modulo C++ tests that are due
to issues with the CFE, see note in the README.) Much of MultiSource also
passes although there's still a ton of bugs around. Something for me to
work on tomorrow, then. :)

llvm-svn: 20960
 2005-03-31 12:31:11 +00:00
Duraid Madina
f2d1865c74 * declare local common symbols as such (.lcomm, not merely .common) 
* begin great adventure into correct function descriptor materialization

llvm-svn: 20956
 2005-03-31 07:40:24 +00:00
Duraid Madina
03efd3bea9 daintyness 
llvm-svn: 20955
 2005-03-31 07:36:43 +00:00
Duraid Madina
11ff0a2a5f add what we need to fudge a 'floating point conditional move', this is 
used to get FP div-by-zero working properly (shunt the right answer
depending on how frcpa sets its predicate output)

llvm-svn: 20954
 2005-03-31 07:32:32 +00:00
Duraid Madina
7b5f67baf9 Emit .global @function and .global @object entries so the Intel ias 
assembler may be used; identify LLVM output as such.

llvm-svn: 20892
 2005-03-28 15:21:43 +00:00
Nate Begeman
f821401825 Change interface to LowerCallTo to take a boolean isVarArg argument. 
llvm-svn: 20842
 2005-03-26 01:29:23 +00:00
Chris Lattner
2e2035aa72 fix a compilation error, patch contributed by Bill Wendling! 
llvm-svn: 20807
 2005-03-24 05:12:48 +00:00
Nate Begeman
175a9f1cc6 Remove comments that are now meaningless from the pattern ISels, at Chris's 
request.

llvm-svn: 20804
 2005-03-24 04:39:54 +00:00
Alkis Evlogimenos
d8f23f17f0 Stop using deprecated interface. 
llvm-svn: 20679
 2005-03-19 09:22:17 +00:00
Duraid Madina
ad26d89f4a typo/denial 
llvm-svn: 20663
 2005-03-17 20:23:27 +00:00
Duraid Madina
341917d75b clean up warnings when building in release mode 
llvm-svn: 20658
 2005-03-17 19:00:40 +00:00
Duraid Madina
0b84eec44b OK, IA64 is statically linked into llc 
llvm-svn: 20655
 2005-03-17 18:37:05 +00:00
Duraid Madina
08bd58412a build the IA64 target as a .so for now 
llvm-svn: 20654
 2005-03-17 18:29:04 +00:00
Duraid Madina
79022e1b87 and so it begins... 
PHASE 1: write instruction selector
PHASE 2: ???
PHASE 3: profit!

llvm-svn: 20652
 2005-03-17 18:17:03 +00:00