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Commit Graph

148895 Commits

Author SHA1 Message Date
Craig Topper
ba47d47292 [APInt] Add negate helper method to implement twos complement. Use it to shorten code.
llvm-svn: 302716
2017-05-10 20:01:38 +00:00
Davide Italiano
4f4a6d751d [NewGVN] Introduce a definesNoMemory() helper and use it.
This is nice as is, but it will be used in my next patch to
fix a bug. Suggested by Daniel Berlin.

llvm-svn: 302714
2017-05-10 19:57:43 +00:00
Nirav Dave
0603cde0c8 [SDAG] Relax conditions under stores of loaded values can be merged
Summary:

Allow consecutive stores whose values come from consecutive loads to
merged in the presense of other uses of the loads. Previously this was
disallowed as in general the merged load cannot be shared with the
other uses. Merging N stores into 1 may cause as many as N redundant
loads. However in the context of caching this should have neglible
affect on memory pressure and reduce instruction count making it
almost always a win.

Fixes PR32086.

Reviewers: spatel, jyknight, andreadb, hfinkel, efriedma

Reviewed By: efriedma

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30471

llvm-svn: 302712
2017-05-10 19:53:41 +00:00
Teresa Johnson
0b6dfb3f3d Ensure non-null ProfileSummaryInfo passed to ModuleSummaryIndex builder
This fixes a ubsan bot failure after r302597, which made getProfileCount
non-static, but ended up invoking it on a null ProfileSummaryInfo object
in some cases from buildModuleSummaryIndex.

Most testing passed because the non-static getProfileCount currently
doesn't access any member variables, but I found this when testing a
follow on patch (D32877) that adds a member variable access.

llvm-svn: 302705
2017-05-10 18:52:16 +00:00
Craig Topper
2707aadba1 [APInt] Make toString use udivrem instead of calling the divide helper method directly. Do a better job of reusing allocations while looping. NFCI
This lets toString take advantage of the degenerate case checks in udivrem and is just generally cleaner.

One minor downside of this is that the divisor APInt now needs to be the same size as Tmp which requires an additional allocation. But we were doing a poor job of reusing allocations before so the new code should still be an improvement.

llvm-svn: 302704
2017-05-10 18:15:24 +00:00
Craig Topper
bafd69a316 [APInt] Use uint32_t instead of unsigned for the storage type throughout the divide code. Use Lo_32/Hi_32/Make_64 helpers instead of casts and shifts. NFCI
llvm-svn: 302703
2017-05-10 18:15:20 +00:00
Craig Topper
5f6094a872 [APInt] Use getRawData to slightly simplify some code.
llvm-svn: 302702
2017-05-10 18:15:17 +00:00
Craig Topper
8afca05207 [APInt] Remove check for single word since single word was handled earlier in the function. NFC
llvm-svn: 302701
2017-05-10 18:15:14 +00:00
Craig Topper
8ecd061605 [ConstantRange] Add test case showing a case where we pick too large of a range for multiply after r271020.
llvm-svn: 302700
2017-05-10 18:15:06 +00:00
Amaury Sechet
ecf5118408 Small refactoring in DAGCombine. NFC
llvm-svn: 302699
2017-05-10 17:58:28 +00:00
Sanjay Patel
9a17eb1902 [InstSimplify, InstCombine] move 'or' simplification tests; NFC
Surprisingly, I don't think these are redundant for InstSimplify. 
They were just misplaced as InstCombine tests.

llvm-svn: 302684
2017-05-10 15:57:47 +00:00
Simon Pilgrim
3c3c9c0eef [X86][SSE] Check vec_set BUILD_VECTOR tests on both 32 and 64-bit targets
llvm-svn: 302683
2017-05-10 15:52:59 +00:00
Quentin Colombet
625bc4b0e8 [AArch64][RegisterBankInfo] Change the default mapping of fp stores.
For stores, check if the stored value is defined by a floating point
instruction and if yes, we return a default mapping with FPR instead
of GPR.

llvm-svn: 302679
2017-05-10 15:19:41 +00:00
Amara Emerson
08ca9bd16b [AArch64] Enable use of reduction intrinsics.
The new experimental reduction intrinsics can now be used, so I'm enabling this
for AArch64. We will need this for SVE anyway, so it makes sense to do this for
NEON reductions as well.

The existing code to match shufflevector patterns are replaced with a direct
lowering of the reductions to AArch64-specific nodes. Tests updated with the
new, simpler, representation.

Differential Revision: https://reviews.llvm.org/D32247

llvm-svn: 302678
2017-05-10 15:15:38 +00:00
Sanjay Patel
d548d9e52a [InstCombine] remove redundant tests
The first test in this file is duplicated exactly in and.ll -> test33.
We have commuted and vector variants there too.

The second test is a composite of 2 folds. The first fold is tested
independently in add.ll -> flip_and_mask (including vector variant).
After that transform fires, the IR is identical to the first transform.

llvm-svn: 302676
2017-05-10 14:54:49 +00:00
Sanjay Patel
984fd017a0 [InstCombine] fix auto-generated FileCheck-captured variable refs
The script at utils/update_test_checks.py has (had?) a bug when variables
start with the same sequence of letters (clearly, not all of the time).

llvm-svn: 302674
2017-05-10 14:40:04 +00:00
Sanjay Patel
cc782735dc [InstCombine] fix typo in test comment; NFC
llvm-svn: 302669
2017-05-10 14:25:23 +00:00
Ulrich Weigand
bb3bddd00e [SystemZ] Add miscellaneous instructions
This adds a few missing instructions for the assembler and
disassembler.  Those should be the last missing general-
purpose (Chapter 7) instructions for the z10 ISA.

llvm-svn: 302667
2017-05-10 14:20:15 +00:00
Ulrich Weigand
1ef7c92f6f [SystemZ] Add missing arithmetic instructions
This adds the remaining general arithmetic instructions
for assembler / disassembler use.  Most of these are not
useful for codegen; a few might be, and those are listed
in the README.txt for future improvements.

llvm-svn: 302665
2017-05-10 14:18:47 +00:00
Sam Clegg
aaf3055813 [llvm-readobj] Improve errors on invalid binary
The previous code was discarding the error message from
createBinary() by calling errorToErrorCode().
This meant that such error were always reported unhelpfully
as "Invalid data was encountered while parsing the file".

Other tools such as llvm-objdump already produce a more
the error message in this case.

Differential Revision: https://reviews.llvm.org/D32985

llvm-svn: 302664
2017-05-10 14:18:11 +00:00
Michael Zuckerman
4962148370 chang type from 'int' to 'size_t'. This will fix revision number 302652
llvm-svn: 302660
2017-05-10 14:00:57 +00:00
Sanjay Patel
28b1842d00 [InstCombine] add (ashr (shl i32 X, 31), 31), 1 --> and (not X), 1
This is another step towards favoring 'not' ops over random 'xor' in IR:
https://bugs.llvm.org/show_bug.cgi?id=32706

This transformation may have occurred in longer IR sequences using computeKnownBits,
but that could be much more expensive to calculate.

As the scalar result shows, we do not currently favor 'not' in all cases. The 'not'
created by the transform is transformed again (unnecessarily). Vectors don't have
this problem because vectors are (wrongly) excluded from several other combines.

llvm-svn: 302659
2017-05-10 13:56:52 +00:00
Serge Guelton
c4a9e91034 Use explicit false instead of casted nullptr. NFC.
llvm-svn: 302656
2017-05-10 13:24:17 +00:00
Serge Guelton
6bbe3848ef Use clang++-3.5 compatible initializer_list constructor
Otherwise, a warning is issued.

llvm-svn: 302655
2017-05-10 13:23:47 +00:00
Michael Zuckerman
0456ea13b1 [LLVM][inline-asm] Altmacro string escape character '!'
This patch is the fourth patch in a series of reviews for the Altmacro feature. 
This patch introduces a new escape character '!' and it depends on D32701.

according to https://sourceware.org/binutils/docs/as/Altmacro.html:
"single-character string escape
To include any single character literally in a string (even if the character would otherwise have some special meaning), you can prefix the character with !' (an exclamation mark). For example, you can write <4.3 !> 5.4!!>' to get the literal text `4.3 > 5.4!'. "

Differential Revision: https://reviews.llvm.org/D32792

llvm-svn: 302652
2017-05-10 13:08:11 +00:00
Simon Pilgrim
6c5403c882 [DAGCombiner] Dropped explicit (sra 0, x) -> 0 and (sra -1, x) -> 0 folds.
These are both handled (and tested) by the earlier ComputeNumSignBits == EltSizeInBits fold.

llvm-svn: 302651
2017-05-10 13:06:26 +00:00
Mikael Holmen
0aa88ec197 [IfConversion] Add missing check in IfConversion/canFallThroughTo
Summary:
When trying to figure out if MBB could fallthrough to ToMBB (possibly by
falling through a bunch of other MBBs) we didn't actually check if there
was fallthrough between the last two blocks in the chain.

Reviewers: kparzysz, iteratee, MatzeB

Reviewed By: kparzysz, iteratee

Subscribers: javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D32996

llvm-svn: 302650
2017-05-10 13:06:13 +00:00
Jonas Paulsson
d401c2a29b [SystemZ] Implement getRepRegClassFor()
This method must return a valid register class, or the list-ilp isel
scheduler will crash. For MVT::Untyped nullptr was previously returned, but
now ADDR128BitRegClass is returned instead. This is needed just as long as
list-ilp (and probably also list-hybrid) is still there.

Review: Ulrich Weigand, A Trick
https://reviews.llvm.org/D32802

llvm-svn: 302649
2017-05-10 13:03:25 +00:00
Dmitry Preobrazhensky
299fc6910a [AMDGPU][MC] Corrected v_madak/madmk to avoid printing "_e32" in disassembler output
See bug 32927: https://bugs.llvm.org//show_bug.cgi?id=32927

Reviewers: vpykhtin, artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D32913

llvm-svn: 302648
2017-05-10 13:00:28 +00:00
Igor Breger
6263596e23 [GlobalISel][X86] Split test file. NFC
llvm-svn: 302647
2017-05-10 12:58:31 +00:00
Ulrich Weigand
55d6a88557 [SystemZ] Add decimal integer instructions
This adds the set of decimal integer (BCD) instructions for
assembler / disassembler use.

llvm-svn: 302646
2017-05-10 12:42:45 +00:00
Ulrich Weigand
250144573e [SystemZ] Add crypto instructions
This adds the set of message-security assist instructions for
assembler / disassembler use.

llvm-svn: 302645
2017-05-10 12:42:00 +00:00
Ulrich Weigand
f0971128ba [SystemZ] Add translate/convert instructions
This adds the set of character-set translate and convert instructions
for assembler / disassembler use.

llvm-svn: 302644
2017-05-10 12:41:12 +00:00
Ulrich Weigand
7c859f5897 [SystemZ] Add missing memory/string instructions
This adds a number of missing memory and string instructions
for assembler / disassembler use.

llvm-svn: 302643
2017-05-10 12:40:15 +00:00
Ulrich Weigand
934386e031 [SystemZ] Reformat assembler/disassembler tests
The assembler and disassmebler test cases started out formatted and
sorted in a particular way, but this got lost over time as patches
were added.  Reformat them again.  NFC.

llvm-svn: 302642
2017-05-10 12:39:11 +00:00
Simon Pilgrim
ac3e69a0aa [DAGCombiner] Add vector support to fold (shl/srl 0, x) -> 0
llvm-svn: 302641
2017-05-10 12:34:27 +00:00
Chandler Carruth
20b358db9d Revert r301950: SpeculativeExecution: Stop using whitelist for costs
This pass doesn't correctly handle testing for when it is legal to hoist
arbitrary instructions. The whitelist happens to make it safe, so before
it is removed the pass's legality checks will need to be enhanced.

Details have been added to the code review thread for the patch.

llvm-svn: 302640
2017-05-10 12:30:07 +00:00
Martin Storsjo
b962a7f438 [AArch64] Fix a comment to match the code. NFC.
For the ELF case, the default/preferred form is the generic one, not
the short one as used for Apple - fix the comment to say so. Currently
it is a copy-paste typo.

Make the comments on the darwin default a bit more verbose.

Use enum names instead of literal 0/1 to further increase readability
and reduce fragility.

Differential Revision: https://reviews.llvm.org/D32963

llvm-svn: 302634
2017-05-10 10:51:32 +00:00
Amara Emerson
668fbd4cf5 Add a late IR expansion pass for the experimental reduction intrinsics.
This pass uses a new target hook to decide whether or not to expand a particular
intrinsic to the shuffevector sequence.

Differential Revision: https://reviews.llvm.org/D32245

llvm-svn: 302631
2017-05-10 09:42:49 +00:00
Craig Topper
2eb1e4752a [APInt] Fix indentation of tcDivide. Combine variable declaration and initialization.
llvm-svn: 302626
2017-05-10 07:50:17 +00:00
Craig Topper
d9eda483c3 [APInt] Use getNumWords function in udiv/urem/udivrem instead of reimplementinging it.
llvm-svn: 302625
2017-05-10 07:50:15 +00:00
Igor Breger
7350527066 [GlobalISel][X86] G_ZEXT i1 to i32/i64 support.
Summary: Support G_ZEXT i1 to i32/i64 instruction selection.

Reviewers: zvi, guyblank

Reviewed By: guyblank

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D32965

llvm-svn: 302623
2017-05-10 06:52:58 +00:00
Mikael Holmen
41f55d04e2 [UnreachableBlockElim] Check return value of constrainRegClass().
Summary:
MachineRegisterInfo::constrainRegClass() can fail if two register classes
don't have a common subclass or if the register class doesn't contain
enough registers. Check the return value before trying to remove Phi nodes,
and if we can't constrain, we output a COPY instead of simply replacing
registers.

Reviewers: kparzysz, david2050, wmi

Reviewed By: kparzysz

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32999

llvm-svn: 302622
2017-05-10 06:33:43 +00:00
Ahmed Bougacha
d7292f3867 [CodeGen] Don't require AA in TwoAddress at -O0.
This is a follow-up to r302611, which moved an -O0 computation of DT
from SDAGISel to TwoAddress.

Don't use it here either, and avoid computing it completely.  The only
use was forwarding the analysis as an optional argument to utility
functions.

Differential Revision: https://reviews.llvm.org/D32766

llvm-svn: 302612
2017-05-10 00:56:00 +00:00
Ahmed Bougacha
d74b69039b [CodeGen] Don't require AA in SDAGISel at -O0.
Before r247167, the pass manager builder controlled which AA
implementations were used, exporting them all in the AliasAnalysis
analysis group.

Now, AAResultsWrapperPass always uses BasicAA, but still uses other AA
implementations if made available in the pass pipeline.

But regardless, SDAGISel is required at O0, and really doesn't need to
be doing fancy optimizations based on useful AA results.

Don't require AA at CodeGenOpt::None, and only use it otherwise.

This does have a functional impact (and one testcase is pessimized
because we can't reuse a load).  But I think that's desirable no matter
what.

Note that this alone doesn't result in less DT computations: TwoAddress
was previously able to reuse the DT we computed for SDAG.  That will be
fixed separately.

Differential Revision: https://reviews.llvm.org/D32766

llvm-svn: 302611
2017-05-10 00:39:30 +00:00
Ahmed Bougacha
8c31c46df1 [CodeGen] Compute DT/LI lazily in SafeStackLegacyPass. NFC.
We currently require SCEV, which requires DT/LI.  Those are expensive to
compute, but the pass only runs for functions that have the safestack
attribute.

Compute DT/LI to build SCEV lazily, only when the pass is actually going
to transform the function.

Differential Revision: https://reviews.llvm.org/D31302

llvm-svn: 302610
2017-05-10 00:39:25 +00:00
Ahmed Bougacha
9346441008 [CodeGen] Split SafeStack into a LegacyPass and a utility. NFC.
This lets the pass focus on gathering the required analyzes, and the
utility class focus on the transformation.

Differential Revision: https://reviews.llvm.org/D31303

llvm-svn: 302609
2017-05-10 00:39:22 +00:00
Ahmed Bougacha
c5a347f087 [CodeGen] Add an -O0 backend pipeline test. NFC.
This should hopefully makes changes to the O0 pipeline obvious; it's
easy to require expensive passes, and this helps make informed
decisions.

Case in point: in the few weeks separating the time when I initially
wrote this patch to the time when I committed, the test regressed as
r302103 added another use of DT!

llvm-svn: 302608
2017-05-10 00:39:17 +00:00
Sam Clegg
1f85d46ebe [WebAssembly] Fix build error in wasm YAML code
This warning didn't show up on my local build
but is causing the bots to fail.  Seems like a
bad idea to have types and variables with the
same name anyhow.

Differential Revision: https://reviews.llvm.org/D33022

llvm-svn: 302606
2017-05-10 00:14:04 +00:00
Sanjay Patel
05c41aae87 [InstCombine] add helper function for add X, C folds; NFCI
llvm-svn: 302605
2017-05-10 00:07:16 +00:00