RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 04:22:57 +02:00
Code Issues Projects Releases Wiki Activity
52,198 Commits 4 Branches 5 Tags 704 MiB
3d527ff081
Commit Graph

1574 Commits

Author SHA1 Message Date
Jim Grosbach
3d527ff081 Start of revamping the register scavenging in PEI. ARM Thumb1 is the driving 
interest for this, as it currently reserves a register rather than using
the scavenger for matierializing constants as needed.

Instead of scavenging registers on the fly while eliminating frame indices,
new virtual registers are created, and then a scavenged collectively in a
post-pass over the function. This isolates the bits that need to interact
with the scavenger, and sets the stage for more intelligent use, and reuse,
of scavenged registers.

For the time being, this is disabled by default. Once the bugs are worked out,
the current scavenging calls in replaceFrameIndices() will be removed and
the post-pass scavenging will be the default. Until then,
-enable-frame-index-scavenging enables the new code. Currently, only the
Thumb1 back end is set up to use it.

llvm-svn: 82734
 2009-09-24 23:52:18 +00:00
David Goodwin
3ac3dcacc7 Make the end-of-itinerary mark explicit. Some cleanup. 
llvm-svn: 82709
 2009-09-24 20:22:50 +00:00
David Goodwin
1d72b88015 Checkpoint NEON scheduling itineraries. 
llvm-svn: 82657
 2009-09-23 21:38:08 +00:00
Anton Korobeynikov
829a3a18d2 ARM does not support offset folding (yet). Disable it for now. 
This fixes PR5031. Unfortunately, there is no small testcase :(

llvm-svn: 82643
 2009-09-23 19:04:09 +00:00
David Goodwin
0db84be1dc Add Cortex-A8 VFP model. 
llvm-svn: 82483
 2009-09-21 20:52:17 +00:00
Daniel Dunbar
db16b2c6bb Register the MachineModuleInfo for the ARM JIT, and update JITDwarfEmitter to 
assert if the setModuleInfo hasn't been called.

llvm-svn: 82441
 2009-09-21 05:58:35 +00:00
Evan Cheng
7714c8412d Fix PR4926. When target hook EmitInstrWithCustomInserter() insert new basic blocks and update CFG, it should also inform sdisel of the changes so the phi source operands will come from the right basic blocks. 
llvm-svn: 82311
 2009-09-19 09:51:03 +00:00
Bob Wilson
1b311a6a9b Fix a typo in an assertion message. 
llvm-svn: 82284
 2009-09-18 21:42:44 +00:00
Evan Cheng
7cb9c456e5 Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that sdisel will use to properly complete phi nodes. 
Not functionality change yet.

llvm-svn: 82273
 2009-09-18 21:02:19 +00:00
Bob Wilson
989568d935 Expand vector floating-point conversions not supported by NEON. 
llvm-svn: 82074
 2009-09-16 20:20:44 +00:00
Bob Wilson
8770c809c2 Expand some more vector operations not supported by Neon. 
llvm-svn: 81969
 2009-09-16 00:32:15 +00:00
Bob Wilson
c01a94dad0 Neon does not support vector divide or remainder. Expand them. 
llvm-svn: 81966
 2009-09-16 00:17:28 +00:00
Bob Wilson
f091792f40 Expand all v2f64 arithmetic operations for Neon. 
Radar 7200803.  (This should also fix the
SingleSource/UnitTests/Vector/sumarray-dbl test.)

llvm-svn: 81959
 2009-09-15 23:55:57 +00:00
Bob Wilson
a42ff3190c Handle AddrMode4 for Thumb2 in rewriteT2FrameIndex. This occurs for 
VLDM/VSTM instructions, and without this check, the code assumes that an
offset is allowed, as it would be with VLDR/VSTR.  The asm printer,
however, silently drops the offset, producing incorrect code.  Since the
address register in this case is either the stack or frame pointer, the
spill location ends up conflicting with some other stack slot or with
outgoing arguments on the stack.

llvm-svn: 81879
 2009-09-15 17:56:18 +00:00
Sandeep Patel
7727a68464 Fix superreg use in ARMAsmPrinter. Approved by Anton Korobeynikov. 
llvm-svn: 81878
 2009-09-15 17:53:11 +00:00
Ted Kremenek
477a21a996 Remove invalid add_dependencies line to unbreak the CMake build. 
llvm-svn: 81827
 2009-09-15 04:06:36 +00:00
Kevin Enderby
da3290e68c Added the first bits of the ARM target assembler to llvm-mc. For now it only 
parses the .word directive as 4 bytes and ARMAsmParser::ParseInstruction will
give an error is called.  Broke out the test of the .word directive into two
different test cases, one for x86 and one for arm.

llvm-svn: 81817
 2009-09-15 00:27:25 +00:00
Jim Grosbach
5f662f31bc trivial whitespace cleanup 
llvm-svn: 81773
 2009-09-14 17:27:35 +00:00
Chris Lattner
334aa7a1d4 remove all but one reference to TargetRegisterDesc::AsmName. 
llvm-svn: 81714
 2009-09-13 20:31:40 +00:00
Chris Lattner
20b7392123 the tblgen produced 'getRegisterName' method does not access 
the object, make it static instead of const.

llvm-svn: 81711
 2009-09-13 20:19:22 +00:00
Chris Lattner
0cde5283e3 make tblgen produce a function that returns the name for a physreg. 
Nothing is using this info yet.

llvm-svn: 81707
 2009-09-13 20:08:00 +00:00
Chris Lattner
cbcbedf254 replace printBasicBlockLabel with EmitBasicBlockStart, 
now that printBasicBlockLabel is only used for starting
a MBB.  This allows elimination of a bunch of arguments.

llvm-svn: 81684
 2009-09-13 18:25:37 +00:00
Chris Lattner
de1324146e convert some uses of printBasicBlockLabel to use GetMBBSymbol 
instead.

llvm-svn: 81677
 2009-09-13 17:14:04 +00:00
Anton Korobeynikov
b5e56d0937 Fix merge problem 
llvm-svn: 81658
 2009-09-13 01:12:15 +00:00
Anton Korobeynikov
fa4c7562d5 Define proper subreg sets for arm - this should fix bunch of subtle problems 
with subreg - superreg mapping and also fix PR4965.

llvm-svn: 81657
 2009-09-13 00:59:43 +00:00
Anton Korobeynikov
267bd0c577 Add QPR_VFP2 regclass and add copy_to_regclass nodes, where needed to 
constraint the register usage.

llvm-svn: 81635
 2009-09-12 22:21:08 +00:00
Jim Grosbach
932453f233 Revert array initialization regclass change so that the initialization stays static, not runtime. 
llvm-svn: 81560
 2009-09-11 20:13:17 +00:00
Jim Grosbach
6293edbcbf Update register class references to use the global constant ARM::*RegisterClass names. 
llvm-svn: 81556
 2009-09-11 19:49:06 +00:00
Evan Cheng
0e0590db1b Proper support of non-lazy indirect symbols. 
llvm-svn: 81422
 2009-09-10 01:23:53 +00:00
Evan Cheng
7f25e554e4 Fix double load / store multiple encoding. 
llvm-svn: 81403
 2009-09-09 23:55:03 +00:00
Bob Wilson
877a857b4b Fix pr4939: Change FPCCToARMCC to translate SETOLE to ARMCC::LS. 
See the bug report for details.

llvm-svn: 81397
 2009-09-09 23:14:54 +00:00
Chris Lattner
b9aca1a178 remove DebugLoc from MCInst and eliminate "Comment printing" from 
the MCInst path of the asmprinter.  Instead, pull comment printing
out of the autogenerated asmprinter into each target that uses the
autogenerated asmprinter.  This causes code duplication into each
target, but in a way that will be easier to clean up later when more
asmprinter stuff is commonized into the base AsmPrinter class.

This also fixes an xcore strangeness where it inserted two tabs
before every instruction.

llvm-svn: 81396
 2009-09-09 23:14:36 +00:00
Chris Lattner
52651f7623 hoist the call to processDebugLoc out of the generated 
asm printer into the "printInstruction" routine.  This
fixes a problem where the experimental asmprinter would
drop debug labels in some cases, and fixes issues on ppc/xcore
where pseudo instructions like "mr" didn't get debug locs properly.

It is annoying that this moves the call from one place into each
target, but a future set of more invasive refactorings will fix
that problem.

llvm-svn: 81377
 2009-09-09 20:34:59 +00:00
Evan Cheng
91e719a6a1 Cast MO.getImm() to unsigned before comparing with an unsigned limit. 
llvm-svn: 81318
 2009-09-09 06:05:16 +00:00
Evan Cheng
95597cedfe Make sure to make stub region writable before emission, executable after emission. 
llvm-svn: 81311
 2009-09-09 01:56:29 +00:00
Evan Cheng
a0bf864b0e Fix arm jit encoding bug introduced by 75048. Some instructions', e.g. MOVi, bit 25 should be set. 
llvm-svn: 81310
 2009-09-09 01:47:07 +00:00
Evan Cheng
6c89bc0472 Remove comments which don't add much to .s readibility. 
llvm-svn: 81306
 2009-09-09 01:38:23 +00:00
Anton Korobeynikov
2b6ef7724e Unbreak getOnesVector() / getZeroVector() to use valid ARM extended imm's. 
llvm-svn: 81262
 2009-09-08 22:51:43 +00:00
Anton Korobeynikov
0b3a620d60 Add NEON 'laned' operations. This fixes another bunch of gcc testsuite fails and 
makes the code faster.

llvm-svn: 81220
 2009-09-08 15:22:32 +00:00
Duncan Sands
598fe699d0 Remove some not-really-used variables, as warned 
about by icc (#593, partial).  Patch by Erick Tryzelaar.

llvm-svn: 81115
 2009-09-06 12:41:19 +00:00
Duncan Sands
10c1356bad Remove some unused variables and methods warned about by 
icc (#177, partial).  Patch by Erick Tryzelaar.

llvm-svn: 81106
 2009-09-06 08:33:48 +00:00
Jim Grosbach
5a21028ece Whitespace cleanup 
llvm-svn: 80978
 2009-09-04 01:38:51 +00:00
David Goodwin
0dd9e9edb4 Calls clobber FPSCR. 
llvm-svn: 80956
 2009-09-03 22:12:28 +00:00
Evan Cheng
41e87f2f13 Reference to hidden symbols do not have to go through non-lazy pointer in non-pic mode. rdar://7187172. 
llvm-svn: 80904
 2009-09-03 07:04:02 +00:00
Anton Korobeynikov
7125d63acf More missed vdup patterns 
llvm-svn: 80838
 2009-09-02 21:21:28 +00:00
Sandeep Patel
9c4e094e2a Retype from unsigned to CallingConv::ID accordingly. Approved by Bob Wilson. 
llvm-svn: 80773
 2009-09-02 08:44:58 +00:00
Jim Grosbach
d0f70494f5 reduce size of SmallString to something more reasonable 
llvm-svn: 80710
 2009-09-01 18:55:08 +00:00
Bob Wilson
6972a16bbc Add support for generating code for vst{234}lane intrinsics. 
llvm-svn: 80707
 2009-09-01 18:51:56 +00:00
Jim Grosbach
38fc5b0277 Use raw_ostream instead of sstream 
llvm-svn: 80704
 2009-09-01 18:49:12 +00:00
David Goodwin
70557af33a RRX reads CPSR. 
llvm-svn: 80699
 2009-09-01 18:32:09 +00:00