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1574 Commits

Author SHA1 Message Date
Bob Wilson
bebadd11e4 Generate code for vld{234}_lane intrinsics. 
llvm-svn: 80656
 2009-09-01 04:26:28 +00:00
Jim Grosbach
b3c318b9d8 Fix compiler warnings 
llvm-svn: 80650
 2009-09-01 02:05:03 +00:00
Jim Grosbach
9a220088ac Clean up LSDA name generation and use for SJLJ exception handling. This 
makes an eggregious hack somewhat more palatable. Bringing the LSDA forward
and making it a GV available for reference would be even better, but is
beyond the scope of what I'm looking to solve at this point.

Objective C++ code could generate function names that broke the previous
scheme. This fixes that.

llvm-svn: 80649
 2009-09-01 01:57:56 +00:00
Evan Cheng
493eee1fc7 Remove .n suffix for some 16-bit opcodes now that Darwin assembler is fixed. 
llvm-svn: 80615
 2009-08-31 20:14:07 +00:00
Benjamin Kramer
61232721d9 Normalize makefile comments and sort cmake file lists. 
llvm-svn: 80584
 2009-08-31 13:05:24 +00:00
Anton Korobeynikov
17529667db Add missed pattern 
llvm-svn: 80502
 2009-08-30 19:06:39 +00:00
Anton Korobeynikov
a261afbf14 EXTRACT_VECTOR_ELEMENT can have result type different from element type. 
Remove the assertion and generalize the code for ARM NEON stuff.

llvm-svn: 80498
 2009-08-30 17:14:54 +00:00
Anton Korobeynikov
b2e6f5eed4 Do not assert on too wide splats we don't support. 
llvm-svn: 80409
 2009-08-29 00:08:18 +00:00
Anton Korobeynikov
9fd6082c10 Add missed extract_element pattern 
llvm-svn: 80408
 2009-08-28 23:41:26 +00:00
Evan Cheng
d7a07ab112 Let Darwin linker auto-synthesize stubs and lazy-pointers. This deletes a bunch of nasty code in ARM asm printer. 
llvm-svn: 80404
 2009-08-28 23:18:09 +00:00
Daniel Dunbar
0fa09bbe95 Fix -Asserts warning, round two. 
llvm-svn: 80354
 2009-08-28 08:08:22 +00:00
Evan Cheng
d53546a6cd Print a nl before pic labels so they start at a new line. This makes assembly more readable. 
llvm-svn: 80350
 2009-08-28 06:59:37 +00:00
Daniel Dunbar
1b35869d3d Fix -Asserts warning. 
llvm-svn: 80338
 2009-08-28 05:47:56 +00:00
Evan Cheng
2d5d3700e9 v4, v5 does not support sxtb / sxth. 
llvm-svn: 80322
 2009-08-28 00:31:43 +00:00
Anton Korobeynikov
c1e6083cb8 Hopefully the final missing part :( 
scalar_to_vector is fully legal now

llvm-svn: 80251
 2009-08-27 16:25:49 +00:00
Anton Korobeynikov
3aec90b4d6 Forgot about actual change :) 
llvm-svn: 80250
 2009-08-27 16:10:17 +00:00
Anton Korobeynikov
33d151e85e Transform float scalar_to_vector into subreg accesses. 
No idea whether this is profitable or not.

llvm-svn: 80245
 2009-08-27 14:38:44 +00:00
Misha Brukman
25e2b59ec6 STRD and LDRD require ARMv5TE, not just ARMv5T. 
See http://llvm.org/PR4687 for more info and links.

llvm-svn: 80244
 2009-08-27 14:14:21 +00:00
Evan Cheng
984f8efcaa Fix PR4789. Teach eliminateFrameIndex how to handle VLDRQ and VSTRQ which cannot fold any immediate offset. 
llvm-svn: 80191
 2009-08-27 01:23:50 +00:00
Bob Wilson
5240e9de02 Remove unneeded ARM-specific DAG nodes for VLD* and VST* Neon operations. 
The instructions can be selected directly from the intrinsics.  We will need
to add some ARM-specific nodes for VLD/VST of 3 and 4 128-bit vectors, but
those are not yet implemented.

llvm-svn: 80117
 2009-08-26 17:39:53 +00:00
Anton Korobeynikov
1c904039ce Expand scalar_to_vector - we don't have any isel logic for it now 
llvm-svn: 80107
 2009-08-26 16:26:09 +00:00
Bob Wilson
02f907f33e Remove some unused SDNode definitions. 
llvm-svn: 80015
 2009-08-25 17:52:39 +00:00
Bob Wilson
d4fbf1f70a Expose the instruction contraint string as an argument to the NLdSt class. 
llvm-svn: 80011
 2009-08-25 17:46:06 +00:00
Dale Johannesen
3a5e5c7edd Make linkerprivate work for ARM and PPC. Testcase covers 
all Darwin targets; could be split into separate tests for
the chip subdirectories, but from Chris' last mail on testing
I assume he'd rather have only one test.  Generic seems to be
the best available, maybe there should be a Darwin subdirectory?

llvm-svn: 79877
 2009-08-24 01:03:42 +00:00
Chris Lattner
11f509336c remove the last uses of Config/alloca.h 
llvm-svn: 79873
 2009-08-23 22:57:38 +00:00
Benjamin Kramer
be9f477d5b Remove Streams.h from the targets. 
llvm-svn: 79853
 2009-08-23 11:52:17 +00:00
Chris Lattner
26ec3291f0 eliminate the last DOUTs from the targets. 
llvm-svn: 79833
 2009-08-23 06:49:22 +00:00
Chris Lattner
db2965c71f remove various std::ostream version of printing methods from 
MachineInstr and MachineOperand.  This required eliminating a
bunch of stuff that was using DOUT, I hope that bill doesn't
mind me stealing his fun. ;-)

llvm-svn: 79813
 2009-08-23 03:41:05 +00:00
Benjamin Kramer
52cba58070 Forgot to update some CMakeLists. 
llvm-svn: 79780
 2009-08-22 22:20:11 +00:00
Chris Lattner
8d06945fff rename TAI -> MAI, being careful not to make MAILJMP instructions :) 
llvm-svn: 79777
 2009-08-22 21:43:10 +00:00
Chris Lattner
384b7d24a9 rename COFFMCAsmInfo -> MCAsmInfoCOFF, likewise for darwin. 
llvm-svn: 79773
 2009-08-22 21:03:30 +00:00
Chris Lattner
5d8af49626 Rename TargetAsmInfo (and its subclasses) to MCAsmInfo. 
llvm-svn: 79763
 2009-08-22 20:48:53 +00:00
Devang Patel
c071d6c1b4 Record variable debug info at ISel time directly. 
llvm-svn: 79742
 2009-08-22 17:12:53 +00:00
Eli Friedman
79615641f1 Make x86 test actually test x86 code generation. Fix the 
construct on ARM, which was breaking by coincidence, and add a similar 
testcase for ARM.

llvm-svn: 79719
 2009-08-22 03:13:10 +00:00
Bob Wilson
9482015a0a Rename ARM "lane_cst" operands to "nohash_imm" since they are used for 
several things other than Neon vector lane numbers.  For inline assembly
operands with a "c" print code, check that they really are immediates.

llvm-svn: 79676
 2009-08-21 21:58:55 +00:00
Bob Wilson
6d4400e852 Match VTRN, VZIP, and VUZP shuffles. Restore the tests for these operations, 
now using shuffles instead of intrinsics.

llvm-svn: 79673
 2009-08-21 20:54:19 +00:00
Anton Korobeynikov
20d832fa1b Fix some typos and use type-based isel for VZIP/VUZP/VTRN 
llvm-svn: 79625
 2009-08-21 12:41:42 +00:00
Anton Korobeynikov
218db4a01c Add lowering of ARM 4-element shuffles to multiple instructios via perfectshuffle-generated table. 
llvm-svn: 79624
 2009-08-21 12:41:24 +00:00
Anton Korobeynikov
220512160d Add nodes & dummy matchers for some v{zip,uzp,trn} instructions 
llvm-svn: 79622
 2009-08-21 12:40:50 +00:00
Anton Korobeynikov
dccf7cb911 Expand EXTRACT_SUBVECTOR 
llvm-svn: 79621
 2009-08-21 12:40:35 +00:00
Anton Korobeynikov
f6657d5e02 Provide vext.{16,32} 
llvm-svn: 79620
 2009-08-21 12:40:21 +00:00
Anton Korobeynikov
a2e4bc2312 Use masks not nodes for vector shuffle predicates. Provide set of 'legal' masks, so legalizer won't infinite cycle 
llvm-svn: 79619
 2009-08-21 12:40:07 +00:00
Bob Wilson
c046b62f1a Remove Neon intrinsics for VZIP, VUZP, and VTRN. We will represent these as 
vector shuffles.  Temporarily remove the tests for these operations until the
new implementation is working.

llvm-svn: 79579
 2009-08-21 00:01:42 +00:00
Evan Cheng
86546fb692 Fix an obvious copy-n-paste bug. 
llvm-svn: 79535
 2009-08-20 17:01:04 +00:00
David Goodwin
d57f44783c Update Cortex-A8 instruction itineraries for integer instructions. 
llvm-svn: 79436
 2009-08-19 18:00:44 +00:00
Bob Wilson
fae9057bf0 Add support for Neon VEXT (vector extract) shuffles. 
This is derived from a patch by Anton Korzh.  I modified it to recognize
the VEXT shuffles during legalization and lower them to a target-specific
DAG node.

llvm-svn: 79428
 2009-08-19 17:03:43 +00:00
Chris Lattner
9cbc9c2d13 eliminate AsmPrinter::SwitchToSection and just have clients 
talk to the MCStreamer directly instead.

llvm-svn: 79405
 2009-08-19 05:49:37 +00:00
Jakob Stoklund Olesen
9496240bbf Simplify RegScavenger::FindUnusedReg. 
- Drop the Candidates argument and fix all callers. Now that RegScavenger
  tracks available registers accurately, there is no need to restict the
  search.
- Make sure that no aliases of the found register are in use. This was a potential bug.

llvm-svn: 79369
 2009-08-18 21:14:54 +00:00
Evan Cheng
d4d2a3d0a6 Fix revsh pattern. 
llvm-svn: 79318
 2009-08-18 05:43:23 +00:00
Benjamin Kramer
a8760e3e5a Fix use after free in Thumb2SizeReduction (PR4707). A MachineInstr was used after erasure. 
llvm-svn: 79189
 2009-08-16 11:56:42 +00:00
Bill Wendling
962adec4ee Reapply r79127. It was fixed by d0k. 
llvm-svn: 79136
 2009-08-15 21:21:19 +00:00
Bill Wendling
bfebbb6477 Revert r79127. It was causing compilation errors. 
llvm-svn: 79135
 2009-08-15 21:14:01 +00:00
Evan Cheng
5d841097a9 Change allowsUnalignedMemoryAccesses to take type argument since some targets 
support unaligned mem access only for certain types. (Should it be size
instead?)

ARM v7 supports unaligned access for i16 and i32, some v6 variants support it
as well.

llvm-svn: 79127
 2009-08-15 19:23:44 +00:00
Evan Cheng
9d351a7246 Turn on if-conversion for thumb2. 
llvm-svn: 79084
 2009-08-15 07:59:10 +00:00
Evan Cheng
cf13e0c732 Do not use frame register to reference fixed stack objects if the function is frameless. 
llvm-svn: 79067
 2009-08-15 02:05:35 +00:00
Evan Cheng
4e97ccc132 Leaf functions which do not save CSRs can be frameless even with -disable-fp-elim. 
llvm-svn: 79039
 2009-08-14 20:48:13 +00:00
Anton Korobeynikov
3a0cde8c91 Allow targets to specify their choice of calling conventions per 
libcall. Take advantage of this in the ARM backend to rectify broken
choice of CC when hard float is in effect. PIC16 may want to see if
it could be of use in MakePIC16Libcall, which works unchanged.

Patch by Sandeep!

llvm-svn: 79033
 2009-08-14 20:10:52 +00:00
Evan Cheng
67fd47b38b Add Thumb2 lsr hooks. 
llvm-svn: 79032
 2009-08-14 20:09:37 +00:00
Evan Cheng
ebbcd00c17 80 col violation. 
llvm-svn: 79026
 2009-08-14 19:11:20 +00:00
Evan Cheng
1fa8ad98aa Indentation. 
llvm-svn: 79022
 2009-08-14 19:01:37 +00:00
Evan Cheng
7d8caa143b Also shrink immediate branches; also more assembler workarounds. 
llvm-svn: 79014
 2009-08-14 18:31:44 +00:00
Bob Wilson
80db08baec Now that all the legal Neon shuffles (or at least the ones that have been 
implemented so far) are recognized during legalization, it is easy to fall
back to the default expansion for other shuffles.

llvm-svn: 78995
 2009-08-14 05:16:33 +00:00
Bob Wilson
d337cde6e5 Create a new ARM-specific DAG node, VDUP, to represent a splat from a 
scalar_to_vector.  Generate these VDUP nodes during legalization instead
of trying to recognize the pattern during selection.

llvm-svn: 78994
 2009-08-14 05:13:08 +00:00
Bob Wilson
7a311914ab During legalization, change Neon vdup_lane operations from shuffles to 
target-specific VDUPLANE nodes.  This allows the subreg handling for the
quad-register version to be done easily with Pats in the .td file, instead
of with custom code in ARMISelDAGToDAG.cpp.

llvm-svn: 78993
 2009-08-14 05:08:32 +00:00
Evan Cheng
45d6a21e21 Shrink ADR and LDR from constantpool late during constantpool island pass. 
llvm-svn: 78970
 2009-08-14 00:32:16 +00:00
Evan Cheng
22969c64d0 New entry. 
llvm-svn: 78968
 2009-08-14 00:16:47 +00:00
Owen Anderson
9df206d02d Push LLVMContexts through the IntegerType APIs. 
llvm-svn: 78948
 2009-08-13 21:58:54 +00:00
Daniel Dunbar
40f904fcfb Revert 78892 and 78895, these break generating working executables on 
x86_64-apple-darwin10.

--- Reverse-merging r78895 into '.':
U    test/CodeGen/PowerPC/2008-12-12-EH.ll
U    lib/Target/DarwinTargetAsmInfo.cpp
--- Reverse-merging r78892 into '.':
U    include/llvm/Target/DarwinTargetAsmInfo.h
U    lib/Target/X86/X86TargetAsmInfo.cpp
U    lib/Target/X86/X86TargetAsmInfo.h
U    lib/Target/ARM/ARMTargetAsmInfo.h
U    lib/Target/ARM/ARMTargetMachine.cpp
U    lib/Target/ARM/ARMTargetAsmInfo.cpp
U    lib/Target/PowerPC/PPCTargetAsmInfo.cpp
U    lib/Target/PowerPC/PPCTargetAsmInfo.h
U    lib/Target/PowerPC/PPCTargetMachine.cpp
G    lib/Target/DarwinTargetAsmInfo.cpp

llvm-svn: 78919
 2009-08-13 17:03:38 +00:00
Jim Grosbach
361b7db9bd Add missing defs of R2 and D1. 
llvm-svn: 78918
 2009-08-13 16:59:44 +00:00
David Goodwin
dd797db6bd Finalize itineraries for cortex-a8 integer multiply 
llvm-svn: 78908
 2009-08-13 15:51:13 +00:00
Jim Grosbach
6511e74282 Remove unnecessary newline 
llvm-svn: 78905
 2009-08-13 15:12:16 +00:00
Jim Grosbach
aba7f6b60b Correct comment wording 
llvm-svn: 78904
 2009-08-13 15:11:43 +00:00
Evan Cheng
8bfaf895e5 tPOP_RET now has predicate operands. 
llvm-svn: 78898
 2009-08-13 06:05:07 +00:00
Bob Wilson
e3eedf3cd2 Add a fixme message about canonicalizing floating-point vector types. 
llvm-svn: 78897
 2009-08-13 06:01:30 +00:00
Bob Wilson
8cb7da85e3 Revert r78852 for now. I want to do this differently, but I don't have time 
to fix it tonight.

llvm-svn: 78896
 2009-08-13 05:58:56 +00:00
Evan Cheng
309650d7ba It's ok to spill a tGPR register as long as it's still allocated a low register. 
llvm-svn: 78893
 2009-08-13 05:40:51 +00:00
Chris Lattner
4df533ba16 fix a minor fixme. When building with SL and later tools, the ".eh" symbols 
don't need to be exported from the .o files.

llvm-svn: 78892
 2009-08-13 05:30:22 +00:00
Bruno Cardoso Lopes
f2855aabec Change MCSectionELF to represent a section semantically instead of 
syntactically as a string, very similiar to what Chris did with MachO.
The parsing support and validation is not introduced yet.

llvm-svn: 78890
 2009-08-13 05:07:35 +00:00
Bob Wilson
2940b8e9a5 Add a comment to describe why vector shuffles are legalized to custom DAG nodes. 
llvm-svn: 78884
 2009-08-13 02:13:04 +00:00
Bob Wilson
11ee30bdc8 Use cast<> instead of dyn_cast<> in places where the type is known. 
llvm-svn: 78881
 2009-08-13 01:57:47 +00:00
Dan Gohman
4b9cae5af3 Various AsmWriter output cleanups. Use WriteAsOperand instead of 
PrintUnmangledNameSafely.

llvm-svn: 78878
 2009-08-13 01:36:44 +00:00
Bob Wilson
b089d07a1f Recognize Neon VDUP shuffles during legalization instead of selection. 
llvm-svn: 78852
 2009-08-12 22:54:19 +00:00
Bob Wilson
d8b7ca4c28 Recognize Neon VREV shuffles during legalization instead of selection. 
llvm-svn: 78850
 2009-08-12 22:31:50 +00:00
Dan Gohman
bc6b14ba00 This void is implicit in C++. 
llvm-svn: 78848
 2009-08-12 22:10:57 +00:00
Bob Wilson
0cf2be2466 Generate Neon VTBL and VTBX instructions from the corresponding intrinsics. 
llvm-svn: 78835
 2009-08-12 20:51:55 +00:00
Evan Cheng
9199f62b3d PredCC is meant to be 2 bits wide, like PredCC1. 
llvm-svn: 78829
 2009-08-12 18:35:50 +00:00
David Goodwin
90e7f9873c Enhance the InstrStage object to enable the specification of an Itinerary with overlapping stages. The default is to maintain the current behavior that the "next" stage immediately follows the previous one. 
llvm-svn: 78827
 2009-08-12 18:31:53 +00:00
Jim Grosbach
74c682dde4 Add catch block handling to SjLj exception handling. 
llvm-svn: 78817
 2009-08-12 17:38:44 +00:00
Bob Wilson
61f35e39cf Fix TableGen warnings. This partly reverts my previous change to this file, 
leaving the mayLoad and mayStore settings around only the load/store
instructions where those can't be inferred from the patterns.

llvm-svn: 78815
 2009-08-12 17:04:56 +00:00
Jim Grosbach
77d5653945 register naming cleanup (s/ip/r12/) 
llvm-svn: 78806
 2009-08-12 15:21:13 +00:00
Chris Lattner
55df534293 Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple 
pair instead of from a virtual method on TargetMachine.  This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use 
TargetAsmInfo.

llvm-svn: 78802
 2009-08-12 07:22:17 +00:00
Evan Cheng
c369ccbe83 Shrink Thumb2 movcc instructions. 
llvm-svn: 78790
 2009-08-12 05:17:19 +00:00
Evan Cheng
bb24fe8602 Remove another Darwin assembler workaround. 
llvm-svn: 78779
 2009-08-12 02:07:19 +00:00
Evan Cheng
410447e028 80 col violation. 
llvm-svn: 78778
 2009-08-12 02:03:03 +00:00
Evan Cheng
9302c40108 Remove an Darwin assembler workaround. 
llvm-svn: 78777
 2009-08-12 01:56:42 +00:00
Evan Cheng
65f3e466df Shrink ADDS, ADC, RSB, and SUBS. 
llvm-svn: 78776
 2009-08-12 01:49:45 +00:00
Bob Wilson
00d605d359 Add missing chain operands for VLD* and VST* instructions. 
Set "mayLoad" and "mayStore" on the load/store instructions.

llvm-svn: 78761
 2009-08-12 00:49:01 +00:00
Evan Cheng
a29ee9f509 Shrinkify Thumb2 r = add sp, imm. 
llvm-svn: 78745
 2009-08-11 23:00:31 +00:00
Chris Lattner
a74023896f Change the asmprinter to print the comment character before the 
"inlineasmstart/end" strings so that the contents of the directive
are separate from the comment character.  This lets elf targets
get #APP/#NOAPP for free even if they don't use "#" as the comment
character.  This also allows hoisting the darwin stuff up to the
shared TAI class.

llvm-svn: 78737
 2009-08-11 22:39:40 +00:00
David Goodwin
2686178489 Allow a zero cycle stage to reserve/require a FU without advancing the cycle counter. 
llvm-svn: 78736
 2009-08-11 22:38:43 +00:00