1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 04:22:57 +02:00
Commit Graph

26 Commits

Author SHA1 Message Date
Elena Demikhovsky
57057960b0 AVX-512: changed intrinsics for mask operations
llvm-svn: 196918
2013-12-10 13:53:10 +00:00
Elena Demikhovsky
b3a0e7bbed AVX-512: Changed intrinsics of VPCONFLICT to match GCC builtin form
llvm-svn: 196914
2013-12-10 11:58:35 +00:00
Cameron McInally
ca9f2bc25b Update AVX512 vector blend intrinsic names.
llvm-svn: 196581
2013-12-06 13:35:35 +00:00
Cameron McInally
2ff051483c Add an intrinsic for the SSE2 PAUSE instruction.
llvm-svn: 195697
2013-11-26 00:20:43 +00:00
Cameron McInally
cae8bdeb82 Add AVX512 unmasked FMA intrinsics and support.
llvm-svn: 194824
2013-11-15 17:01:14 +00:00
Cameron McInally
02e4f56c18 Add support for AVX512 masked vector blend intrinsics.
llvm-svn: 194006
2013-11-04 19:14:56 +00:00
Elena Demikhovsky
9c41e95ef5 AVX-512: fixed a typo in builtin name
llvm-svn: 193988
2013-11-04 11:48:23 +00:00
Elena Demikhovsky
841cd7d09e AVX-512: added VPCONFLICT instruction and intrinsics,
added EVEX_KZ to tablegen

llvm-svn: 193959
2013-11-03 13:46:31 +00:00
Cameron McInally
c38779faad Add AVX512 unmasked integer broadcast intrinsics and support.
llvm-svn: 193748
2013-10-31 13:56:31 +00:00
Cameron McInally
41fc626495 Refactor the AVX512 intrinsics. Cluster the intrinsics into the appropriate vector extension class within the .td file.
llvm-svn: 193690
2013-10-30 15:19:10 +00:00
Elena Demikhovsky
0e6849495e AVX-512: PMIN/PMAX intrinsics and patterns
Patch by Cameron McInally <cameron.mcinally@nyu.edu>

llvm-svn: 193497
2013-10-27 08:18:37 +00:00
Elena Demikhovsky
da06b9b278 AVX-512: added VCVTPH2PS, VCVTPS2PH with intrinsics
llvm-svn: 193312
2013-10-24 07:16:35 +00:00
Craig Topper
037594e792 Remove x86_sse42_crc32_64_8 intrinsic. It has no functional difference from x86_sse42_crc32_32_8 and was not mapped to a clang builtin. I'm not even sure why this form of the instruction is even called out explicitly in the docs. Also add AutoUpgrade support to convert it into the other intrinsic with appropriate trunc and zext.
llvm-svn: 192672
2013-10-15 05:20:47 +00:00
Elena Demikhovsky
f24ecf7862 AVX-512: Added VRCP28 and VRSQRT28 instructions and intrinsics.
llvm-svn: 192283
2013-10-09 08:16:14 +00:00
Elena Demikhovsky
cb8eaca2e4 AVX-512: added scalar convert instructions and intrinsics.
Fixed load folding in VPERM2I instruction.

llvm-svn: 192063
2013-10-06 13:11:09 +00:00
Craig Topper
0a8f3fc996 Remove unneeded TBM intrinsics. The arithmetic/logical operation patterns are sufficient.
llvm-svn: 192039
2013-10-05 19:22:59 +00:00
Craig Topper
5ac188d0f2 Add patterns for selecting TBM instructions from logical operations. Patch from Yunzhong Gao.
llvm-svn: 191871
2013-10-03 04:16:45 +00:00
Yunzhong Gao
e51da27a74 Adding intrinsics to the llvm backend for TBM instruction set.
Phabricator code review is located here: http://llvm-reviews.chandlerc.com/D1750

llvm-svn: 191539
2013-09-27 18:38:42 +00:00
Ben Langmuir
c0ab36fe2e Add llvm.x86.* intrinsics for Intel SHA Extensions
Add llvm.x86.* intrinsics for all of the Intel SHA Extensions instructions, as
well as tests. Also remove mayLoad and hasSideEffects, which can be inferred
from the instruction patterns.

llvm-svn: 190864
2013-09-17 13:44:39 +00:00
Craig Topper
3a6a903891 Make a more clear AVX-512 section header that matches similar in the file.
llvm-svn: 190843
2013-09-17 03:34:09 +00:00
Elena Demikhovsky
af085f619a AVX-512: compiler intrinsics
llvm-svn: 188654
2013-08-19 06:55:01 +00:00
Juergen Ributzka
dedbd665dd The vbroadcastsi256 intrinsic does not exactly resemble the GCC
builtin. The GCC builtin expects the arguments to be passed by val,
whereas the LLVM intrinsic expects a pointer instead.

This is related to PR 16581 and rdar:14747994.

llvm-svn: 188608
2013-08-17 16:38:37 +00:00
Elena Demikhovsky
cb3f9da2e3 AVX-512 set: added mask operations, lowering BUILD_VECTOR for i1 vector types.
Added intrinsics and tests.

llvm-svn: 187717
2013-08-05 08:52:21 +00:00
Michael Liao
427149cbcf Add support of RDSEED defined in AVX2 extension
llvm-svn: 178314
2013-03-28 23:41:26 +00:00
Michael Liao
bd3f6b0eea Add XTEST codegen support
llvm-svn: 178083
2013-03-26 22:47:01 +00:00
Chandler Carruth
4c1f3c24db Move all of the header files which are involved in modelling the LLVM IR
into their new header subdirectory: include/llvm/IR. This matches the
directory structure of lib, and begins to correct a long standing point
of file layout clutter in LLVM.

There are still more header files to move here, but I wanted to handle
them in separate commits to make tracking what files make sense at each
layer easier.

The only really questionable files here are the target intrinsic
tablegen files. But that's a battle I'd rather not fight today.

I've updated both CMake and Makefile build systems (I think, and my
tests think, but I may have missed something).

I've also re-sorted the includes throughout the project. I'll be
committing updates to Clang, DragonEgg, and Polly momentarily.

llvm-svn: 171366
2013-01-02 11:36:10 +00:00