1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 02:52:53 +02:00
Commit Graph

100238 Commits

Author SHA1 Message Date
Evgeniy Stepanov
3dbe688704 Unconditionally include msan_interface.h when building with MSan.
Any version of Clang that does not provide this header is way too old to
bootstrap with MSan.

llvm-svn: 201776
2014-02-20 11:37:03 +00:00
Daniel Sanders
42b55aa80c Added release note about making all inline assembly parsed (even for assembly
output) when the integrated assembler is enabled.

llvm-svn: 201770
2014-02-20 09:24:15 +00:00
NAKAMURA Takumi
75450aa5ca COFFObjectFile.cpp: Appease msvc in r201760.
llvm-svn: 201769
2014-02-20 09:16:23 +00:00
Craig Topper
80c9d78b97 [x86] Switch PAUSE instruction to use XS prefix instead of HasREPPrefix. Remove HasREPPrefix support from disassembler table generator since its now only used by CodeGenOnly instructions.
llvm-svn: 201767
2014-02-20 07:59:43 +00:00
Elena Demikhovsky
27104d29fd AVX-512: added a lit test for truncate operation
llvm-svn: 201763
2014-02-20 07:34:13 +00:00
Elena Demikhovsky
f4fb18943a AVX-512: Fixed compilation issue
llvm-svn: 201761
2014-02-20 07:00:10 +00:00
Rui Ueyama
c9f1e84a78 llvm-objdump/COFF: Print SEH table addresses.
SEH table addresses are VA in COFF file. In this patch we convert VA to RVA
before printing it, because dumpbin prints them as RVAs.

llvm-svn: 201760
2014-02-20 06:51:07 +00:00
Nick Lewycky
19e8384465 Fix change in behaviour accidentally introduced in r201754.
llvm-svn: 201758
2014-02-20 06:35:31 +00:00
Elena Demikhovsky
af8e1ef280 AVX-512: Assembly parsing of broadcast semantic in AVX-512; imlemented by Nis Zinovy (zinovy.y.nis@intel.com)
Fixed truncate i32 to i1; a test will be provided in the next commit.

llvm-svn: 201757
2014-02-20 06:34:39 +00:00
Rui Ueyama
e9728e0d5b Object/COFF: Fix padding between CSDVersion and EditList.
llvm-svn: 201756
2014-02-20 06:02:09 +00:00
Nick Lewycky
d413ce9329 Simplify the implementation of getUnderlyingObjectsForInstr, without intending to change the semantics at all.
llvm-svn: 201754
2014-02-20 05:06:26 +00:00
Eric Christopher
eb6b7bc131 Add support for hashing attributes with DW_FORM_block. This required
passing down an AsmPrinter instance so we could compute the size of
the block which could be target specific. All of the test cases in
the unittest don't have any target specific data so we can use a NULL
AsmPrinter there. This also depends upon block data being added as
integers.

We can now hash the entire fission-cu.ll compile unit so turn the
flag on there with the hash value.

llvm-svn: 201752
2014-02-20 02:50:45 +00:00
Eric Christopher
690f652a2f Make DIELoc/DIEBlock's ComputeSize method const. Add a setSize
method to actually set it in the class to avoid computing it
multiple times.

llvm-svn: 201751
2014-02-20 02:40:45 +00:00
Eric Christopher
273c29a12d Format.
llvm-svn: 201750
2014-02-20 02:40:41 +00:00
Eric Christopher
47dee3345a This tests DW_FORM_sdata, not DW_FORM_block. Make the test say so.
llvm-svn: 201749
2014-02-20 01:27:51 +00:00
Eric Christopher
bd2823d90b Fix commit thinkos from splitting out patches.
llvm-svn: 201748
2014-02-20 00:59:17 +00:00
Eric Christopher
043a17a7b0 Add support for hashing DW_FORM_sdata and a small testcase.
llvm-svn: 201747
2014-02-20 00:54:40 +00:00
Eric Christopher
45a3ce6871 Format.
llvm-svn: 201746
2014-02-20 00:54:38 +00:00
Eric Christopher
750f6d6f17 Remove FIXME that had snuck in.
llvm-svn: 201745
2014-02-20 00:54:35 +00:00
Tobias Grosser
4fd748edda Avoid collisions with Objective-C++ keywords
Change parameter names exposed in headers to avoid collisions with Objective-C++
keywords.

Contributed-by: Graham Lee <graham@iamleeg.com>
llvm-svn: 201727
2014-02-19 22:16:53 +00:00
Tobias Grosser
ccc79e1f2b Fix typo
Found by: Duncan P. N. Exon Smith <dexonsmith@apple.com>

llvm-svn: 201726
2014-02-19 22:16:49 +00:00
Reed Kotler
325c6f3182 Make one statement easier to understand from post commmit feedback from a
review of the previous patch that introduced this week.

llvm-svn: 201723
2014-02-19 22:11:45 +00:00
Roman Divacky
1a91fd1bdc Expand 64bit {SHL,SHR,SRA}_PARTS on sparcv9.
llvm-svn: 201718
2014-02-19 21:35:39 +00:00
Rafael Espindola
60133f3afe move getNameWithPrefix and getSymbol to TargetMachine.
TargetLoweringBase is implemented in CodeGen, so before this patch we had
a dependency fom Target to CodeGen. This would show up as a link failure of
llvm-stress when building with -DBUILD_SHARED_LIBS=ON.

This fixes pr18900.

llvm-svn: 201711
2014-02-19 20:30:41 +00:00
Rafael Espindola
aea6192f20 Add back r201608, r201622, r201624 and r201625
r201608 made llvm corretly handle private globals with MachO. r201622 fixed
a bug in it and r201624 and r201625 were changes for using private linkage,
assuming that llvm would do the right thing.

They all got reverted because r201608 introduced a crash in LTO. This patch
includes a fix for that. The issue was that TargetLoweringObjectFile now has
to be initialized before we can mangle names of private globals. This is
trivially true during the normal codegen pipeline (the asm printer does it),
but LTO has to do it manually.

llvm-svn: 201700
2014-02-19 17:23:20 +00:00
Eli Bendersky
76b2f4f843 Refactor TargetOptions initialization into a single place.
The same code (~20 lines) for initializing a TargetOptions object from CodeGen
cmdline flags is duplicated 4 times in 4 different tools. This patch moves it
into a utility function.

Since the CodeGen/CommandFlags.h file defines cl::opt flags in a header, it's
a bit of a touchy situation because we should only link them into tools. So this
patch puts the init function in the header.

llvm-svn: 201699
2014-02-19 17:09:35 +00:00
Christian Pirker
1d938fb7c4 Test commit - remove the new line to lib/Target/AArch64/AArch64TargetMachine.cpp.
llvm-svn: 201698
2014-02-19 16:58:28 +00:00
Daniel Sanders
2c10e15edf [mips] Use multiple FileCheck prefixes rather than run the test multiple times
llvm-svn: 201695
2014-02-19 16:27:36 +00:00
Daniel Sanders
b1311110b0 [mips] In the integrated assembler, select the default feature bits by changing the CPU value.
This is consistent with the way CodeGen acheives this. However, CodeGen
always selects mips32 (even when the architecture is mips64).

llvm-svn: 201694
2014-02-19 16:13:26 +00:00
Christian Pirker
be6d8a86fb Test commit - added a new line to lib/Target/AArch64/AArch64TargetMachine.cpp.
llvm-svn: 201692
2014-02-19 16:07:32 +00:00
Venkatraman Govindaraju
2661a3f234 [Sparc] Remove spurious checks from a testcase.
llvm-svn: 201690
2014-02-19 15:57:49 +00:00
Daniel Sanders
a4b8f677a1 [mips] Use llvm::Triple in ParseMipsTriple() instead of manually parsing it
No functional change.

llvm-svn: 201689
2014-02-19 15:55:21 +00:00
Rafael Espindola
5bdf119d0c This reverts commit r201625 and r201624.
Since r201608 got reverted, it is not safe to use private linkage in these cases
until it is committed back.

llvm-svn: 201688
2014-02-19 15:49:46 +00:00
Daniel Sanders
b0b9c3767b [mips] Add explicit N32 and N64 tests to nabi-regs.s test
llvm-svn: 201684
2014-02-19 15:30:54 +00:00
Alexey Samsonov
4d23355419 Support GTest for FreeBSD platforms (9.x)
Patch by Viktor Kutuzov!

llvm-svn: 201683
2014-02-19 15:18:30 +00:00
Daniel Sanders
a5d02b49e6 [mips] Remove unused NotN64 predicate
llvm-svn: 201682
2014-02-19 15:16:47 +00:00
Cameron McInally
7173a45caf Fix AVX512 vector sqrt assembly strings.
llvm-svn: 201681
2014-02-19 15:16:09 +00:00
Logan Chien
14b00f2235 Disable override and final C++ keyword in gcc 4.6.
According to http://gcc.gnu.org/projects/cxx0x.html,
override and final keyword was added in gcc 4.7.  Thus,
we should not use these keywords in gcc 4.6 even when
__GXX_EXPERIMENTAL_CXX0X__ is available.

llvm-svn: 201679
2014-02-19 15:04:29 +00:00
Daniel Jasper
bf4e7d8ac3 Revert r201622 and r201608.
This causes the LLVMgold plugin to segfault. More information on the
replies to r201608.

llvm-svn: 201669
2014-02-19 12:26:01 +00:00
Tim Northover
7e8f99575c X86: move test requiring X86TargetLowering info into its own directory
If LLVM is built without X86 as a supported target then the test would
mysteriously fail.

llvm-svn: 201668
2014-02-19 12:24:19 +00:00
Tim Northover
4152cbaed5 Try addding datalayout in case that's what Hexagon doesn't like.
Just a wild stab in the dark really, but in the absence of any ability to
reproduce the problem...

llvm-svn: 201658
2014-02-19 10:32:40 +00:00
Tim Northover
1b102abe53 X86 CodeGenPrep: sink shufflevectors before shifts
On x86, shifting a vector by a scalar is significantly cheaper than shifting a
vector by another fully general vector. Unfortunately, because SelectionDAG
operates on just one basic block at a time, the shufflevector instruction that
reveals whether the right-hand side of a shift *is* really a scalar is often
not visible to CodeGen when it's needed.

This adds another handler to CodeGenPrepare, to sink any useful shufflevector
instructions down to the basic block where they're used, predicated on a target
hook (since on other architectures, doing so will often just introduce extra
real work).

rdar://problem/16063505

llvm-svn: 201655
2014-02-19 10:02:43 +00:00
Evgeniy Stepanov
aa102ff6b9 Build PIE binaries when cross-compiling to Android.
This change also removes CMAKE_LINK_FLAGS setting that seems to be ignored by cmake.

llvm-svn: 201654
2014-02-19 09:51:22 +00:00
Alexey Samsonov
f0a1f6058a Try to revive buildbots after r201620
llvm-svn: 201651
2014-02-19 08:30:55 +00:00
Craig Topper
de3c74571e Remove special FP opcode maps and instead add enough MRM_XX formats to handle all the FP operations. This increases format by 1 bit, but decreases opcode map by 1 bit so the TSFlags size doesn't change.
llvm-svn: 201649
2014-02-19 08:25:02 +00:00
Craig Topper
b56c73e1c5 Reduce size of map field in X86 TSFlags since it now requires less bits.
llvm-svn: 201646
2014-02-19 07:29:07 +00:00
Craig Topper
7d159c5e98 Put some of the X86 formats in a more logical order.
llvm-svn: 201645
2014-02-19 06:59:13 +00:00
Craig Topper
5b20c52fcc Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables.
llvm-svn: 201641
2014-02-19 05:34:21 +00:00
Rui Ueyama
e6bd7df6c8 llvm-objdump/COFF: Print load configuration table.
Load Configuration Table may contain a pointer to SEH table. This patch is to
print the offset to the table. Printing SEH table contents is a TODO.

The layout of Layout Configuration Table is described in Microsoft PE/COFF
Object File Format Spec, but the table's offset/size descriptions seems to be
totally wrong, at least in revision 8.3 of the spec. I believe the table in
this patch is the correct one.

llvm-svn: 201638
2014-02-19 03:53:11 +00:00
Mingjie Xing
e450c0faf7 Fix a typo in a comment.
llvm-svn: 201633
2014-02-19 03:20:46 +00:00