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3ecdcd18c5
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412 Commits

Author SHA1 Message Date
Alkis Evlogimenos
3ecdcd18c5 Add parent pointer to MachineInstr that points to owning 
MachineBasicBlock. Also change opcode to a short and numImplicitRefs
to an unsigned char so that overall MachineInstr's size stays the
same.

llvm-svn: 11357
 2004-02-12 18:49:07 +00:00
Chris Lattner
ef375052c6 Rename the opCode instance variable to Opcode 
llvm-svn: 11348
 2004-02-12 16:09:53 +00:00
Chris Lattner
04c37927bd Remove a dead field from MachineInstr! 
llvm-svn: 11347
 2004-02-12 16:05:03 +00:00
Brian Gaeke
57484e290d Add one more doxygen comment. 
llvm-svn: 11344
 2004-02-12 04:26:49 +00:00
Brian Gaeke
840e7e40fe Express one of MachineOperand's many constructors in terms of another, by means of default arguments. 
llvm-svn: 11343
 2004-02-12 04:15:00 +00:00
Brian Gaeke
0608698c34 Remove these MachineOpCodeFlags and their accessor - they are never set. 
llvm-svn: 11341
 2004-02-12 04:00:55 +00:00
Alkis Evlogimenos
b755d35fd2 Change MachineBasicBlock's vector of MachineInstr pointers into an 
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.

llvm-svn: 11340
 2004-02-12 02:27:10 +00:00
Brian Gaeke
2e521768eb Remove getOpCode(). Help doxygenify some comments. 
llvm-svn: 11338
 2004-02-12 01:34:03 +00:00
Chris Lattner
a04a1456da Urg, the X86 backend DOES use virtual register operands. :( 
llvm-svn: 11288
 2004-02-10 21:43:11 +00:00
Chris Lattner
286169ff60 Remove and simplify some of the bewildering collection of isFOORegister 
methods which have strangely different semantics in different backends,
and noone knew what any did.

Getting rid of these ALSO allows the dependence of MachineInstr.h on
MRegisterInfo.h to be removed, which makes me much happier, and probably
alkis too.  :)

llvm-svn: 11287
 2004-02-10 21:21:17 +00:00
Chris Lattner
04f36062ea Eliminate MachineOperand::isPhysicalRegister. The X86 backend should use 
MRegisterInfo::isPhysicalRegister(MO.getReg()) and the Sparc backend should
use isMachineRegister()

llvm-svn: 11279
 2004-02-10 20:42:11 +00:00
Chris Lattner
854737de3f Simplify condition, this does not change the predicate at all though 
llvm-svn: 11275
 2004-02-10 20:30:40 +00:00
Brian Gaeke
00b2107e2a SchedGraph doesn't need to be friends with SchedGraphNodeCommon anymore. 
llvm-svn: 11240
 2004-02-09 18:43:06 +00:00
Alkis Evlogimenos
676e5b8997 Modify the two address instruction pass to remove the duplicate 
operand of the instruction and thus simplify the register allocation.

llvm-svn: 11124
 2004-02-04 22:17:40 +00:00
Brian Gaeke
efde1c6bb8 Include <iosfwd> and <string> instead of <iostream>. 
Take away the default iostream argument of createMachineFunctionPrinterPass(),
at Chris's request.

llvm-svn: 11121
 2004-02-04 21:41:10 +00:00
Alkis Evlogimenos
5e78d4bd75 When an instruction like: A += B had both A and B virtual registers 
spilled, A was loaded from its stack location twice. This fixes the bug.

llvm-svn: 11093
 2004-02-03 01:13:07 +00:00
Alkis Evlogimenos
e128cb3295 Revert changes. Will implement this using a different set of primitives 
llvm-svn: 11091
 2004-02-02 23:08:58 +00:00
Alkis Evlogimenos
e20cdc6437 Add MachineOperand::setDef() and MachineOperand::setUse() so that the 
TwoAddressInstructionPass can correctly update use/def information.

llvm-svn: 11086
 2004-02-02 21:55:18 +00:00
Alkis Evlogimenos
d1ec5f36ee Merge safe parts from last night's buggy commit. These do not break 
any test cases :-)

llvm-svn: 11032
 2004-01-31 19:59:32 +00:00
Alkis Evlogimenos
b9df133d67 Revert last night's changes as they broke some tests. Will remerge parts of the patch. 
llvm-svn: 11029
 2004-01-31 14:37:41 +00:00
Alkis Evlogimenos
c0db519832 Several performance enhancements and cleanups from Chris. 
Simplification of LiveIntervals::Interval::overlaps() and addition of
examples to overlaps() and liveAt() to make them clearer.

llvm-svn: 11028
 2004-01-31 04:56:07 +00:00
Chris Lattner
8671a315d5 Add a new lazily constructed mapping from Idx's the MBB they represent 
llvm-svn: 11017
 2004-01-30 22:08:09 +00:00
Brian Gaeke
9cf840250b Give clients of MachineFunctionPrinter the ability to specify a banner and 
choose an ostream.

llvm-svn: 11016
 2004-01-30 21:53:46 +00:00
Alkis Evlogimenos
2a8df1739b Fix failing test cases with joined live intervals. It turns out that 
when joining we need to check if we overlap with the second interval
or any of its aliases.

Also make joining intervals the default.

llvm-svn: 10973
 2004-01-23 13:37:51 +00:00
Alkis Evlogimenos
b4745bda05 Add option to join live intervals. Two intervals are joined if there 
is a move between two registers, at least one of the registers is
virtual and the two live intervals do not overlap.

This results in about 40% reduction in intervals, 30% decrease in the
register allocators running time and a 20% increase in peephole
optimizations (mainly move eliminations).

The option can be enabled by passing -join-liveintervals where
appropriate.

llvm-svn: 10965
 2004-01-22 23:08:45 +00:00
Tanya Lattner
33079fad04 Moved iterators to common file. 
llvm-svn: 10925
 2004-01-20 17:49:42 +00:00
Alkis Evlogimenos
38f0f867b3 Fold open interval ends handling into 
LiveIntervals::Interval::expiredAt() and simplify regalloc code.

llvm-svn: 10894
 2004-01-16 20:17:05 +00:00
Alkis Evlogimenos
61db3621bd Use a list instead of a vector to store intervals. This will be needed 
when we join intervals and one of the two will need to be removed.

llvm-svn: 10892
 2004-01-16 16:06:59 +00:00
Alkis Evlogimenos
c73c31a496 Remove allocatable registers vector. It is already provided by 
LiveVariables.

llvm-svn: 10830
 2004-01-13 22:10:43 +00:00
Alkis Evlogimenos
ef7c077e63 Make LiveVariables::HandlePhysRegUse and 
LiveVariables::HandlePhysRegDef private they use information that is
not in memory when LiveVariables finishes the analysis.

Also update the TwoAddressInstructionPass to not use this interface.

llvm-svn: 10755
 2004-01-11 09:18:45 +00:00
Chris Lattner
c37577eb9f Clean up a lot of the code I added yesterday by exposing the IntrinsicLowering 
implementation from the TargetMachine directly.

llvm-svn: 10636
 2003-12-28 21:23:38 +00:00
Alkis Evlogimenos
fc01aac4d8 Add coalescing to register allocator. A hint is added to each interval 
which denotes the register we would like to be assigned to (virtual or
physical). In register allocation, if this hint exists and we can map
it to a physical register (it is either a physical register or it is a
virtual register that already got assigned to a physical one) we use
that register if it is available instead of a random one in the free
pool.

llvm-svn: 10634
 2003-12-28 17:58:18 +00:00
Chris Lattner
215d4146fe add argument 
llvm-svn: 10625
 2003-12-28 09:42:49 +00:00
Chris Lattner
00a54b7c00 Move header into top-level llvm dir 
llvm-svn: 10622
 2003-12-28 08:30:07 +00:00
Chris Lattner
8bc92e92ee Add new interface that allows removal of some code from the code generators, 
provides for future extensibility, might help the LLVA project avoid having to
hack their own LLI, and provides support required for the experimental Venus
project.

llvm-svn: 10620
 2003-12-28 08:19:13 +00:00
Alkis Evlogimenos
4401d0a7a3 Change weight into a float so that we can take into account the 
nesting level when computing it. Right now the allocator uses:

    w = sum_over_defs_uses( 10 ^ nesting level );

llvm-svn: 10569
 2003-12-21 20:19:10 +00:00
Alkis Evlogimenos
4f98b79ef0 Add support for inactive intervals. This effectively reuses registers 
for live ranges that fall into assigned registers' holes.

llvm-svn: 10566
 2003-12-21 05:43:40 +00:00
Chris Lattner
58d2beb555 Rearrange code, indent for the namespace, add the createMachineFunctionPrinterPass 
to passes.h, and add the machien destruction pass to Passes.h

llvm-svn: 10557
 2003-12-20 10:18:58 +00:00
Chris Lattner
f987d900a4 Remove sparc specific passes from public headers 
llvm-svn: 10552
 2003-12-20 09:15:21 +00:00
Chris Lattner
1963b162db Remove a horrible API 
llvm-svn: 10551
 2003-12-20 09:15:01 +00:00
Alkis Evlogimenos
9181e0ab5b Remove TwoAddressInstruction from the public headers and add an ID 
instead, since this pass doesn't expose any state to its users.

llvm-svn: 10520
 2003-12-18 22:40:24 +00:00
Alkis Evlogimenos
90aeecae42 Add TwoAddressInstructionPass to handle instructions that have two or 
more operands and the two first operands are constrained to be the
same. The pass takes an instruction of the form:

        a = b op c

and transforms it into:

        a = b
        a = a op c

and also preserves live variables.

llvm-svn: 10512
 2003-12-18 13:06:04 +00:00
Alkis Evlogimenos
befef566f6 Rename LiveIntervals::expired() to LiveIntervals::expiredAt(). 
llvm-svn: 10511
 2003-12-18 08:56:11 +00:00
Alkis Evlogimenos
8e2fcc7d79 Handle multiple virtual register definitions gracefully. 
Move some of the longer LiveIntervals::Interval method out of the
header and add debug information to them. Fix bug and simplify range
merging code.

llvm-svn: 10509
 2003-12-18 08:48:48 +00:00
Alkis Evlogimenos
ac4fe24ed8 I wonder how this didn't cause any tests to fail... 
llvm-svn: 10462
 2003-12-14 13:30:19 +00:00
Alkis Evlogimenos
29127b8825 Change interface of MachineOperand as follows: 
a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
    b) add isUse(), isDef()
    c) rename opHiBits32() to isHiBits32(),
              opLoBits32() to isLoBits32(),
              opHiBits64() to isHiBits64(),
              opLoBits64() to isLoBits64().

This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.

llvm-svn: 10461
 2003-12-14 13:24:17 +00:00
Alkis Evlogimenos
f84f86137b Ignore non-allocatable physical registers in live interval analysis. 
llvm-svn: 10449
 2003-12-13 11:11:02 +00:00
Alkis Evlogimenos
229c2b9181 Move operator<<(std::ostream&, const LiveInterval&) out of the header file. 
llvm-svn: 10290
 2003-12-05 10:38:28 +00:00
Chris Lattner
e595976ed9 Add some "useful" methods 
llvm-svn: 10277
 2003-12-01 05:30:29 +00:00
Alkis Evlogimenos
6627a32ff9 Merging the linear scan register allocator in trunk. It currently passes most tests under test/Programs/SingleSource/Benchmarks/Shootout so development will continue on trunk. The allocator is not enabled by default. You will need to pass -regallo=linearscan to lli or llc to use it. 
llvm-svn: 10103
 2003-11-20 03:32:25 +00:00