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37271 Commits

Author SHA1 Message Date
Chris Lattner
3f060e3216 add an optimized form of OPC_EmitMergeInputChains for the 1, 0 and 
1, 1 cases which are by-far the most frequent.  This shrinks the X86
isel table from 77014 -> 74657 bytes.

llvm-svn: 99740
 2010-03-28 05:50:16 +00:00
Chris Lattner
bacf4edba3 don't add nodes to the now-dead nodes list multiple times, this 
can cause a crash on crazy situations in msp430 when morph-node-to
is disabled.

llvm-svn: 99739
 2010-03-28 05:28:31 +00:00
Chris Lattner
4a35b78926 Improve systemz to model cmp and ucmp nodes as returning 
their flags correctly.

llvm-svn: 99738
 2010-03-28 05:21:52 +00:00
Chris Lattner
99fafcf87e the FPCmp node returns an i32. 
llvm-svn: 99737
 2010-03-28 05:12:57 +00:00
Chris Lattner
c5499723d5 fix some modelling problems exposed by a patch I'm working on. bsr/bsf/ptest 
nodes all have an EFLAGS result when made by isel lowering.

llvm-svn: 99736
 2010-03-28 05:07:17 +00:00
Chris Lattner
bb65543f01 don't add flag nodes with chain results to the NowDeadNodes 
list multiple times when MorphNodeTo can't be applied.

llvm-svn: 99735
 2010-03-28 04:54:33 +00:00
Jeffrey Yasskin
727548a580 Oops, r98447 dropped the reference to ForwardType in the wrong place in 
Type::destroy(), so it got skipped for FunctionTypes, StructTypes, and
UnionTypes.  This fixes the resulting leaks in test/Feature/opaquetypes.ll and
test/Integer/opaquetypes_bt.ll.

llvm-svn: 99732
 2010-03-28 01:03:47 +00:00
Chris Lattner
85756c913d improve -debug-only=isel comments for cases when we don't enter a 
scope due to obviously false predicate.

llvm-svn: 99723
 2010-03-27 18:54:50 +00:00
Jeffrey Yasskin
7fb5e38134 Remove another memory leak from ABCD by using Edges by value instead of 
pointer.  There was also a SmallPtrSet whose settiness wasn't being used, so I
changed it to a SmallVector.

llvm-svn: 99713
 2010-03-27 09:09:17 +00:00
Jeffrey Yasskin
8a02134682 In ABCD, change the non-null Bound*s to Bound&s. 
llvm-svn: 99711
 2010-03-27 08:15:46 +00:00
Jeffrey Yasskin
b5e9203c58 Fix a memory leak in ABCD by giving ownership of Bound objects to the 
MemoizedResultChart.

llvm-svn: 99710
 2010-03-27 08:09:24 +00:00
Jeffrey Yasskin
7378e4ce11 Avoid leaking the memory allocated for GlobalVariables in the interpreter, by 
freeing that memory when the GV is destroyed.

llvm-svn: 99706
 2010-03-27 04:53:56 +00:00
Bob Wilson
6d9296abc6 Fix indentation. 
llvm-svn: 99705
 2010-03-27 04:01:23 +00:00
Bob Wilson
be89c51aa3 Add a format argument to the N3V and N3VX classes, removing the N3Vf class. 
llvm-svn: 99704
 2010-03-27 03:56:52 +00:00
Chris Lattner
154641e2ff eliminate the last of the parallel's! 
llvm-svn: 99700
 2010-03-27 02:47:14 +00:00
Eric Christopher
cf18deaea3 When we promote a load of an argument make sure to take the alignment 
of the previous load - it's usually important.  For example, we don't want
to blindly turn an unaligned load into an aligned one.

llvm-svn: 99699
 2010-03-27 01:54:00 +00:00
Bill Wendling
3f00f8044f Forgot the part where we handle the ".llvm.eh.catch.all.value". 
llvm-svn: 99697
 2010-03-27 01:24:30 +00:00
Bill Wendling
ced10a4468 Return if we changed anything or not. 
llvm-svn: 99695
 2010-03-27 01:22:38 +00:00
Bill Wendling
4b55d4fd59 If a selector has a call to ".llvm.eh.catch.all.value" that we haven't 
converted, then use the initializer, since using the name itself won't work.

llvm-svn: 99692
 2010-03-27 01:19:12 +00:00
Johnny Chen
794a9a3941 Add NVMulSLFrm to represent "3-register multiply with scalar" operations and set 
it as the format for the appropriate N3V*SL*<> classes.  These instructions
require special handling of the M:Vm field which encodes the restricted Dm and
the lane index within Dm.

Examples are A8.6.325 VMLA, VMLAL, VMLS, VMLSL (by scalar):

	vmlal.s32	q3, d2, d10[0]

llvm-svn: 99690
 2010-03-27 01:03:13 +00:00
Chris Lattner
22dceb8eb0 eliminate almost all the rest of the x86-32 parallels. 
llvm-svn: 99686
 2010-03-27 00:45:04 +00:00
Jim Grosbach
f884dba43d Thumb2 storeFrom/LoadToStackSlot() need to handle tGPR regs directly, not pass 
through to the generic version. The generic functions use STR/LDR, but T2
needs the t2STR/t2LDR instead so we get the addressing mode correct.

llvm-svn: 99678
 2010-03-27 00:09:12 +00:00
Chris Lattner
ebe18a8f38 improve portability to minix, patch by 
Kees van Reeuwijk for PR6704

llvm-svn: 99677
 2010-03-26 23:54:15 +00:00
Johnny Chen
0763231e02 Remove the duplicate multiclass N3VSh_QHSD and use N3VInt_QHSD which is modified 
to now take a format argument.  N3VDInt<> and N3VQInt<> are modified to take a
format argument as well.

llvm-svn: 99676
 2010-03-26 23:49:07 +00:00
Bill Wendling
dc6507730a If we mark clean-ups as clean-ups, then it could break when inlining through an 
'invoke' instruction. You will get a situation like this:

bb:
  %ehptr = eh.exception()
  %sel = eh.selector(%ehptr, @per, 0);

...

bb2:
  invoke _Unwind_Resume_or_Rethrow(%ehptr) %normal unwind to %lpad

lpad:
  ...

The unwinder will see the %sel call as a clean-up and, if it doesn't have a
catch further up the call stack, it will skip running it. But there *is* another
catch up the stack -- the catch for the %lpad. However, we can't see that. This
is fixed in code-gen, where we detect this situation, and convert the "clean-up"
selector call into a "catch-all" selector call. This gives us the correct
semantics.

llvm-svn: 99671
 2010-03-26 23:41:30 +00:00
Johnny Chen
ca1d7dcfe4 Add NVExtFrm to represent NEON Vector Extract Instructions, that uses Inst{11-8} 
to encode the byte location of the extracted result in the concatenation of the
operands, from the least significant end.

Modify VEXTd and VEXTq classes to use the format.

llvm-svn: 99659
 2010-03-26 22:28:56 +00:00
Chris Lattner
be06cb7f99 remove a constructor implementation that isn't declared 
in the header.  How can both clang and gcc accept this?

PR6703

llvm-svn: 99658
 2010-03-26 22:17:24 +00:00
Anton Korobeynikov
add7caa0f3 Add few missed libcalls and correct names for others. 
llvm-svn: 99656
 2010-03-26 21:32:14 +00:00
Johnny Chen
4a97a176e7 Add N3RegVShFrm to represent 3-Register Vector Shift Instructions, which do not 
follow the N3RegFrm's operand order of D:Vd N:Vn M:Vm.  The operand order of
N3RegVShFrm is D:Vd M:Vm N:Vn (notice that M:Vm is the first src operand).

Add a parent class N3Vf which requires passing a Format argument and which the
N3V class is modified to inherit from.  N3V class represents the "normal"
3-Register NEON Instructions with N3RegFrm.

Also add a multiclass N3VSh_QHSD to represent clusters of NEON 3-Register Shift
Instructions and replace 8 invocations with it.

llvm-svn: 99655
 2010-03-26 21:26:28 +00:00
Dale Johannesen
5c20ece13a Debug info shouldn't affect kills. 
llvm-svn: 99637
 2010-03-26 19:21:26 +00:00
Jim Grosbach
97d626c850 vldm/vstm can only do up to 16 double-word registers at a time. 
Radar 7797856

llvm-svn: 99630
 2010-03-26 18:41:09 +00:00
Johnny Chen
c986f10733 Add N3RegFrm to represent "NEON 3 vector register format" instructions. 
Examples are VABA (Vector Absolute Difference and Accumulate), VABAL (Vector
Absolute Difference and Accumulate Long), and VABD (Vector Absolute Difference).

llvm-svn: 99628
 2010-03-26 18:32:20 +00:00
Evan Cheng
d1ee7e0ba3 Do not sibcall if stack needs to be dynamically aligned. 
llvm-svn: 99620
 2010-03-26 16:26:03 +00:00
Evan Cheng
377bb993d8 Allow trivial sibcall of vararg callee when no arguments are being passed. 
llvm-svn: 99598
 2010-03-26 02:13:13 +00:00
Evan Cheng
1f419ac4da LiveVariables should clear kill / dead markers first. This allows us to remove a hack in the scheduler. 
llvm-svn: 99597
 2010-03-26 02:12:24 +00:00
Johnny Chen
a8b02d6451 Add N2RegVShLFrm and N2RegVShRFrm formats so that the disassembler can easily 
dispatch to the appropriate routines to handle the different interpretations of
the shift amount encoded in the imm6 field.  The Vd, Vm fields are interpreted
the same between the two, though.

See, for example, A8.6.367 VQSHL, VQSHLU (immediate) for N2RegVShLFrm format and
A8.6.368 VQSHRN, VQSHRUN for N2RegVShRFrm format.

llvm-svn: 99590
 2010-03-26 01:07:59 +00:00
Jeffrey Yasskin
289846d250 Avoid leaking argv and env arrays from lli. 
llvm-svn: 99589
 2010-03-26 00:59:12 +00:00
Dan Gohman
57c5e51901 Ignore debug intrinsics in yet more places. 
llvm-svn: 99580
 2010-03-26 00:33:27 +00:00
Evan Cheng
0b7dd682dd Try trivial remat before the coalescer gives up on a vr / physreg coalescing for fear of tying up a physical register. 
llvm-svn: 99575
 2010-03-26 00:07:25 +00:00
Dale Johannesen
f5c1282ba6 Handle DEBUG_VALUE in this pass. 
llvm-svn: 99573
 2010-03-26 00:02:44 +00:00
Jim Grosbach
2a0b14a387 switch the flag for using NEON for SP floating point to a subtarget 'feature'. 
Re-commit. This time complete with testsuite updates.

llvm-svn: 99570
 2010-03-25 23:47:34 +00:00
Jim Grosbach
97d5bc2b86 need to fix 'make check' tests first. revert for a moment. 
llvm-svn: 99569
 2010-03-25 23:34:05 +00:00
Jim Grosbach
7e87ba79e6 switch the flag for using NEON for SP floating point to a subtarget 'feature' 
llvm-svn: 99568
 2010-03-25 23:32:19 +00:00
Gabor Greif
c637593cda rename pred_const_iterator to const_pred_iterator for consistency's sake 
llvm-svn: 99567
 2010-03-25 23:25:28 +00:00
Johnny Chen
d56897bddc Removed instruction class NI from ARMInstrFormats.td. 
It doesn't seem to be used anywhere.

llvm-svn: 99566
 2010-03-25 23:11:56 +00:00
Jim Grosbach
b97ff2a4c1 switch the use-vml[as] instructions flag to a subtarget 'feature' 
llvm-svn: 99565
 2010-03-25 23:11:16 +00:00
Gabor Greif
df5013e4d8 rename use_const_iterator to const_use_iterator for consistency's sake 
llvm-svn: 99564
 2010-03-25 23:06:16 +00:00
Daniel Dunbar
d04906b49e llvm-mc: Add a -mc-relax-all option, which relaxes every fixup. We always need 
exactly two passes in that case, and don't ever need to recompute any layout,
so this is a nice baseline for relaxation performance.

llvm-svn: 99563
 2010-03-25 22:49:09 +00:00
Johnny Chen
38c9f64289 Add NVDupLnFrm and change NVDupLane class to use that format. 
llvm-svn: 99557
 2010-03-25 21:49:12 +00:00
Jim Grosbach
0975d55c8e ARM cortex-a8 doesn't do vmla/vmls well. disable them by default for that cpu 
llvm-svn: 99549
 2010-03-25 20:48:50 +00:00