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Author SHA1 Message Date
Mikhail Glushenkov
4077e2da6f FindExecutable: remove the executability check. 
This makes the behaviour of FindExecutable more consistent across platforms, but
I'm not very happy with the name...

llvm-svn: 118049
 2010-11-02 20:32:46 +00:00
Mikhail Glushenkov
b1d2a5ac52 Make FindProgramByName return paths with slashes unmodified on Windows. 
This makes its behaviour more consistent across platforms.

llvm-svn: 118048
 2010-11-02 20:32:39 +00:00
Mikhail Glushenkov
efb9f9754d 80-col violations. 
llvm-svn: 118045
 2010-11-02 20:32:31 +00:00
Mikhail Glushenkov
c86f1d26e9 Path: Add GetEXESuffix() to complement GetDLLSuffix(). 
llvm-svn: 118042
 2010-11-02 20:32:26 +00:00
Andrew Trick
f861447393 Fixes <rdar://problem/8612856>: During postRAsched, the antidependence 
breaker needs to check all definitions of the antidepenent register to
avoid multiple defs of the same new register.

llvm-svn: 118032
 2010-11-02 18:16:45 +00:00
Chris Lattner
8759d96b7a a bunch of random cleanup, move a helper to CGT where it belongs. 
llvm-svn: 118031
 2010-11-02 18:10:06 +00:00
Dale Johannesen
b758b5a1a3 Apply patch for use-after-free in InlineAsm constant handling, 
PR 8522 / 8616046.  Test reduction, analysis and patch by Tim Deegan!
(However, review by someone who understands the classes here better
is welcome.  John Krum will return!)

llvm-svn: 118030
 2010-11-02 17:59:27 +00:00
Jim Grosbach
5fe61a5f86 Sort bit assignments. Cosmetic change only. 
llvm-svn: 118029
 2010-11-02 17:59:04 +00:00
Devang Patel
37fa9bb66a Simplify. 
llvm-svn: 118027
 2010-11-02 17:37:00 +00:00
Jim Grosbach
d6df785c6d Revert r114340 (improvements in Darwin function prologue/epilogue), as it broke 
assumptions about stack layout. Specifically, LR must be saved next to FP.

llvm-svn: 118026
 2010-11-02 17:35:25 +00:00
Chris Lattner
0ee95ca723 add and update comments. 
llvm-svn: 118025
 2010-11-02 17:34:28 +00:00
Chris Lattner
6f1fec971e refactor/cleanup MatchableInfo by eliminating the Tokens array, 
merging it into a Token field in Operand, and moving the first
token to an explicit mnemonic field.  These were parallel
arrays before (except for the mnemonic) which kept confusing me.

llvm-svn: 118024
 2010-11-02 17:30:52 +00:00
Rafael Espindola
1db6a21aff Add support for expressions in .sleb/.uleb directives. 
llvm-svn: 118023
 2010-11-02 17:22:24 +00:00
Devang Patel
e3575ef54f If value map does not have register for an argument then try to find frame index before giving up. 
llvm-svn: 118022
 2010-11-02 17:19:03 +00:00
Devang Patel
efd9ac540a Use frameindex, if available, as a last resort to emit debug info for a parameter. 
llvm-svn: 118020
 2010-11-02 17:01:30 +00:00
Duncan Sands
47a8976f28 Fix comment typo. 
llvm-svn: 118016
 2010-11-02 15:12:48 +00:00
Duncan Sands
1651d8cdb3 Add some comments explaining what MVT and EVT are, and how they differ. 
llvm-svn: 118014
 2010-11-02 13:57:09 +00:00
Duncan Sands
c56946f7c5 Remove trailing whitespace. 
llvm-svn: 118013
 2010-11-02 13:43:07 +00:00
Owen Anderson
9d85c89ade Add correct NEON encodings for vld2, vld3, and vld4 basic variants. 
llvm-svn: 117997
 2010-11-02 01:24:55 +00:00
Eric Christopher
a376fe69a1 Remove an assert - it's possible to be hit, and we just want to avoid 
handling those cases for now.

llvm-svn: 117996
 2010-11-02 01:24:49 +00:00
Eric Christopher
a033f49ed1 Whitespeace 
llvm-svn: 117995
 2010-11-02 01:22:45 +00:00
Eric Christopher
26ddb729bd No really, no thumb1 for arm fast isel. Also add an informative comment as 
to what someone would need to do to support thumb1.

llvm-svn: 117994
 2010-11-02 01:21:28 +00:00
Chris Lattner
13ad624c70 rename operands -> asmoperands to be more descriptive. 
llvm-svn: 117993
 2010-11-02 01:03:43 +00:00
Jakob Stoklund Olesen
840357ca6a Don't try to split weird critical edges that really aren't: 
BB#1: derived from LLVM BB %bb.nph28
    Live Ins: %AL
    Predecessors according to CFG: BB#0
	TEST8rr %reg16384<kill>, %reg16384, %EFLAGS<imp-def>; GR8:%reg16384
	JNE_4 <BB#2>, %EFLAGS<imp-use,kill>
	JMP_4 <BB#2>
    Successors according to CFG: BB#2 BB#2

These double CFG edges only ever occur in bugpoint-generated code, so there is
no need to attempt something clever.

llvm-svn: 117992
 2010-11-02 00:58:37 +00:00
Owen Anderson
f4ab06d0b6 Attempt to provide correct encodings for a number of other vld1 variants, which we can't test 
since we can neither generate nor parse them at the moment.

llvm-svn: 117988
 2010-11-02 00:24:52 +00:00
Jim Grosbach
0b563b9b72 Tidy up. 
llvm-svn: 117987
 2010-11-02 00:16:39 +00:00
Owen Anderson
bdb861b46f Add aesthetic break. 
llvm-svn: 117986
 2010-11-02 00:14:00 +00:00
Jim Grosbach
8b64800473 Tweak to fix spelling and grammar in comment. 
llvm-svn: 117985
 2010-11-02 00:13:15 +00:00
Owen Anderson
6647eb222b Add correct NEON encodings for the "multiple single elements" form of vld. 
llvm-svn: 117984
 2010-11-02 00:05:05 +00:00
Jakob Stoklund Olesen
56f67c7d02 MachineLICM should not claim to be preserving the CFG when it can split critical 
edges on demand.

llvm-svn: 117982
 2010-11-01 23:59:55 +00:00
Jakob Stoklund Olesen
b0f64b3d2b Be more precise about verifying missing kill flags. 
It is legal for an instruction to have two operands using the same register,
only one a kill. This is interpreted as a kill.

llvm-svn: 117981
 2010-11-01 23:59:53 +00:00
Jakob Stoklund Olesen
a052004a89 When inserting copies during splitting, always use the parent register as the 
source, and let rewrite() clean it up.

This way, kill flags on the inserted copies are fixed as well during rewrite().

We can't just assume that all the copies we insert are going to be kills since
critical edges into loop headers sometimes require both source and dest to be
live out of a block.

llvm-svn: 117980
 2010-11-01 23:59:48 +00:00
Chris Lattner
032b91c666 fix computation of ambiguous instructions to not ignore the mnemonic. 
FWIW, X86 has 254 ambiguous instructions.

llvm-svn: 117979
 2010-11-01 23:57:23 +00:00
Jim Grosbach
e5a253a203 Explicitly check for non-consant reference in an LDRi12 instruction. Add FIXME 
for handling the fixup necessary.

llvm-svn: 117978
 2010-11-01 23:45:50 +00:00
Jim Grosbach
d50562f0ea Remove unused function. 
llvm-svn: 117977
 2010-11-01 23:40:56 +00:00
Bob Wilson
411b511ac0 Add support for alignment operands on VLD1-lane instructions. 
This is another part of the fix for Radar 8599955.

llvm-svn: 117976
 2010-11-01 23:40:51 +00:00
Bob Wilson
8f0cf81f09 Add VLD1-lane testcases for quad-register types. 
llvm-svn: 117975
 2010-11-01 23:40:46 +00:00
Bill Wendling
dd4216420a Missed reverting this bit. 
llvm-svn: 117971
 2010-11-01 23:17:54 +00:00
Bill Wendling
37c9af176d Minor cleanup. 
llvm-svn: 117969
 2010-11-01 23:11:22 +00:00
Chris Lattner
1bdba218ef give MatchableInfo::Operand a constructor 
llvm-svn: 117968
 2010-11-01 23:08:02 +00:00
Chris Lattner
f94c2b782a rearrange a bit. 
llvm-svn: 117967
 2010-11-01 23:07:52 +00:00
Bob Wilson
b6bc135df8 Add NEON VLD1-lane instructions. Partial fix for Radar 8599955. 
llvm-svn: 117964
 2010-11-01 22:04:05 +00:00
Jakob Stoklund Olesen
0ed56c87e4 Add kill flag verification. 
At least X86FloatingPoint requires correct kill flags after register allocation,
and targets using register scavenging benefit. Conservative kill flags are not
enough.

llvm-svn: 117960
 2010-11-01 21:51:31 +00:00
Jakob Stoklund Olesen
78ba455b51 Update kill flags while rewriting instructions after splitting. 
llvm-svn: 117959
 2010-11-01 21:51:29 +00:00
Bill Wendling
69e7c09c32 Move the machine operand MC encoding patterns to the parent classes. 
llvm-svn: 117956
 2010-11-01 21:17:06 +00:00
Bill Wendling
af717e3c58 Use ARM-style comments. 
llvm-svn: 117955
 2010-11-01 21:16:39 +00:00
Owen Anderson
47f0efad86 When folding away a (shl (shr)) pair, we need to check that the bits that will BECOME the low 
bits are zero, not that the current low bits are zero.  Fixes <rdar://problem/8606771>.

llvm-svn: 117953
 2010-11-01 21:08:20 +00:00
Chris Lattner
b0ac93cf15 use our fancy new MnemonicAlias mechanism to remove a bunch of hacks 
from X86AsmParser.cpp

llvm-svn: 117952
 2010-11-01 21:06:34 +00:00
Bill Wendling
4340c9449a When we look at instructions to convert to setting the 's' flag, we need to look 
at more than those which define CPSR. You can have this situation:

(1)  subs  ...
(2)  sub   r6, r5, r4
(3)  movge ...
(4)  cmp   r6, 0
(5)  movge ...

We cannot convert (2) to "subs" because (3) is using the CPSR set by
(1). There's an analogous situation here:

(1)  sub   r1, r2, r3
(2)  sub   r4, r5, r6
(3)  cmp   r4, ...
(5)  movge ...
(6)  cmp   r1, ...
(7)  movge ...

We cannot convert (1) to "subs" because of the intervening use of CPSR.

llvm-svn: 117950
 2010-11-01 20:41:43 +00:00
Jakob Stoklund Olesen
66012df062 Don't assign new registers created during a split to the same stack slot, but 
give them individual stack slots once the are actually spilled.

llvm-svn: 117945
 2010-11-01 19:49:57 +00:00