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Commit Graph

213184 Commits

Author SHA1 Message Date
Nick Lewycky
40cba34858 Verify that MDNodes belong to the same context as the Module.
Differential Revision: https://reviews.llvm.org/D99289
2021-03-24 12:38:05 -07:00
Florian Hahn
57cc229fd7 [LV] Factor out phi type access to variable (NFC).
A slight simplification of the code to reduce future diffs.
2021-03-24 19:25:22 +00:00
Florian Hahn
4f9389f9a9 [LV] Remove redundant access to Legal::getReductionVars() (NFC).
The reduction descriptor is retrieved earlier and stored in a variable
RdxDesc already.
2021-03-24 19:15:14 +00:00
LLVM GN Syncbot
d5a36090d1 [gn build] Port 5fbe1fdf1702 2021-03-24 19:01:21 +00:00
Gulfem Savrun Yeniceri
54e2d4cdab Revert "[Passes] Add relative lookup table converter pass"
This reverts commit 5fd001a5ffbad403053c4a06bf4b2b76dc52bba8
because it broke clang-with-thin-lto-ubuntu bot.
2021-03-24 18:59:33 +00:00
Thomas Preud'homme
28db0415f3 [FileCheck] Fix PR49531: invalid use of string var
FileCheck string substitution block parsing code only report an invalid
variable name in a string variable use if it starts with a forbidden
character. It does not report anything if there are unparsed characters
after the variable name, i.e. [[X-Y]] is parsed as [[X]] and no error is
returned. This commit fixes that.

Reviewed By: jdenny, jhenderson

Differential Revision: https://reviews.llvm.org/D98691
2021-03-24 18:49:58 +00:00
Matt Morehouse
4005ceb216 [HWASan] Use page aliasing on x86_64.
Userspace page aliasing allows us to use middle pointer bits for tags
without untagging them before syscalls or accesses.  This should enable
easier experimentation with HWASan on x86_64 platforms.

Currently stack, global, and secondary heap tagging are unsupported.
Only primary heap allocations get tagged.

Note that aliasing mode will not work properly in the presence of
fork(), since heap memory will be shared between the parent and child
processes.  This mode is non-ideal; we expect Intel LAM to enable full
HWASan support on x86_64 in the future.

Reviewed By: vitalybuka, eugenis

Differential Revision: https://reviews.llvm.org/D98875
2021-03-24 11:43:41 -07:00
Roland McGrath
95053232a7 [AArch64] Support .arch_extension pan
This makes the behavior consistent with the GNU assembler.

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D99209
2021-03-24 11:29:22 -07:00
Jessica Paquette
e1c3b00d6a Add missing -march to runline in llvm/test/MachineVerifier/test_g_ubfx_sbfx.mir
This can cause failures if built without a default target triple.
2021-03-24 11:23:08 -07:00
Jessica Paquette
860e72b632 [AArch64][GlobalISel] Select G_SBFX and G_UBFX
Add selection support for G_SBFX and G_UBFX and add a test.

These must always have a constant LSB and width.

Differential Revision: https://reviews.llvm.org/D99224
2021-03-24 11:15:57 -07:00
Craig Topper
dbf0fc3a04 [RISCV] Add basic cost modelling for fixed vector gather/scatter.
Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D99142
2021-03-24 11:14:14 -07:00
Jessica Paquette
a4c990fa53 [AArch64][GlobalISel] Mark G_SBFX/G_UBFX as legal for s32 and s64
This isn't perfect, since we should also verify that these only use constants.

Differential Revision: https://reviews.llvm.org/D99219
2021-03-24 11:08:41 -07:00
Craig Topper
67da6fb063 [RISCV] Add TTI support for cpop with Zbb
This will tell loop idiom recognize that it can make popcount loops countable
using the ctpop intrinsic. I didn't bother checking for illegal types.
Type legalization knows how to split a ctpop into multiple ctops added together.
Assuming we only receive reasonable integer bit widths, a few cpop instructions
added together is probably better than the loop.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D99203
2021-03-24 10:58:42 -07:00
Thomas Preud'homme
4da52c9968 [test] Fix mix of variable use/def and regex match
LLVM test Transforms/GlobalSplit/basic.ll mixes variable definition and
variable use with regex matching of end of line. Mixing end of line
matching with variable definition will work but not record the end of
line in the string variable. Mixing end of line with variable use will
ignore end of line and cause an error once D98691 is landed.

This commit moves the end of line matching out of the string subtitution
blocks.

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D98854
2021-03-24 17:58:16 +00:00
LLVM GN Syncbot
2c0eeaf48e [gn build] Port 5fd001a5ffba 2021-03-24 17:33:50 +00:00
Gulfem Savrun Yeniceri
93b265f8c0 [Passes] Add relative lookup table converter pass
Lookup tables generate non PIC-friendly code, which requires dynamic relocation as described in:
https://bugs.llvm.org/show_bug.cgi?id=45244

This patch adds a new pass that converts lookup tables to relative lookup tables to make them PIC-friendly.

Differential Revision: https://reviews.llvm.org/D94355
2021-03-24 17:31:18 +00:00
Martin Storsjö
a60ff1f5b7 [lit] Fix check-lit hanging on Windows due to a division by zero exception 2021-03-24 19:28:33 +02:00
Nikita Popov
f388312120 [LICM] Fix NumSunk statistic (NFC)
LICM can sink instructions that have uses inside the loop, as
long as these uses are considered "free". However, if there were
only free uses inside the loop, and no uses outside the loop at
all, the instruction would still count towards the NumSunk
statistic. This resulted in a wild inflation of the NumSunk metric.
After this patch it drops down from 1141787 to 5852 on test-suite O3.
2021-03-24 18:28:19 +01:00
Thomas Preud'homme
365b05fe29 Make FindAvailableLoadedValue TBAA aware
FindAvailableLoadedValue() relies on FindAvailablePtrLoadStore() to run
the alias analysis when searching for an equivalent value. However,
FindAvailablePtrLoadStore() calls the alias analysis framework with a
memory location for the load constructed from an address and a size,
which thus lacks TBAA metadata info. This commit modifies
FindAvailablePtrLoadStore() to accept an optional memory location as
parameter to allow FindAvailableLoadedValue() to create it based on the
load instruction, which would then have TBAA metadata info attached.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D99206
2021-03-24 17:20:26 +00:00
Thomas Preud'homme
3e846dadf3 [NFC][Loads] Add a testcase for TBAA aware FindAvailableLoadedValue
(D99206)
2021-03-24 17:03:19 +00:00
Alexandre Ganea
cab08adb50 [Support] Fix 'keeping' temporary files on Windows 7
As reported here: https://bugs.llvm.org/show_bug.cgi?id=48378#c0
and here: https://github.com/rust-lang/rust/issues/81051
since 79657e2339b58bc01fe1b85a448bb073d57d90bb, some programs such as llvm-ar
don't work properly on Windows 7.

The issue is shown in the snippet by Oleksandr Prodan:
https://pastebin.com/v51m3uBU

In essence, once the 'DeleteFile' flag has been set on FILE_DISPOSITION_INFO,
the file path can't be queried anymore with GetFinalPathNameByHandleW. This
however works on Windows 10, GetFinalPathNameByHandleW would return sucessfully.

To workaround the issue, we simply reset the 'DeleteFile' flag before even
checking if we're dealing with a network file.

Tested with `llvm-ar r empty.a a.obj` ran on a network mount. At the moment, we
cannot specifically add a test coverage for this, since it requres mounting a
network drive.
2021-03-24 12:47:08 -04:00
David Green
b7aea64f48 [ARM] Enable UpperBound unrolling for all loops
This UpperBound unrolling was already enabled so long as a series of
conditions in ARMTTIImpl::getUnrollingPreferences pass. This just always
enables it as it can help fully unroll loops that would not otherwise
pass those tests.

Differential Revision: https://reviews.llvm.org/D99174
2021-03-24 16:39:21 +00:00
Sanjay Patel
894e412910 [InstSimplify] add tests for min/max intrinsic analysis; NFC 2021-03-24 12:21:59 -04:00
Thomas Preud'homme
13d71df2c0 [UpdateTestChecks] Fix typo & copy/paste in comments 2021-03-24 16:11:36 +00:00
Roman Lebedev
fe04a952c5 [NFCI][SimplifyCFG] Fold branch to common dest: don't check cost if no qualified preds 2021-03-24 19:01:47 +03:00
Konstantin Zhuravlyov
a76ecb87cf AMDGPU: Add target id and code object v4 support
- Add target id support (https://clang.llvm.org/docs/ClangOffloadBundler.html#target-id)
  - Add code object v4 support (https://llvm.org/docs/AMDGPUUsage.html#elf-code-object)
    - Add kernarg_size to kernel descriptor
    - Change trap handler ABI to no longer move queue pointer into s[0:1]
  - Cleanup ELF definitions
    - Add V2, V3, V4 suffixes to make a clear distinction for code object version
    - Consolidate note names

Differential Revision: https://reviews.llvm.org/D95638
2021-03-24 11:54:05 -04:00
David Green
7a8a7cbb9c [ARM] Regenerate some test checks. NFC 2021-03-24 15:34:34 +00:00
Sanjay Patel
e5bb25b025 [InstCombine] add tests for sub of umin; NFC
Potential missing fold noted in D98152
2021-03-24 10:54:03 -04:00
Sander de Smalen
1c27e91e31 [TTI] Return a TypeSize from getRegisterBitWidth.
This patch changes the interface to take a RegisterKind, to indicate
whether the register bitwidth of a scalar register, fixed-width vector
register, or scalable vector register must be returned.

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D98874
2021-03-24 14:45:13 +00:00
Nico Weber
874bd981f1 [gn build] (manually) port 301d9261b787
This reverts commit 50fd426fd845eefe916bbeef80b509de9bdea338
and tweaks things for the reland: SystemZAsmLexer is now
SystemZAsmLexerTests.
2021-03-24 10:44:00 -04:00
Nashe Mncube
e552f1003f [SVE] Suppress vselect warning from incorrect interface call
The VSelectCombine handler within AArch64ISelLowering,
uses an interface call which only expects fixed vectors.
This generates a warning when the call is made on a
scalable vector. This warning has been suppressed with this change,
by using the ElementCount interface, which supports both fixed and scalable vectors.
I have also added a regression test which recreates the warning.

Differential Revision: https://reviews.llvm.org/D98249
2021-03-24 14:34:34 +00:00
Anirudh Prasad
9c4ae70c21 [AsmParser][SystemZ][z/OS] Re-introduce HLASM comment syntax
- https://reviews.llvm.org/rGb605cfb336989705f391d255b7628062d3dfe9c3 was reverted due to sanitizer bugs in the introduced unit-test (specifically in the Address sanitizer https://lab.llvm.org/buildbot/#/builders/5/builds/5697)
- This patch attempts to rectify that, as well as re-factor parts of the test
- The issue was previously, within the `setupCallToAsmParser` function in the unit-test, `SrcMgr` was declared as a local variable. `SrcMgr` owns a unique pointer. Since the variable goes out of scope at the end of the function, the unique pointer is released.
- This patch, moves the declaration of the `SrcMgr` variable to a class field, since the scope will remain until the class's destructor is invoked (which in this case is at the end of the unit test)
- Furthermore, this patch also moves the `MCContext Ctx` declaration from a local variable instance inside a function, to a unique pointer class field. This ensures the instantiation of the MCContext remains until the tear down of the test.

Reviewed By: abhina.sreeskantharajan

Differential Revision: https://reviews.llvm.org/D99004
2021-03-24 10:17:00 -04:00
Simon Pilgrim
628ab5868b [X86][AVX] combineBitcastvxi1 - improve handling of vectors truncated to vXi1
If we're truncating to vXi1 from a wider type, then prefer the original wider vector as is simplifies folding the separate truncations + extensions.

AVX1 this is only worth it for v8i1 cases, not v4i1 where we're always better off truncating down to v4i32 for movmsk.

Helps with some regressions encountered in D96609
2021-03-24 14:05:59 +00:00
Stefan Pintilie
34252802f4 [PowerPC] Add mprivileged option
Add an option to tell the compiler that it can use privileged instructions.

This patch only adds the option. Backend implementation will be added in a
future patch.

Reviewed By: lei, amyk

Differential Revision: https://reviews.llvm.org/D99193
2021-03-24 08:33:22 -05:00
Vinicius Tinti
046d087d1d [llvm-objdump] Implement --prefix-strip option
The option `--prefix-strip` is only used when `--prefix` is not empty.
It removes N initial directories from absolute paths before adding the
prefix.

This matches GNU's objdump behavior.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D96679
2021-03-24 13:22:35 +00:00
Joseph Huber
ccdd23f91f [OpenMP] Change OMPIRBuilder to append function attributes
Summary:
Currently the OMPIRBuilder overwrites the function's existing attributes
when it assigns the ones defined in OMPKinds.def. This changes the
behaviour to append the current function's attributes with them instead.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D98740
2021-03-24 09:08:29 -04:00
Alexey Bataev
1b88ea3100 [LoopAnalysis][NFC]Remove redundant code.
Removed redundant code for IsConsecutive variable.
2021-03-24 05:37:19 -07:00
Nico Weber
687ca89b8f [gn build] port 1d8fc086ae26 2021-03-24 08:29:34 -04:00
Simon Pilgrim
add3426cc4 [X86][AVX] lowerShuffleAsBroadcast - MOVDDUP(SCALAR_TO_VECTOR(X)) -> BROADCAST(X)
Prefer broadcast from scalar on AVX targets as this makes it easier for later folds to strip away bitcasts etc.

This helps a lot with the AVX1 poor codegen from PR49658.

There's a trivial regression in bitcast-int-to-vector-bool-*ext.ll tests due to SimplifyDemandedBits not being able to see a multi-use case, but there's bigger existing codegen issues to be addressed first in those tests (unnecessary NOTs).
2021-03-24 11:31:56 +00:00
Andrea Di Biagio
2d533d6c56 [MCA] Fix for uninitialised member in constructor. NFC 2021-03-24 11:21:59 +00:00
Simon Pilgrim
8136e5e7e1 [X86] Remove unused 'OneUse' option from IsNOT helper. NFCI. 2021-03-24 11:14:38 +00:00
Simon Pilgrim
12a8acb5a9 [X86][AVX] Cleanup gather_v8i32_v8i32 special test case
Cleanup the gather_v8i32_v8i32 IR to more closely match how the middle-end will optimise the vector geps (exposing more splats).

This helps the gather scalarization case a lot, but shows a missed opportunity for AVX512 gathers to recognise uniform-constant indices.

And none of the cases realise that some of the gathers are really blended broadcasts....
2021-03-24 11:14:38 +00:00
alex-t
24e5eb0aab [AMDGPU] SIOptimizeExecMaskingPreRA should check constant bus constraint when folds EXEC copy
Folding EXEC copy into it's single use may lead to constant bus constraint violation as it adds one more SGPR operand.
         This change makes it validate the user instruction with the new SGPR operand and only fold it if it is legal.

Reviewed By: rampitec, arsenm

Differential Revision: https://reviews.llvm.org/D98888
2021-03-24 14:14:13 +03:00
Florian Hahn
d57a381a65 [LV] Move exact FP math check out of Requirements.
We know if the loop contains FP instructions preventing vectorization
after we are done with legality checks. This patch updates the code the
check for un-vectorizable FP operations earlier, to avoid unnecessarily
running the cost model and picking a vectorization factor. It also makes
the code more direct and moves the check to a position where similar
checks are done.

I might be missing something, but I don't see any reason to handle this
check differently to other, similar checks.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D98633
2021-03-24 11:01:44 +00:00
Andrew Savonichev
182b0cd903 [MCA] Disable RCU for InOrderIssueStage
This is a follow-up for:
D98604 [MCA] Ensure that writes occur in-order

When instructions are aligned by the order of writes, they retire
in-order naturally. There is no need for an RCU, so it is disabled.

Differential Revision: https://reviews.llvm.org/D98628
2021-03-24 13:54:04 +03:00
Stefan Pintilie
4e38761daa [PowerPC] Change option to mrop-protect
In order to have the same option on power PC LLVM and power PC gcc
the option will be changed from -mrop-protection to -mrop-protect.

The feature will be off by default and turned on when the option is used.

Reviewed By: lei, amyk

Differential Revision: https://reviews.llvm.org/D99185
2021-03-24 05:51:35 -05:00
Roman Lebedev
e78f99f1c4 [NFC][PhaseOrdering] Add a testcase for additional LICM before LoopRotate (D99249/D99204) 2021-03-24 13:24:09 +03:00
Ta-Wei Tu
86a2dac39f [NFC] Improve debug message and test description in 4c1f74a 2021-03-24 18:21:13 +08:00
Ta-Wei Tu
ccd74e3fe8 [LoopFlatten] Fix invalid assertion (PR49571)
The `InductionPHI` is not necessarily the increment instruction, as
demonstrated in pr49571.ll.
This patch removes the assertion and instead bails out from the
`LoopFlatten` pass if that happens.

This fixes https://bugs.llvm.org/show_bug.cgi?id=49571

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D99252
2021-03-24 18:08:27 +08:00
Ta-Wei Tu
ed6e3dd8c5 [NFC] Remove redundant struct prefix
Reviewed By: SjoerdMeijer, fhahn

Differential Revision: https://reviews.llvm.org/D99251
2021-03-24 17:58:33 +08:00