Chris Lattner
4121b502d3
improved support for branch folding, still not enabled.
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llvm-svn: 26289
2006-02-18 07:57:38 +00:00
Evan Cheng
063df91002
If SSE3 is available, promote FP_TO_UINT i32 to FP_TO_SINT i64 to take
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advantage of fisttpll.
llvm-svn: 26288
2006-02-18 07:26:17 +00:00
Jeff Cohen
6e4fbcce8f
Fix bugs identified by VC++.
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llvm-svn: 26287
2006-02-18 03:20:33 +00:00
Nate Begeman
d89b8719f3
Add a fold for add that exchanges it with a constant shift if possible, so
...
that the shift may be more easily folded into other operations.
llvm-svn: 26286
2006-02-18 02:43:25 +00:00
Chris Lattner
71d62c944d
Implement deletion of dead blocks, currently disabled.
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llvm-svn: 26285
2006-02-18 02:42:34 +00:00
Nate Begeman
bbcae2bf3d
Add checks to make sure we don't create bogus extend nodes, and fix a bug
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where we were doing exactly that which was causing failures on x86 and
alpha.
llvm-svn: 26284
2006-02-18 02:40:58 +00:00
Evan Cheng
b3d9ee74ad
Added fisttp for fp to int conversion.
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llvm-svn: 26283
2006-02-18 02:36:28 +00:00
Evan Cheng
d2ad380df9
Disable PIC for JIT.
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llvm-svn: 26281
2006-02-18 01:49:25 +00:00
Chris Lattner
5f12d7c418
a previous patch completely disabled trivial unswitching, this fixees it.
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Thanks to nate for pointing this out :)
llvm-svn: 26280
2006-02-18 01:32:04 +00:00
Chris Lattner
359476b89f
initial trivial support for folding branches that have now-constant destinations.
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llvm-svn: 26279
2006-02-18 01:27:45 +00:00
Evan Cheng
09bd678546
Jit does not support PIC yet.
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llvm-svn: 26278
2006-02-18 00:57:10 +00:00
Chris Lattner
39356756ac
When unswitching a loop, make sure to update loop info with exit blocks in
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the right loop.
llvm-svn: 26277
2006-02-18 00:55:32 +00:00
Chris Lattner
d9b0de3240
Fix Transforms/SimplifyCFG/2006-02-17-InfiniteUnroll.ll
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llvm-svn: 26275
2006-02-18 00:33:17 +00:00
Evan Cheng
bf3558a375
x86 / Darwin PIC support.
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llvm-svn: 26273
2006-02-18 00:15:05 +00:00
Evan Cheng
c4cda2b89a
Moved PICEnabled to include/llvm/Target/TargetOptions.h
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llvm-svn: 26272
2006-02-18 00:08:58 +00:00
Chris Lattner
bd36f029ef
Fix a tricky issue in the SimplifyDemandedBits code where CombineTo wasn't
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exactly the API we wanted to call into. This fixes the crash on crafty last
night.
llvm-svn: 26269
2006-02-17 21:58:01 +00:00
Nate Begeman
7ebd8fd80d
Clean up DemandedBitsAreZero interface
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Make more use of the new mask helpers in valuetypes.h
Combine (sra (srl x, c1), c1) -> sext_inreg if legal
llvm-svn: 26263
2006-02-17 19:54:08 +00:00
Nate Begeman
a3a0a0340f
Don't expand sdiv by power of two before legalize, since it will likely
...
generate illegal nodes.
llvm-svn: 26261
2006-02-17 07:26:20 +00:00
Chris Lattner
3a899dbbc8
unbreak the build
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llvm-svn: 26260
2006-02-17 07:09:27 +00:00
Evan Cheng
330fd348ff
Unbreak x86 be
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llvm-svn: 26259
2006-02-17 07:01:52 +00:00
Chris Lattner
d5a4da466a
Fix loops where the header has an exit, fixing a loop-unswitch crash on crafty
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llvm-svn: 26258
2006-02-17 06:39:56 +00:00
Nate Begeman
9c0ab71f4a
kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC
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and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.
llvm-svn: 26255
2006-02-17 05:43:56 +00:00
Chris Lattner
6632b8ab04
Fix another miscompilation exposed by lencode, where we lowered i64->f32
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conversions to __floatdidf instead of __floatdisf on targets that support
f32 but not i64 (e.g. sparc).
llvm-svn: 26254
2006-02-17 04:32:33 +00:00
Chris Lattner
13dd179299
add note about div by power of 2
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llvm-svn: 26253
2006-02-17 04:20:13 +00:00
Jeff Cohen
04caf92624
Fix bug noticed by VC++.
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llvm-svn: 26252
2006-02-17 02:12:18 +00:00
Nate Begeman
224405b002
Whoops, didn't mean to check this in yet.
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llvm-svn: 26250
2006-02-17 00:56:19 +00:00
Nate Begeman
7269afbf38
Add a missing and useful pat frag
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llvm-svn: 26249
2006-02-17 00:51:06 +00:00
Chris Lattner
e2286db8d8
start of some new simplification code, not thoroughly tested, use at your own
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risk :)
llvm-svn: 26248
2006-02-17 00:31:07 +00:00
Evan Cheng
c7b32ddecc
Remind ourselves to revisit the "pxor vs. xorps/xorpd to clear XMM registers"
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issue. Need to do more experiments.
llvm-svn: 26247
2006-02-17 00:04:28 +00:00
Nate Begeman
b0ec087c0f
Kill the x86 pattern isel. boom.
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llvm-svn: 26246
2006-02-17 00:03:04 +00:00
Evan Cheng
3d0135afdc
Remove the entry about using movapd for SSE reg-reg moves.
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llvm-svn: 26245
2006-02-17 00:00:58 +00:00
Evan Cheng
9de0ad321a
pxor (for FLD0SS) encoding was missing the OpSize prefix.
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llvm-svn: 26244
2006-02-16 23:59:30 +00:00
Chris Lattner
585198f5a8
Remove the skeleton target, it doesn't produce useful code and there are
...
other small targets that do that can be learned from. They also have
the added advantage of being tested :)
llvm-svn: 26243
2006-02-16 23:14:50 +00:00
Evan Cheng
a2433f32b4
Dumb bug. Code sees a memcpy from X+c so it increments src offset. But it
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turns out not to point to a constant string but it forgot change the offset
back.
llvm-svn: 26242
2006-02-16 23:11:42 +00:00
Evan Cheng
bf4008c701
1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This
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proves to be worth 20% on Ptrdist/ks. Might be related to dependency
breaking support.
2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These
are used for FR32 / FR64 reg-to-reg copies.
3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to
spill / restore FsMOVAPSrr and FsMOVAPDrr.
llvm-svn: 26241
2006-02-16 22:45:17 +00:00
Evan Cheng
447c171afd
Use movaps / movapd to spill / restore V4F4 / V2F8 registers.
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llvm-svn: 26240
2006-02-16 21:20:26 +00:00
Nate Begeman
0bc71999b9
Rework the SelectionDAG-based implementations of SimplifyDemandedBits
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and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.
llvm-svn: 26238
2006-02-16 21:11:51 +00:00
Chris Lattner
847c7ca438
Change SplitBlock to increment a BasicBlock::iterator, not an Instruction*. Apparently they do different things :)
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This fixes a testcase that nate reduced from spass.
Also included are a couple minor code changes that don't affect the generated
code at all.
llvm-svn: 26235
2006-02-16 19:36:22 +00:00
Evan Cheng
af9730a217
MOVAPSrr and MOVAPDrr instruction format should be MRMSrcReg.
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llvm-svn: 26234
2006-02-16 19:34:41 +00:00
Duraid Madina
3fcb00a53f
distinguish between objects and register names, now we can have stuff
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with names like "f84", "in6" etc etc.
this should fix one or two tests
llvm-svn: 26232
2006-02-16 13:12:57 +00:00
Evan Cheng
131901cbb8
If the false case is the current basic block, then this is a self loop.
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We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop. Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.
Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.
llvm-svn: 26231
2006-02-16 08:27:56 +00:00
Chris Lattner
6f407a54c1
Lowering of sdiv X, pow2 was broken, this fixes it. This patch is written
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by Nate, I'm just committing it for him.
llvm-svn: 26230
2006-02-16 08:02:36 +00:00
Jeff Cohen
381e19a745
Fix VC++ warning.
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llvm-svn: 26228
2006-02-16 04:07:37 +00:00
Evan Cheng
74228303ad
Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to reg
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transfer.
According to the Intel P4 Optimization Manual:
Moves that write a portion of a register can introduce unwanted
dependences. The movsd reg, reg instruction writes only the bottom
64 bits of a register, not to all 128 bits. This introduces a dependence on
the preceding instruction that produces the upper 64 bits (even if those
bits are not longer wanted). The dependence inhibits register renaming,
and thereby reduces parallelism.
Not to mention movaps is shorter than movss.
llvm-svn: 26226
2006-02-16 01:50:02 +00:00
Chris Lattner
57142c7e12
fix a bug where we unswitched the wrong way
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llvm-svn: 26225
2006-02-16 01:24:41 +00:00
Evan Cheng
2f3056286a
A bit more memset / memcpy optimization.
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Turns them into calls to memset / memcpy if 1) buffer(s) are not DWORD aligned,
2) size is not known to be greater or equal to some minimum value (currently 128).
llvm-svn: 26224
2006-02-16 00:21:07 +00:00
Chris Lattner
0a6283e1c2
Implement trivial unswitching for switch stmts. This allows us to trivial
...
unswitch this loop on 2 before sweating to unswitch on 1/3.
void test4(int N, int i, int C, int*P, int*Q) {
int j;
for (j = 0; j < N; ++j) {
switch (C) { // general unswitching.
default: P[i+j] = 0; break;
case 1: Q[i+j] = 0; break;
case 3: P[i+j] = Q[i+j]; break;
case 2: break; // TRIVIAL UNSWITCH on C==2
}
}
}
llvm-svn: 26223
2006-02-15 22:52:05 +00:00
Evan Cheng
93b4f4fa67
Remove an entry.
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llvm-svn: 26222
2006-02-15 22:14:34 +00:00
Evan Cheng
07063456aa
Remove an unused function parameter.
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llvm-svn: 26221
2006-02-15 22:12:35 +00:00
Chris Lattner
4b996ebd5e
make "trivial" unswitching significantly more general. It can now handle
...
this for example:
for (j = 0; j < N; ++j) { // trivial unswitch
if (C)
P[i+j] = 0;
}
turning it into the obvious code without bothering to duplicate an empty loop.
llvm-svn: 26220
2006-02-15 22:03:36 +00:00