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Author SHA1 Message Date
Stepan Dyatkovskiy
d535cd7ed5 PR19320: 
The trouble as in ARMAsmParser, in ParseInstruction method. It assumes that ARM::R12 + 1 == ARM::SP.
It is wrong, since ARM::<Register> codes are generated by tablegen and actually could be any random numbers.

llvm-svn: 205524
 2014-04-03 11:29:15 +00:00