1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-18 18:42:46 +02:00
Commit Graph

208749 Commits

Author SHA1 Message Date
Kazu Hirata
45712d80ac [llvm-pdbutil] Use llvm::is_contained (NFC) 2020-12-26 12:06:24 -08:00
Nathan James
72df03bec7 [NFC] Refactor some SourceMgr code 2020-12-26 17:53:32 +00:00
Sanjay Patel
3f4cf6da80 [SLP] rename reduction variables for readability; NFC
I am hoping to extend the reduction matching code, and it is
hard to distinguish "ReductionData" from "ReducedValueData".
So extend the tree/root metaphor to include leaves.

Another problem is that the name "OperationData" does not
provide insight into its purpose. I'm not sure if we can alter
that underlying data structure to make the code clearer.
2020-12-26 11:20:25 -05:00
Sanjay Patel
85a38d4e26 [SLP] use switch to improve readability; NFC
This will get more complicated when we handle intrinsics like maxnum.
2020-12-26 10:59:45 -05:00
Nikita Popov
ebc3162468 [ValueTracking] Handle more non-trivial conditions in isKnownNonZero()
In 35676a4f9a536a2aab768af63ddbb15bc722d7f9 I've added handling for
non-trivial dominating conditions that imply non-zero on the true
branch. This adds the same support for the false branch.

The changes in pr45360.ll change block ordering and naming, but
don't change the control flow. The urem is still guaraded by a
non-zero check correctly.
2020-12-26 15:48:04 +01:00
Nikita Popov
baf08259be [ValueTracking] Add more known non zero tests (NFC)
Add tests for non-trivial conditions that imply non-zero on the
false branch rather than the true branch.

The last case already folds due to canonicalization.
2020-12-26 15:48:04 +01:00
Monk Chiang
20dc5d0c2f [RISCV] Define vector widening reduction intrinsic.
Define vwredsumu/vwredsum/vfwredosum/vfwredsum

We work with @rogfer01 from BSC to come out this patch.

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>

Differential Revision: https://reviews.llvm.org/D93807
2020-12-26 21:42:30 +08:00
Kazu Hirata
5dfa98f2df [llvm-objcopy] Use llvm::erase_if (NFC) 2020-12-25 10:13:18 -08:00
Kazu Hirata
950b351780 [Local] Remove unused function RemovePredecessorAndSimplify (NFC)
The last use of the function was removed on Sep 29, 2010 in commit
99c985c37dd45dd0fbd03863037d8e93153783e6.
2020-12-25 09:35:20 -08:00
Nikita Popov
b9fd8ed0fc [BasicAA] Pass AC/DT to isKnownNonEqual()
This allows us to handle assumes etc in the recursive
isKnownNonZero() checks.
2020-12-25 18:29:20 +01:00
Kazu Hirata
df35ddafb7 [llvm-nm, llvm-objdump] Use llvm::is_contained (NFC) 2020-12-25 09:22:37 -08:00
Nikita Popov
6d5fd91806 [InstCombine] Generalize icmp handling in isKnownNonZero()
The dominating condition handling in isKnownNonZero() currently
only takes into account conditions of the form "x != 0" or "x == 0".
However, there are plenty of other conditions that imply non-zero,
a common one being "x s> 0".

Peculiarly, the handling for assumes was already dealing with more
general non-zero-ness conditions, so this just reuses the same
logic for the dominating condition case.
2020-12-25 16:49:23 +01:00
Nikita Popov
6f25df2f26 [InstCombine] Add additional tests for known non zero (NFC)
Check conditions that imply non-zero, even if they are not literally
"x != 0".

Using ctlz for testing, as explicit comparison might get folded by
other reasoning.
2020-12-25 16:28:30 +01:00
Nikita Popov
29aff8b8aa [BasicAA] Pass context instruction to isKnownNonZero()
This allows us to handle additional cases like assumes.
2020-12-25 12:58:19 +01:00
Nikita Popov
d9de690aaf [BasicAA] Make sure context instruction is symmetric
D71264 started using a context instruction in a computeKnownBits()
call. However, if aliasing between two GEPs is checked, then the
choice of context instruction will be different for alias(GEP1, GEP2)
and alias(GEP2, GEP1), which is not supposed to happen.

Resolve this by remembering which GEP a certain VarIndex belongs to,
and use that as the context instruction. This makes the choice of
context instruction predictable and symmetric.

It should be noted that this choice of context instruction is
non-optimal (just like the previous choice): The AA query result is
only valid at points that are reachable from *both* instructions.
Using either one of them is conservatively correct, but a larger
context may also be valid to use.

Differential Revision: https://reviews.llvm.org/D93183
2020-12-25 11:35:46 +01:00
Georgii Rymar
9ce120ed1a [obj2yaml] - Dump the content of a broken hash table properly.
This is similar to D93760.

When something is wrong with the hash table header we dump
its context as a raw data.

Currently we have the calculation overflow issue and it is possible to
bypass the validation we have (and crash).

The patch fixes it.

Differential revision: https://reviews.llvm.org/D93799
2020-12-25 11:51:28 +03:00
Georgii Rymar
625780544e [llvm-readelf/obj] - Improve the warning reported when unable to read the stack size.
It was discussed in D92545 that we might want to improve messages
reported when something is wrong with the stack size section.
This patch does it.

Differential revision: https://reviews.llvm.org/D93802
2020-12-25 11:40:35 +03:00
Georgii Rymar
8638aa3531 [libObject] - Add more ELF types to LLVM_ELF_IMPORT_TYPES_ELFT define (ELFTypes.h).
This allows to get rid of lots for typedefs/usings from many places.

Differential revision: https://reviews.llvm.org/D93801
2020-12-25 11:39:05 +03:00
Amara Emerson
57ddafcebe [AArch64][GlobalISel] Notify observer of mutated instruction for shift custom legalization.
No test for this because it's a CSE verifier failure that's only exposed in a
WIP patch for enabling CSE throughout the AArch64 GISel pipeline.
2020-12-25 00:31:47 -08:00
Zakk Chen
539766da1a [RISCV] Define vpopc/vfirst intrinsics.
Define vpopc/vfirst intrinsics and lower to V instructions.

We work with @rogfer01 from BSC to come out this patch.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D93795
2020-12-24 19:44:34 -08:00
Kazu Hirata
2fb3d0d5a0 [Target] Use llvm::any_of (NFC) 2020-12-24 19:43:26 -08:00
Zakk Chen
e247c5cb6c [RISCV] Define vector mask-register logical intrinsics.
Define vector mask-register logical intrinsics and lower them
to V instructions. Also define pseudo instructions vmmv.m
and vmnot.m.

We work with @rogfer01 from BSC to come out this patch.

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>

Differential Revision: https://reviews.llvm.org/D93705
2020-12-24 18:59:05 -08:00
ShihPo Hung
797648f330 [RISCV] Add intrinsics for vrgather instruction
This patch defines vrgather intrinsics and lower to V instructions.

We work with @rogfer01 from BSC to come out this patch.

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: ShihPo Hung <shihpo.hung@sifive.com>

Differential revision: https://reviews.llvm.org/D93797
2020-12-24 18:16:02 -08:00
Monk Chiang
7e56c337a9 [RISCV] Define vector single-width reduction intrinsic.
integer group:
vredsum/vredmaxu/vredmax/vredminu/vredmin/vredand/vredor/vredxor
float group:
vfredosum/vfredsum/vfredmax/vfredmin

We work with @rogfer01 from BSC to come out this patch.

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>

Differential Revision: https://reviews.llvm.org/D93746
2020-12-25 09:56:01 +08:00
Roman Lebedev
598f4034f9 [LoopIdiom] 'left-shift-until-bittest': keep no-wrap flags on shift, fix edge-case miscompilation for %x.next
While `%x.curr` is always safe to compute, because `LoopBackedgeTakenCount`
will always be smaller than `bitwidth(X)`, i.e. we never get poison,
rewriting `%x.next` is more complicated, however, because `X << LoopTripCount`
will be poison iff `LoopTripCount == bitwidth(X)` (which will happen
iff `BitPos` is `bitwidth(x) - 1` and `X` is `1`).

So unless we know that isn't the case (as alive2 notes, we know it's safe
to do iff shift had no-wrap flags, or bitpos does not indicate signbit,
or we know that %x is never `1`), we'll need to emit an alternative,
safe IR, by either just shifting the `%x.curr`, or conditionally selecting
between the computed `%x.next` and `0`..
Former IR looks better so let's do that.

While there, ensure that we don't drop no-wrap flags from said shift.
2020-12-24 21:20:52 +03:00
Roman Lebedev
1216c57b7f [NFC][LoopIdiom] Improve test coverage for 'left-shift-until-bittest' pattern
In particular, add tests with no-wrap flags on shift,
a test where %x is not `1`, and ensure that tests where %bit
is a constant bitwidth-1, or is not a constant bitwidth-1
test both liveout values.
2020-12-24 21:20:51 +03:00
Roman Lebedev
661c608c01 [InstCombine] Hoist xor-by-constant from xor-by-value
This is one of the deficiencies that can be observed in
https://godbolt.org/z/YPczsG after D91038 patch set.

This exposed two missing folds, one was fixed by the previous commit,
another one is `(A ^ B) | ~(A ^ B) --> -1` / `(A ^ B) & ~(A ^ B) --> 0`.

`-early-cse` will catch it: https://godbolt.org/z/4n1T1v,
but isn't meaningful to fix it in InstCombine,
because we'd need to essentially do our own CSE,
and we can't even rely on `Instruction::isIdenticalTo()`,
because there are no guarantees that the order of operands matches.
So let's just accept it as a loss.
2020-12-24 21:20:50 +03:00
Roman Lebedev
0ea66e659e [NFC][InstCombine] Add test coverage for (x ^ C) ^ y pattern 2020-12-24 21:20:50 +03:00
Roman Lebedev
b911a4e6f2 [InstCombine] Fold a & ~(a ^ b) to x & y
```
----------------------------------------
define i32 @and_xor_not_common_op(i32 %a, i32 %b) {
%0:
  %b2 = xor i32 %b, 4294967295
  %t2 = xor i32 %a, %b2
  %t4 = and i32 %t2, %a
  ret i32 %t4
}
=>
define i32 @and_xor_not_common_op(i32 %a, i32 %b) {
%0:
  %t4 = and i32 %a, %b
  ret i32 %t4
}
Transformation seems to be correct!
```
2020-12-24 21:20:49 +03:00
Roman Lebedev
48560ac305 [NFC][InstCombine] Add test for a & ~(a ^ b) pattern
... which is a variation of `a & (a ^ ~b)` --> a & b`.
A follow-up patch exposes this missing fold, so we need to fix it first.
2020-12-24 21:20:48 +03:00
Roman Lebedev
991bb347f3 [NFC][InstCombine] Autogenerate check lines in vec_shuffle.ll test 2020-12-24 21:20:48 +03:00
Roman Lebedev
6743a26b49 [IR][InstCombine] Add m_ImmConstant(), that matches on non-ConstantExpr constants, and use it
A pattern to ignore ConstantExpr's is quite common, since they frequently
lead into infinite combine loops, so let's make writing it easier.
2020-12-24 21:20:47 +03:00
Roman Lebedev
461cb029c6 [NFC] SimplifyCFGOpt::simplifyUnreachable(): pacify unused variable warning
Thanks to Luke Benes for pointing it out.
2020-12-24 21:20:46 +03:00
Kazu Hirata
4f9d549161 [CodeGen] Remove unused function hasInlineAsmMemConstraint (NFC)
The last use of the function was removed on Sep 13, 2010 in commit
1094c80281e3cdd9e9a9d7ee716da6386b33359b.
2020-12-24 09:17:58 -08:00
Kazu Hirata
682f8913a5 [CodeGen, Transforms] Use llvm::any_of (NFC) 2020-12-24 09:08:36 -08:00
Simon Pilgrim
eb7b7b06a6 [InstCombine] foldICmpUsingKnownBits - use KnownBits signed/unsigned getMin/MaxValue helpers. NFCI.
Replace the local compute*SignedMinMaxValuesFromKnownBits methods with the equivalent KnownBits helpers to determine the min/max value ranges.
2020-12-24 14:22:26 +00:00
Simon Pilgrim
0a16296c8d [Support] Add KnownBits::getSignedMinValue/getSignedMaxValue helpers.
Add unit test coverage - a followup will update InstCombineCompares.cpp to use this and could be used by D86578 as well.
2020-12-24 14:10:12 +00:00
Simon Pilgrim
c43fe07e1f [Support] Explicitly state that KnownBits::getMinValue/getMaxValue are UNSIGNED values. NFCI.
Update the comment to make this clear, following the same approach as APInt.
2020-12-24 14:10:11 +00:00
Evgeniy Brevnov
6467548684 Moved dwarf_eh_resume.ll from Generic to X86 folder
Make test case x86 specific.

Reviewed By: xbolva00

Differential Revision: https://reviews.llvm.org/D93803
2020-12-24 20:08:50 +07:00
Nikita Popov
3a19ef1d8e Revert "[InstCombine] Check inbounds in load/store of gep null transform (PR48577)"
This reverts commit 899faa50f206073cdd8eeaaa130ffa15f850e656.

Upon further consideration, this does not fix the right issue.
Doing this fold for non-inbounds GEPs is legal, because the
resulting pointer is still based-on null, which has no associated
address range, and as such and access to it is UB.

https://bugs.llvm.org/show_bug.cgi?id=48577#c3
2020-12-24 12:36:56 +01:00
Evgeniy Brevnov
5728a8fe59 [CodeGen] Add "noreturn" attirbute to _Unwind_Resume
Currently 'resume' is lowered to _Unwind_Resume with out "noreturn" attribute. Semantically _Unwind_Resume  library call is expected to never return and should be marked as such. Though I didn't find any changes in behavior of existing tests there will be a difference once https://reviews.llvm.org/D79485 lands.

I was not able to come up with the test case anything better than just checking for presence of "noreturn" attribute. Please let me know if there is a better way to test the change.

Reviewed By: xbolva00

Differential Revision: https://reviews.llvm.org/D93682
2020-12-24 18:14:18 +07:00
Praveen Velliengiri
b88899815f [AMDGPU] Use MUBUF instructions for global address space access
Currently, the compiler crashes in instruction selection of global
load/stores in gfx600 due to the lack of FLAT instructions. This patch
fix the crash by selecting MUBUF instructions for global load/stores
in gfx600.

Authored-by: Praveen Velliengiri <Praveen.Velliengiri@amd.com>

Reviewed by: t-tye

Differential revision: https://reviews.llvm.org/D92483
2020-12-24 10:13:04 +00:00
Nikita Popov
5bd65c20b5 Revert "[InstCombine] Fold gep inbounds of null to null"
This reverts commit eb79fd3c928dbbb97f7937963361c1dad2bf8222.

This causes stage2 crashes, possibly due to StringMap being
miscompiled. Reverting for now.
2020-12-24 10:20:31 +01:00
Georgii Rymar
4ac301d88d [obj2yaml] - Dump the content of a broken GNU hash table properly.
When something is wrong with the GNU hash table header we dump
its context as a raw data.

Currently we have the calculation overflow issue and it is possible to
bypass the validation we have (and crash).

The patch fixes it.

Differential revision: https://reviews.llvm.org/D93760
2020-12-24 11:16:31 +03:00
Kazu Hirata
3c1957b4e9 [Analysis] Remove spliceFunction (NFC)
The function was introduced without a user on Jan 3, 2011 in commit
0f87ca77333ef59171749544e8dbdba9009f0dc7.  We still don't have a user
yet.
2020-12-23 21:57:25 -08:00
Kazu Hirata
eea8d75638 [ExecutionEngine, Linker] Use erase_if (NFC) 2020-12-23 21:44:39 -08:00
Juneyoung Lee
b3956a9858 Precommit analysis/etc tests for inselt poison placeholder
This adds tests in directories missing from https://reviews.llvm.org/rGdb7a2f347f132b3920415013d62d1adfb18d8d58
2020-12-24 12:14:24 +09:00
Juneyoung Lee
08ec5d7c6b Precommit transform tests that have poison as insertelement's placeholder
This commit copies existing tests at llvm/Transforms and replaces
'insertelement undef' in those files with 'insertelement poison'.
(see https://reviews.llvm.org/D93586)

Tests listed using this script:

grep -R -E '^[^;]*insertelement <.*> undef,' . | cut -d":" -f1 | uniq |
wc -l

Tests updated:

file_org=llvm/test/Transforms/$1
file=${file_org%.ll}-inseltpoison.ll
cp $file_org $file
sed -i -E 's/^([^;]*)insertelement <(.*)> undef/\1insertelement <\2> poison/g' $file
head -1 $file | grep "Assertions have been autogenerated by utils/update_test_checks.py" -q
if [ "$?" == 1 ]; then
  echo "$file : should be manually updated"
  # I manually updated the script
  exit 1
fi
python3 ./llvm/utils/update_test_checks.py --opt-binary=./build-releaseassert/bin/opt $file
2020-12-24 11:46:17 +09:00
Andrew Litteken
c73c69986e [IRSim] Adding support for isomorphic predicates
Some predicates, can be considered the same as long as the operands are
flipped. For example, a > b gives the same result as b > a. This maps
instructions in a greater than form, to their appropriate less than
form, swapping the operands in the IRInstructionData only, allowing for
more flexible matching.

Tests:

llvm/test/Transforms/IROutliner/outlining-isomorphic-predicates.ll
llvm/unittests/Analysis/IRSimilarityIdentifierTest.cpp

Reviewers: jroelofs, paquette

Recommit of commit 050392660249c70c00e909ae4a7151ba2c766235

Differential Revision: https://reviews.llvm.org/D87310
2020-12-23 19:42:35 -06:00
Layton Kifer
8e4f6bb635 [DAGCombiner] Don't create sexts of deleted xors when they were in-visit replaced
Fixes a bug introduced by D91589.

When folding `(sext (not i1 x)) -> (add (zext i1 x), -1)`, we try to replace the not first when possible. If we replace the not in-visit, then the now invalidated node will be returned, and subsequently we will return an invalid sext. In cases where the not is replaced in-visit we can simply return SDValue, as the not in the current sext should have already been replaced.

Thanks @jgorbe, for finding the below reproducer.

The following reduced test case crashes clang when built with `clang -O1 -frounding-math`:

```
template <class> class a {
  int b() { return c == 0.0 ? 0 : -1; }
  int c;
};
template class a<long>;
```

A debug build of clang produces this "assertion failed" error:
```
clang: /home/jgorbe/code/llvm/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:264: void {anonymous}::DAGCombiner::AddToWorklist(llvm::
SDNode*): Assertion `N->getOpcode() != ISD::DELETED_NODE && "Deleted Node added to Worklist"' failed.
```

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D93274
2020-12-23 16:16:26 -08:00