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6695 Commits

Author SHA1 Message Date
Evan Cheng
47778669f5 Enable Chris' value propagation change. It make available known sign, zero, one bits information for values that are live out of basic blocks. The goal is to eliminate unnecessary sext, zext, truncate of values that are live-in to blocks. This does not handle PHI nodes yet.
llvm-svn: 66777
2009-03-12 06:29:49 +00:00
Gabor Greif
04dfd9fef9 update
llvm-svn: 66733
2009-03-11 22:52:25 +00:00
Owen Anderson
fb5980b6ab Reorganization: Move the Spiller out of VirtRegMap.cpp into its own files. No (intended) functionality change.
llvm-svn: 66720
2009-03-11 22:31:21 +00:00
Evan Cheng
042e05cb31 My last coalescer fix introduced a subtler one. It's aborting a commuting optimization too late and left the live intervals to be out of sync with instructions. This fixes 8b10b.
llvm-svn: 66715
2009-03-11 22:18:44 +00:00
Duncan Sands
b27c523449 It makes no sense to have a ODR version of common
linkage, so remove it.

llvm-svn: 66690
2009-03-11 20:14:15 +00:00
Duncan Sands
87527ab284 Add parentheses to pacify gcc-4.3.
llvm-svn: 66653
2009-03-11 09:04:34 +00:00
Chris Lattner
a0c4a99ec2 reapply my previous patch (r66358) with a tweak to set the
alignment of the generated constant pool entry to the
desired alignment of a type.  If we don't do this, we end up
trying to do movsd from 4-byte alignment memory.  This fixes
450.soplex and 456.hmmer.

llvm-svn: 66641
2009-03-11 05:08:08 +00:00
Bill Wendling
e22e99addb Put the assignment back at the top of this method.
llvm-svn: 66611
2009-03-11 00:03:50 +00:00
Evan Cheng
264173da40 Two coalescer fixes in one.
1. Use the same value# to represent unknown values being merged into sub-registers.
2. When coalescer commute an instruction and the destination is a physical register, update its sub-registers by merging in the extended ranges.

llvm-svn: 66610
2009-03-11 00:03:21 +00:00
Bill Wendling
5f1261bf32 Make ivars private. Other cleanup. No functionality change.
llvm-svn: 66607
2009-03-10 23:57:09 +00:00
Bill Wendling
45ffb6a251 Just make the Dwarf timer group static inside of the getter function. No need to alloc/dealloc.
llvm-svn: 66591
2009-03-10 22:58:53 +00:00
Bill Wendling
3ebcbacf4e Don't put static functions in anonymous namespace.
llvm-svn: 66589
2009-03-10 22:36:31 +00:00
Bill Wendling
6a7265aeaa These should *stop* the timer, not start it again.
llvm-svn: 66586
2009-03-10 22:02:13 +00:00
Bill Wendling
1c78143120 - Fix misspelled method name.
- Remove unused method.

llvm-svn: 66585
2009-03-10 21:59:25 +00:00
Bill Wendling
30a55f9386 - Create GetOrCreateSourceID from getOrCreateSourceID. GetOrCreateSourceID is
the untimed version of getOrCreateSourceID. getOrCreateSourceID calls
  GetOrCreateSourceID, of course.

- Move some methods into the "private" section. Constify at least one method.

- General clean-ups.

llvm-svn: 66582
2009-03-10 21:47:45 +00:00
Bill Wendling
c0ffcaacf8 Refine the Dwarf writer timers so that they measure exception writing and debug
writing individually.

llvm-svn: 66577
2009-03-10 21:23:25 +00:00
Evan Cheng
535dbf4ffd Revert 66358 for now. It's breaking povray, 450.soplex, and 456.hmmer on x86 / Darwin.
llvm-svn: 66574
2009-03-10 20:47:18 +00:00
Bill Wendling
4609f8d7c1 Add a timer to the DwarfWriter pass that measures the total time it takes to
emit exception and debug Dwarf info.

llvm-svn: 66571
2009-03-10 20:41:52 +00:00
Dan Gohman
9c937ebae6 Fix a post-RA scheduling liveness bug. When a basic block is being
scheduled in multiple regions, liveness data used by the
anti-dependence breaker is carried from one region to the next, however
the information reflects the state of the instructions before scheduling.
After scheduling, there may be new live range overlaps. Handle this by
pessimizing the liveness data carried between regions to the point where
it will be conservatively correct now matter how the earlier region is
scheduled. This fixes a miscompilation in 176.gcc with the post-RA
scheduler enabled.

llvm-svn: 66558
2009-03-10 18:10:43 +00:00
Chris Lattner
03060f6d50 wire up support for emitting "special" values from inline asm
format strings with the standard ${:foo} syntax.

llvm-svn: 66527
2009-03-10 05:37:13 +00:00
Chris Lattner
93662edfb8 Fix PR3763 by using proper APInt methods instead of uint64_t's.
llvm-svn: 66434
2009-03-09 20:22:18 +00:00
Evan Cheng
8b47b553f9 Yet another case where the spiller marked two uses of the same register on the same instruction as kill. This fixes PR3706.
llvm-svn: 66428
2009-03-09 19:00:05 +00:00
Chris Lattner
7917d8fd89 just remove the use_empty() check entirely, the only reason it
existed was for llvm-gcc 3.4 (which used the __main hack) which 
is really really long dead.

llvm-svn: 66417
2009-03-09 08:18:48 +00:00
Chris Lattner
6b52b88467 Make the code generator rip of dead constant expr uses before deciding
whether a global is dead or not.  This should fix PR3749 - linker adds 
spurious use to appending globals.  I can't reasonably add a testcase
for this, because the bc writer/reader strip dead constant users.

llvm-svn: 66404
2009-03-09 05:52:15 +00:00
Bill Wendling
13fcab1ef3 Pass in a std::string when getting the names of debugging things. This cuts down
on the number of times a std::string is created and copied.

llvm-svn: 66396
2009-03-09 05:04:40 +00:00
Evan Cheng
483ece4d2e If a MI uses the same register more than once, only mark one of them as 'kill'.
llvm-svn: 66363
2009-03-08 03:58:35 +00:00
Chris Lattner
578b634f56 implement an optimization to codegen c ? 1.0 : 2.0 as load { 2.0, 1.0 } + c*4.
For 2009-03-07-FPConstSelect.ll we now produce:

_f:
	xorl	%eax, %eax
	testl	%edi, %edi
	movl	$4, %ecx
	cmovne	%rax, %rcx
	leaq	LCPI1_0(%rip), %rax
	movss	(%rcx,%rax), %xmm0
	ret

previously we produced:

_f:
	subl	$4, %esp
	cmpl	$0, 8(%esp)
	movss	LCPI1_0, %xmm0
	je	LBB1_2	## entry
LBB1_1:	## entry
	movss	LCPI1_1, %xmm0
LBB1_2:	## entry
	movss	%xmm0, (%esp)
	flds	(%esp)
	addl	$4, %esp
	ret

on PPC the code also improves to:

_f:
	cntlzw r2, r3
	srwi r2, r2, 5
	li r3, lo16(LCPI1_0)
	slwi r2, r2, 2
	addis r3, r3, ha16(LCPI1_0)
	lfsx f1, r3, r2
	blr 

from:

_f:
	li r2, lo16(LCPI1_1)
	cmplwi cr0, r3, 0
	addis r2, r2, ha16(LCPI1_1)
	beq cr0, LBB1_2	; entry
LBB1_1:	; entry
	li r2, lo16(LCPI1_0)
	addis r2, r2, ha16(LCPI1_0)
LBB1_2:	; entry
	lfs f1, 0(r2)
	blr 

This also improves the existing pic-cpool case from:

foo:
	subl	$12, %esp
	call	.Lllvm$1.$piclabel
.Lllvm$1.$piclabel:
	popl	%eax
	addl	$_GLOBAL_OFFSET_TABLE_ + [.-.Lllvm$1.$piclabel], %eax
	cmpl	$0, 16(%esp)
	movsd	.LCPI1_0@GOTOFF(%eax), %xmm0
	je	.LBB1_2	# entry
.LBB1_1:	# entry
	movsd	.LCPI1_1@GOTOFF(%eax), %xmm0
.LBB1_2:	# entry
	movsd	%xmm0, (%esp)
	fldl	(%esp)
	addl	$12, %esp
	ret

to:

foo:
	call	.Lllvm$1.$piclabel
.Lllvm$1.$piclabel:
	popl	%eax
	addl	$_GLOBAL_OFFSET_TABLE_ + [.-.Lllvm$1.$piclabel], %eax
	xorl	%ecx, %ecx
	cmpl	$0, 4(%esp)
	movl	$8, %edx
	cmovne	%ecx, %edx
	fldl	.LCPI1_0@GOTOFF(%eax,%edx)
	ret

This triggers a few dozen times in spec FP 2000.

llvm-svn: 66358
2009-03-08 01:51:30 +00:00
Chris Lattner
f89a9c9d74 random cleanups.
llvm-svn: 66357
2009-03-08 01:47:41 +00:00
Duncan Sands
5ab54d488f Introduce new linkage types linkonce_odr, weak_odr, common_odr
and extern_weak_odr.  These are the same as the non-odr versions,
except that they indicate that the global will only be overridden
by an *equivalent* global.  In C, a function with weak linkage can
be overridden by a function which behaves completely differently.
This means that IP passes have to skip weak functions, since any
deductions made from the function definition might be wrong, since
the definition could be replaced by something completely different
at link time.   This is not allowed in C++, thanks to the ODR
(One-Definition-Rule): if a function is replaced by another at
link-time, then the new function must be the same as the original
function.  If a language knows that a function or other global can
only be overridden by an equivalent global, it can give it the
weak_odr linkage type, and the optimizers will understand that it
is alright to make deductions based on the function body.  The
code generators on the other hand map weak and weak_odr linkage
to the same thing.

llvm-svn: 66339
2009-03-07 15:45:40 +00:00
Dan Gohman
42049dafd7 Fix ScheduleDAGRRList::CopyAndMoveSuccessors' handling of nodes
with multiple chain operands. This can occur when the scheduler
has added chain operands to a node that already has a chain
operand, in order to handle physical register dependencies.

This fixes an llvm-gcc bootstrap failure on x86-64 introduced
in r66058.

llvm-svn: 66240
2009-03-06 02:23:01 +00:00
Bill Wendling
5ddde1a24c When we split a basic block, there's a default branch to the newly created BB.
Delete this default branch, because we're going to generate our own.

llvm-svn: 66234
2009-03-06 01:41:15 +00:00
Owen Anderson
39e5f053c4 (Hopefully) silence a warning.
llvm-svn: 66158
2009-03-05 08:23:20 +00:00
Owen Anderson
744e33c12b Be more careful about choosing restore points when doing restore folding. This fixes some subtle miscompilations.
llvm-svn: 66147
2009-03-05 07:19:18 +00:00
Evan Cheng
90d25a92c2 Fix how livein live intervals are handled. Previously it could end at MBB start. Sorry, no small test case possible.
llvm-svn: 66129
2009-03-05 03:34:26 +00:00
Bob Wilson
b75225556d Fix BuildVectorSDNode::isConstantSplat to handle one-element vectors.
It is an error to call APInt::zext with a size that is equal to the value's
current size, so use zextOrTrunc instead.

llvm-svn: 66039
2009-03-04 17:47:01 +00:00
Owen Anderson
fb7f64ea0d Add a restore folder, which shaves a dozen or so machineinstrs off oggenc. Update a testcase to check this.
llvm-svn: 66029
2009-03-04 08:52:31 +00:00
Eli Friedman
1bed40b86a PR3686: make the legalizer handle bitcast from i80 to x86 long double.
llvm-svn: 66021
2009-03-04 06:23:34 +00:00
Evan Cheng
db402a7a49 Fix PR3701. 1. X86 target renamed eflags register to flags. This matches what llvm-gcc generates so codegen knows flags register is being clobbered by inline asm. 2. BURR scheduler should also check if inline asm nodes can clobber "live" physical registers. Previously it was only checking target nodes with implicit defs.
llvm-svn: 65996
2009-03-04 01:41:49 +00:00
Bill Wendling
93eeea0493 The DAG combiner was performing a BT combine. The BT combine had a value of -1,
so it changed it into a 31 via the TLO.ShrinkDemandedConstant() call. Then it
would go through the DAG combiner again. This time it had a value of 31, which
was turned into a -1 by TLI.SimplifyDemandedBits(). This would ping pong
forever.

Teach the TLO.ShrinkDemandedConstant() call not to lower a value if the demanded
value is an XOR of all ones.

llvm-svn: 65985
2009-03-04 00:18:06 +00:00
Bob Wilson
5b276b6bc9 Generalize BuildVectorSDNode::isConstantSplat to use APInts and handle
arbitrary vector sizes.  Add an optional MinSplatBits parameter to specify
a minimum for the splat element size.  Update the PPC target to use the
revised interface.

llvm-svn: 65899
2009-03-02 23:24:16 +00:00
Nate Begeman
6b41d33726 Fix a problem with DAGCombine on 64b targets where folding
extracts + build_vector into a shuffle would fail, because the
type of the new build_vector would not be legal.  Try harder to
create a legal build_vector type.  Note: this will be totally 
irrelevant once vector_shuffle no longer takes a build_vector for
shuffle mask.

New:
_foo:
	xorps	%xmm0, %xmm0
	xorps	%xmm1, %xmm1
	subps	%xmm1, %xmm1
	mulps	%xmm0, %xmm1
	addps	%xmm0, %xmm1
	movaps	%xmm1, 0

Old:
_foo:
	xorps	%xmm0, %xmm0
	movss	%xmm0, %xmm1
	xorps	%xmm2, %xmm2
	unpcklps	%xmm1, %xmm2
	pshufd	$80, %xmm1, %xmm1
	unpcklps	%xmm1, %xmm2
	pslldq	$16, %xmm2
	pshufd	$57, %xmm2, %xmm1
	subps	%xmm0, %xmm1
	mulps	%xmm0, %xmm1
	addps	%xmm0, %xmm1
	movaps	%xmm1, 0

llvm-svn: 65791
2009-03-01 23:44:07 +00:00
Evan Cheng
276f9b02c5 Minor optimization:
Look for situations like this:                                                                                                                                                              
%reg1024<def> = MOV r1                                                                                                                                                                      
%reg1025<def> = MOV r0                                                                                                                                                                      
%reg1026<def> = ADD %reg1024, %reg1025                                                                                                                                                      
r0            = MOV %reg1026                                                                                                                                                                
Commute the ADD to hopefully eliminate an otherwise unavoidable copy.

llvm-svn: 65752
2009-03-01 02:03:43 +00:00
Bob Wilson
7482f84ae6 Combine PPC's GetConstantBuildVectorBits and isConstantSplat functions to a new
method in a BuildVectorSDNode "pseudo-class".

llvm-svn: 65747
2009-03-01 01:13:55 +00:00
Evan Cheng
9c3ce7905e Last commit accidentially deleted this code.
llvm-svn: 65679
2009-02-28 06:02:14 +00:00
Devang Patel
c908eb0dba It is possible that subprgoram definition is only encoding return value directly, instsad of an DIArray of all argument types.
llvm-svn: 65643
2009-02-27 18:05:21 +00:00
Rafael Espindola
880e63bf01 Refactor TLS code and add some tests. The tests and expected results are:
pic |  declaration | linkage  | visibility |

!pic |  declaration | external | default    | tls1.ll     tls2.ll     | local exec
 pic |  declaration | external | default    | tls1-pic.ll tls2-pic.ll | general dynamic
!pic | !declaration | external | default    | tls3.ll     tls4.ll     | initial exec
 pic | !declaration | external | default    | tls3-pic.ll tls4-pic.ll | general dynamic

!pic |  declaration | external | hidden     | tls7.ll     tls8.ll     | local exec
 pic |  declaration | external | hidden     | X                       | local dynamic
!pic | !declaration | external | hidden     | tls9.ll     tls10.ll    | local exec
 pic | !declaration | external | hidden     | X                       | local dynamic

!pic |  declaration | internal | default    | tls5.ll     tls6.ll     | local exec
 pic |  declaration | internal | default    | X                       | local dynamic

The ones marked with an X have not been implemented since local dynamic is not implemented.

llvm-svn: 65632
2009-02-27 13:37:18 +00:00
Evan Cheng
0ca6e3dba5 MachineLICM CSE should match destination register classes; avoid hoisting implicit_def's.
llvm-svn: 65592
2009-02-27 00:02:22 +00:00
Owen Anderson
32d31bc5cc Enable stack slot coloring DCE. Evan's spiller fixes were needed before this could happen.
llvm-svn: 65501
2009-02-26 04:47:57 +00:00
Evan Cheng
86fc9440db The last commit was overly conservative. It's ok to reuse value that's already marked livein.
llvm-svn: 65498
2009-02-26 03:02:21 +00:00
Evan Cheng
435dbd4665 If an available register falls through to a succ block, unset the last kill. Sorry, it's impossible to reduce a sensible test case. It basically requires the moon and stars to align in order to cause a failure.
llvm-svn: 65497
2009-02-26 02:30:42 +00:00