1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 03:23:01 +02:00
Commit Graph

48 Commits

Author SHA1 Message Date
Anton Korobeynikov
484e1956df Pipehole pattern for i32 imm's
llvm-svn: 75965
2009-07-16 13:59:49 +00:00
Anton Korobeynikov
dfc4f762b3 Bunch of sext_inreg patterns
llvm-svn: 75964
2009-07-16 13:59:18 +00:00
Anton Korobeynikov
1030c0611e Provide normal 32 bit load and store
llvm-svn: 75963
2009-07-16 13:58:43 +00:00
Anton Korobeynikov
1e1f1a789b Proper lower 'small' results
llvm-svn: 75962
2009-07-16 13:58:24 +00:00
Anton Korobeynikov
db9fb21b48 Completel forgot about unconditional branches
llvm-svn: 75961
2009-07-16 13:57:52 +00:00
Anton Korobeynikov
ce2b70586e Lower addresses of globals
llvm-svn: 75960
2009-07-16 13:57:27 +00:00
Anton Korobeynikov
d984dc6c9d Provide "wide" muls and divs/rems
llvm-svn: 75958
2009-07-16 13:56:42 +00:00
Anton Korobeynikov
6ad41d1540 Fix thinko
llvm-svn: 75957
2009-07-16 13:56:11 +00:00
Anton Korobeynikov
72a2743b16 Fix epic bug with invalid regclass for R0D
llvm-svn: 75956
2009-07-16 13:55:51 +00:00
Anton Korobeynikov
c4e9f407ae More register pairs (now 32 bit ones)
llvm-svn: 75954
2009-07-16 13:55:04 +00:00
Anton Korobeynikov
ffea8dd106 Add even-odd register pairs
llvm-svn: 75953
2009-07-16 13:54:45 +00:00
Anton Korobeynikov
6a90c957dd Unbreak due to mainline api change
llvm-svn: 75952
2009-07-16 13:54:20 +00:00
Anton Korobeynikov
c42f164135 Preliminary mul lowering
llvm-svn: 75951
2009-07-16 13:53:55 +00:00
Anton Korobeynikov
f93f6b0ed3 More extloads
llvm-svn: 75950
2009-07-16 13:53:35 +00:00
Anton Korobeynikov
e26fb377c5 SELECT_CC lowering
llvm-svn: 75948
2009-07-16 13:52:51 +00:00
Anton Korobeynikov
769a8c2312 Conditional branches and comparisons
llvm-svn: 75947
2009-07-16 13:52:31 +00:00
Anton Korobeynikov
3df5bd3b40 Emit correct offset for PseudoSourceValue
llvm-svn: 75946
2009-07-16 13:52:10 +00:00
Anton Korobeynikov
57bf9a3426 Provide proper stack offsets for outgoing arguments
llvm-svn: 75945
2009-07-16 13:51:53 +00:00
Anton Korobeynikov
4906b76843 Change register allocation order to reduce amount of callee-saved regs to be spilled.
llvm-svn: 75944
2009-07-16 13:51:34 +00:00
Anton Korobeynikov
b4a6f3c467 Emit callee-saved regs spills / restores
llvm-svn: 75943
2009-07-16 13:51:12 +00:00
Anton Korobeynikov
4fcadd1a7d Some preliminary call lowering
llvm-svn: 75941
2009-07-16 13:50:21 +00:00
Anton Korobeynikov
f4257ba74e Prologue / epilogue emission
llvm-svn: 75940
2009-07-16 13:49:49 +00:00
Anton Korobeynikov
dd60515f11 Add simple frame index elimination
llvm-svn: 75939
2009-07-16 13:49:25 +00:00
Anton Korobeynikov
6d15e5c657 Swap the order of imm and idx field for rri addrmode in order to make handling of rri and ri addrmodes common
llvm-svn: 75937
2009-07-16 13:48:42 +00:00
Anton Korobeynikov
c0374ea3e6 Do not truncate sign bits for negative imms
llvm-svn: 75936
2009-07-16 13:48:23 +00:00
Anton Korobeynikov
5e1fa67a23 Add address computation stuff
llvm-svn: 75935
2009-07-16 13:47:59 +00:00
Anton Korobeynikov
4409d9a464 Cleanup
llvm-svn: 75934
2009-07-16 13:47:36 +00:00
Anton Korobeynikov
47c086cc6b Add mem-imm stores
llvm-svn: 75933
2009-07-16 13:47:14 +00:00
Anton Korobeynikov
370d19266f [PATCH 023/155] Typo
llvm-svn: 75932
2009-07-16 13:45:22 +00:00
Anton Korobeynikov
b88da5c190 Add stores and truncstores
llvm-svn: 75931
2009-07-16 13:45:00 +00:00
Anton Korobeynikov
b262cec2d0 Add patterns for various extloads
llvm-svn: 75930
2009-07-16 13:44:30 +00:00
Anton Korobeynikov
58f9ca9055 Do some heroic rri address matching (shamelessly stolen from x86 backend). Not tested though.
llvm-svn: 75929
2009-07-16 13:44:00 +00:00
Anton Korobeynikov
ba9ee88377 Change register allocation order, so R0 will be allocated the last among scratch. This will make address-calculation code much more happy.
llvm-svn: 75928
2009-07-16 13:43:40 +00:00
Anton Korobeynikov
f080a4a0bd Add shifts and reg-imm address matching
llvm-svn: 75927
2009-07-16 13:43:18 +00:00
Anton Korobeynikov
de69aad588 Add bunch of 32-bit patterns... Uffff :)
llvm-svn: 75926
2009-07-16 13:42:31 +00:00
Anton Korobeynikov
b902c71a90 Add 32 bit subregs
llvm-svn: 75923
2009-07-16 13:35:30 +00:00
Anton Korobeynikov
2f5b711ced Add another bunch of reg-imm patterns for add/or/and/xor
llvm-svn: 75922
2009-07-16 13:35:08 +00:00
Anton Korobeynikov
f63382b52b Add bunch of reg-imm movs
llvm-svn: 75921
2009-07-16 13:34:50 +00:00
Anton Korobeynikov
349c4f3410 Proper match halfword-imm operands for mov and add
llvm-svn: 75920
2009-07-16 13:34:24 +00:00
Anton Korobeynikov
dcc7d19ef3 Provide masked reg-imm 'or' and 'and'
llvm-svn: 75919
2009-07-16 13:33:57 +00:00
Anton Korobeynikov
c98835c743 Add reg-reg and pattern
llvm-svn: 75917
2009-07-16 13:32:49 +00:00
Anton Korobeynikov
2688d3c0a7 Add sub reg-reg pattern
llvm-svn: 75916
2009-07-16 13:32:16 +00:00
Anton Korobeynikov
2dd607fca7 Add xor reg-reg pattern
llvm-svn: 75915
2009-07-16 13:31:28 +00:00
Anton Korobeynikov
66b2612946 Add or reg-reg pattern.
llvm-svn: 75914
2009-07-16 13:30:53 +00:00
Anton Korobeynikov
ca9c5365ac Add add reg-reg and reg-imm patterns
llvm-svn: 75913
2009-07-16 13:30:15 +00:00
Anton Korobeynikov
7b8aec2c40 Add simple reg-reg and reg-imm moves
llvm-svn: 75912
2009-07-16 13:29:38 +00:00
Anton Korobeynikov
7fe1d9c90e Minimal lowering for formal_arguments / ret
llvm-svn: 75911
2009-07-16 13:28:59 +00:00
Anton Korobeynikov
8155f0cbaa Let's start another backend :)
llvm-svn: 75909
2009-07-16 13:27:25 +00:00