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77 Commits

Author SHA1 Message Date
Dylan McKay
4908655dfe [AVR] Enable the ISel, frame analyzer, and alloca passes 
llvm-svn: 286095
 2016-11-07 06:02:55 +00:00
Dylan McKay
35c1d0025e [AVR] Add instruction selection lowering code 
Summary: This adds AVRISelLowering.cpp

Reviewers: arsenm, kparzysz

Subscribers: llvm-commits, modocache, japaric, wdng, beanz, mgorny

Differential Revision: https://reviews.llvm.org/D25034

llvm-svn: 285790
 2016-11-02 06:47:40 +00:00
Alex Bradbury
2fa138eff6 [TableGen] Move OperandMatchResultTy enum to MCTargetAsmParser.h 
As it stands, the OperandMatchResultTy is only included in the generated
header if there is custom operand parsing. However, almost all backends
make use of MatchOperand_Success and friends from OperandMatchResultTy for
e.g. parseRegister. This is a pain when starting an AsmParser for a new
backend that doesn't yet have custom operand parsing. Move the enum to
MCTargetAsmParser.h.

This patch is a prerequisite for D23563

Differential Revision: https://reviews.llvm.org/D23496

llvm-svn: 285705
 2016-11-01 16:32:05 +00:00
Dylan McKay
de46f31ff7 [AVR] Generate all of the TableGen files we need 
This enables generation of all of the TableGen files that are used
downstream.

llvm-svn: 285274
 2016-10-27 08:20:47 +00:00
Dylan McKay
261a06f328 [AVR] Compile the disassembler 
This also updates references of 'TheAVRTarget' to the new
'getTheAVRTarget()' method.

llvm-svn: 285272
 2016-10-27 08:09:15 +00:00
Dylan McKay
d6e1be8ce1 [AVR] Add AVRISelDAGToDAG.cpp 
Summary: This pulls the AVR instruction selector in-tree.

Reviewers: arsenm, kparzysz

Subscribers: llvm-commits, wdng, beanz, japaric, mgorny

Differential Revision: https://reviews.llvm.org/D25278

llvm-svn: 285270
 2016-10-27 07:03:47 +00:00
Dylan McKay
a02b1d7d51 [AVR] Add the machine code emitter 
Reviewers: arsenm, kparzysz

Subscribers: wdng, beanz, japaric, llvm-commits, mgorny

Differential Revision: https://reviews.llvm.org/D25388

llvm-svn: 285269
 2016-10-27 06:56:46 +00:00
Peter Collingbourne
543d51e147 Target: Change various section classifiers in TargetLoweringObjectFile to take a GlobalObject. 
These functions are about classifying a global which will actually be
emitted, so it does not make sense for them to take a GlobalValue which may
for example be an alias.

Change the Mach-O object writer and the Hexagon, Lanai and MIPS backends to
look through aliases before using TargetLoweringObjectFile interfaces. These
are functional changes but all appear to be bug fixes.

Differential Revision: https://reviews.llvm.org/D25917

llvm-svn: 285006
 2016-10-24 19:23:39 +00:00
Dylan McKay
872c3b9ed5 [AVR] Add the machine code disassembler 
This adds a super basic implementation of a machine code disassembler.

It doesn't support any operands with custom encoding.

llvm-svn: 284930
 2016-10-22 23:57:59 +00:00
Dylan McKay
01431d3493 [AVR] Enable generation of the TableGen assembly writer tables 
This also changes the order of the statements in CMakeLists.txt to be
alphabetical.

llvm-svn: 283711
 2016-10-10 01:28:45 +00:00
Mehdi Amini
fa86e5fee9 Move the global variables representing each Target behind accessor function 
This avoids "static initialization order fiasco"

Differential Revision: https://reviews.llvm.org/D25412

llvm-svn: 283702
 2016-10-09 23:00:34 +00:00
Dylan McKay
7daf0ee243 [AVR] Add backend dependencies to MCTargetDesc/LLVMBuild.txt 
llvm-svn: 283642
 2016-10-08 01:14:23 +00:00
Dylan McKay
6ea48bea7f Fix incorrect assertion in AVRFrameLowering.cpp 
This wasn't looking at the right instruction, and would always fail.

llvm-svn: 283640
 2016-10-08 01:10:36 +00:00
Dylan McKay
729f814148 [AVR] Don't worry about call frame size when initializing frame pointer 
We previously only used the frame pointer if the frame pointer was too
big. This was to work around a bug (described in this old commit)

https://sourceforge.net/p/avr-llvm/code/204/tree//llvm/trunk/AVR/AVRFrameLowering.cpp?diff=50d64d912718465cb887d17a:203

I mistakenly invered the condition assuming it was a typo. I am now
removing it because it doesn't seem to be a problem anymore (plus it's a
dirty hack).

llvm-svn: 283639
 2016-10-08 01:10:31 +00:00
Dylan McKay
6d9258b05a [AVR] Don't shadow container while iterating in range-based loop 
This works on clang, but fails on GCC 4.6

llvm-svn: 283638
 2016-10-08 01:09:06 +00:00
Dylan McKay
9bc70c9179 [AVR] Use references rather than pointers in AVRISelLowering 
llvm-svn: 283636
 2016-10-08 01:06:21 +00:00
Dylan McKay
bb08c7e2e9 Allow a maximum of 64 bits to be returned in registers 
The rest spills to the stack

Authored by Jake Goulding

llvm-svn: 283635
 2016-10-08 01:05:09 +00:00
Dylan McKay
1e3e36d597 [AVR] Expand MULHS for all types 
Once MULHS was expanded, this exposed an issue where the condition
register was thought to be 16-bit. This caused an attempt to copy a
16-bit register to an 8-bit register.

Authored by Jake Goulding

llvm-svn: 283634
 2016-10-08 01:01:49 +00:00
Dylan McKay
ba8fefd85c [AVR] Add the 'SoftFail' field to all instruction formats 
This will be used in the future for disassembly.

llvm-svn: 283630
 2016-10-08 00:55:46 +00:00
Dylan McKay
cec36d0272 [AVR] Set up the instruction printer and the assembly backend 
llvm-svn: 283629
 2016-10-08 00:50:11 +00:00
Dylan McKay
24c6381412 [AVR] Add dependencies to AVR libraries in AVRCodeGen 
llvm-svn: 283628
 2016-10-08 00:45:24 +00:00
Dylan McKay
4c9681ec4f [AVR] Add missing subdirectories to LLVMBuild 
llvm-svn: 283627
 2016-10-08 00:42:58 +00:00
Dylan McKay
2919eeaedd [AVR] Add the assembly printer 
Summary: This adds the AVRAsmPrinter class.

Reviewers: arsenm, kparzysz

Subscribers: llvm-commits, wdng, beanz, japaric, mgorny

Differential Revision: https://reviews.llvm.org/D25271

llvm-svn: 283623
 2016-10-08 00:02:36 +00:00
Dylan McKay
da0a66f223 [AVR] Add the AVRMCInstLower class 
Summary:
This class deals with the lowering of CodeGen `MachineInstr` objects to
MC `MCInst` objects.

Reviewers: kparzysz, arsenm

Subscribers: wdng, beanz, japaric, mgorny

Differential Revision: https://reviews.llvm.org/D25269

llvm-svn: 283522
 2016-10-07 06:13:09 +00:00
Dylan McKay
6155da1249 [AVR] Don't select 'MOVW' instructions when they are not supported 
We have a subtarget feature which we were ignoring, which was causing us
to generate unsupported instructions for some older chips.

llvm-svn: 283317
 2016-10-05 13:38:29 +00:00
Dylan McKay
1a1843568a [AVR] Add AVRRegisterInfo::splitReg function 
No tests are included just yet - this is used from the pseudo
instruction expander pass, which hasn't been pulled in-tree yet.

llvm-svn: 283316
 2016-10-05 13:27:30 +00:00
Dylan McKay
09dc0776a0 [AVR] Update return type of dynamic alloca pass 
It was recently changed from 'const char*' to StringRef

llvm-svn: 283312
 2016-10-05 12:32:24 +00:00
Dylan McKay
12b54fd86b [AVR] Add the AVR frame lowering code 
Summary: This allows AVR to lower frames into assembly code.

Reviewers: arsenm, kparzysz

Subscribers: japaric, wdng, beanz, mgorny

Differential Revision: https://reviews.llvm.org/D25032

llvm-svn: 283311
 2016-10-05 11:48:56 +00:00
Dylan McKay
76c678ac59 [AVR] Split all of the AVR device definitions into a separate file 
We have ~500 lines of subtarget feature definitions, they don't belong
in our main TableGen file.

llvm-svn: 283310
 2016-10-05 10:28:45 +00:00
Dylan McKay
cc64dacb9a [AVR] Enable the instruction printer in the target definition 
llvm-svn: 283309
 2016-10-05 10:23:38 +00:00
Dylan McKay
f721f60cf8 [AVR] Add definitions for the ATTiny102 and ATtiny104 chips 
llvm-svn: 283308
 2016-10-05 10:20:33 +00:00
Dylan McKay
8bef9c6e21 [AVR] Add the machine code backend 
Summary:
This adds the AVR machine code backend (`AVRAsmBackend.cpp`). This will
allow us to generate machine code from assembled AVR instructions.

Reviewers: arsenm, kparzysz

Subscribers: modocache, japaric, wdng, beanz, mgorny

Differential Revision: https://reviews.llvm.org/D25029

llvm-svn: 283297
 2016-10-05 05:30:19 +00:00
Dylan McKay
cdace906da [AVR] Add the ELF object file writer 
Summary: This adds the ELF32 writer for AVR.

Reviewers: kparzysz

Subscribers: beanz, mgorny

Differential Revision: https://reviews.llvm.org/D25031

llvm-svn: 282856
 2016-09-30 14:09:20 +00:00
Dylan McKay
fc0928fdac [AVR] Add the assembly instruction printer 
Summary:
This change adds the AVR assembly instruction printer.

No tests are included in this patch. I have left them downstream so we can
add them once `llc` successfully runs (there's very few components left
to upstream until this).

Reviewers: arsenm, kparzysz

Subscribers: wdng, beanz, mgorny

Differential Revision: https://reviews.llvm.org/D25028

llvm-svn: 282854
 2016-09-30 14:01:50 +00:00
Dylan McKay
c658b91293 Revert "[AVR] Add instruction selection lowering code" 
I accidentally comitted it.

llvm-svn: 282712
 2016-09-29 12:49:18 +00:00
Dylan McKay
e8c532f66f [AVR] Add instruction selection lowering code 
Summary: This adds AVRISelLowering.cpp

Reviewers: kparzysz, arsenm

Subscribers: wdng, beanz, mgorny

Differential Revision: https://reviews.llvm.org/D25034

llvm-svn: 282711
 2016-09-29 12:44:38 +00:00
Dylan McKay
95751de394 [AVR] Rename the builtin calling convention names 
'BUILTIN' is clearer than 'RT' in this context.

llvm-svn: 282602
 2016-09-28 16:04:40 +00:00
Dylan McKay
aeb4afb742 [AVR] Import the LLVM namespace inside AVRMCTargetDesc.cpp 
llvm-svn: 282598
 2016-09-28 15:35:26 +00:00
Dylan McKay
f032b425d8 [AVR] Add AVRMCTargetDesc.cpp 
Summary:
This adds the AVRMCTargetDesc file in tree. It allows creation of the
core classes used in the backend.

Reviewers: arsenm, kparzysz

Subscribers: wdng, beanz, mgorny

Differential Revision: https://reviews.llvm.org/D25023

llvm-svn: 282597
 2016-09-28 15:31:12 +00:00
Dylan McKay
2ba7cbf4bc [AVR] Update the signature of createAVRAsmBackend 
It has been recently changed to also take a MCTargetOptions structure.

llvm-svn: 282594
 2016-09-28 14:35:07 +00:00
Dylan McKay
b456ea33de [AVR] Enable the assembly parser 
We very recently landed the code. This commit enables the parser.

It also adds a missing include to AVRAsmParser.cpp

llvm-svn: 282593
 2016-09-28 14:34:42 +00:00
Dylan McKay
aabba06f13 [AVR] Merge most recent changes to AVRInstrInfo.td 
This adds two new things:

- Operand types per fixup
- Atomic pseudo operations

llvm-svn: 282588
 2016-09-28 13:44:02 +00:00
Dylan McKay
56d1404eab [AVR] Update the data layout 
The previous data layout caused issues when dealing with atomics.

Foe example, it is illegal to load a 16-bit value with less than 16-bits
of alignment.

This changes the data layout so that all types are aligned by at least
their own width.

Interestingly, this also _slightly_ decreased register pressure in some
cases.

llvm-svn: 282587
 2016-09-28 13:29:10 +00:00
Dylan McKay
6c6ddcf476 [AVR] Add assembly parser 
Summary: This patch adds the AVRAsmParser library.

Reviewers: arsenm, kparzysz

Subscribers: wdng, beanz, mgorny, kparzysz, simoncook, jtbandes, llvm-commits

Differential Revision: https://reviews.llvm.org/D20046

llvm-svn: 282584
 2016-09-28 13:02:57 +00:00
Dylan McKay
c4ee28fdc5 [AVR] Add AVRMCExpr 
Summary: This adds the AVRMCExpr headers and implementation.

Reviewers: arsenm, ruiu, grosbach, kparzysz

Subscribers: wdng, beanz, mgorny, kparzysz, jtbandes, llvm-commits

Differential Revision: https://reviews.llvm.org/D20503

llvm-svn: 282397
 2016-09-26 11:35:32 +00:00
Dylan McKay
87118e6a0f [AVR] Update signature of AVRTargetObjectFile::SelectSectionForGlobal 
It was changed recently, and was breaking compilation of the backend.

llvm-svn: 282329
 2016-09-24 11:38:08 +00:00
Matt Arsenault
106c504026 Finish renaming remaining analyzeBranch functions 
llvm-svn: 281535
 2016-09-14 20:43:16 +00:00
Matt Arsenault
186940fec6 Make analyzeBranch family of instruction names consistent 
analyzeBranch was renamed to use lowercase first, rename
the related set to match.

llvm-svn: 281506
 2016-09-14 17:24:15 +00:00
Matt Arsenault
3b94dad7d3 AArch64: Use TTI branch functions in branch relaxation 
The main change is to return the code size from
InsertBranch/RemoveBranch.

Patch mostly by Tim Northover

llvm-svn: 281505
 2016-09-14 17:23:48 +00:00
Justin Bogner
b5f5b0ef6d Replace "fallthrough" comments with LLVM_FALLTHROUGH 
This is a mechanical change of comments in switches like fallthrough,
fall-through, or fall-thru to use the LLVM_FALLTHROUGH macro instead.

llvm-svn: 278902
 2016-08-17 05:10:15 +00:00