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Commit Graph

228 Commits

Author SHA1 Message Date
Tim Northover
490c4c1bda ARM: remove unused v(add|sub)hn and vqdml[as]l intrinsics.
Clang is now generating cleaner IR, so this removes the old variants which
should be completely unused.

llvm-svn: 189481
2013-08-28 14:33:33 +00:00
Daniel Sanders
7d6b0c31fc [mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v
These intrinsics are legalized to V(ALL|ANY)_(NON)?ZERO nodes,
are matched as SN?Z_[BHWDV]_PSEUDO pseudo's, and emitted as
a branch/mov sequence to evaluate to 0 or 1.

Note: The resulting code is sub-optimal since it doesnt seem to be possible
to feed the result of an intrinsic directly into a brcond. At the moment
it uses (SETCC (VALL_ZERO $ws), 0, SETEQ) and similar which unnecessarily
evaluates the boolean twice.

llvm-svn: 189478
2013-08-28 12:14:50 +00:00
Daniel Sanders
86a3b104b1 [mips][msa] Added load/store intrinsics.
llvm-svn: 189476
2013-08-28 12:04:29 +00:00
Daniel Sanders
6583601738 [mips][msa] Added move.v
llvm-svn: 189471
2013-08-28 10:44:47 +00:00
Daniel Sanders
21800e80c1 [mips][msa] Added cfcmsa, and ctcmsa
The MSA control registers have been added as reserved registers,
and are only used via ISD::Copy(To|From)Reg. The intrinsics are lowered
into these nodes.

llvm-svn: 189468
2013-08-28 10:26:24 +00:00
Daniel Sanders
3740f20366 [mips][msa] Added f[cs]af, f[cs]or, f[cs]ueq, f[cs]ul[et], f[cs]une, fsun, ftrunc_[su], hadd_[su], hsub_[su], sr[al]r, sr[al]ri
llvm-svn: 189467
2013-08-28 10:12:09 +00:00
Daniel Sanders
eb5b945b08 [mips][msa] Few MSA Builtins have side-effects. Added IntrNoMem to those that don't.
llvm-svn: 189106
2013-08-23 12:21:25 +00:00
Andrea Di Biagio
b486212f5a Add function attribute 'optnone'.
This function attribute indicates that the function is not optimized
by any optimization or code generator passes with the 
exception of interprocedural optimization passes.

llvm-svn: 189101
2013-08-23 11:53:55 +00:00
Chandler Carruth
ab55d8d98c Add a new helper method to Value to strip in-bounds constant offsets of
pointers, but accumulate the offset into an APInt in the process of
stripping it.

This is a pretty handy thing to have, such as when trying to determine
if two pointers are at some constant relative offset. I'll be committing
a patch shortly to use it for exactly that purpose.

llvm-svn: 189000
2013-08-22 11:25:11 +00:00
Chandler Carruth
7ac6f80730 Clean up the doxygen formatting of the comments on the strip* methods on
Value. These methods probably don't belong here, and I'm discussing
moving the lot of them to a better home, but for now I'm about to extend
their functionality and wanted to tidy them up first.

llvm-svn: 188997
2013-08-22 10:12:18 +00:00
Daniel Sanders
30561c36b8 [mips][msa] Removed fcge, fcgt, fsge, fsgt
These instructions were present in a draft spec but were removed before
publication.

llvm-svn: 188782
2013-08-20 09:41:47 +00:00
Daniel Sanders
91c40d80de [mips][msa] Added insve
llvm-svn: 188777
2013-08-20 09:22:54 +00:00
Daniel Sanders
15341e9a12 [mips][msa] Added and.v, bmnz.v, bmz.v, bsel.v, nor.v, or.v, xor.v
llvm-svn: 188767
2013-08-20 08:38:21 +00:00
Hal Finkel
8f395a803a Add a llvm.copysign intrinsic
This adds a llvm.copysign intrinsic; We already have Libfunc recognition for
copysign (which is turned into the FCOPYSIGN SDAG node). In order to
autovectorize calls to copysign in the loop vectorizer, we need a corresponding
intrinsic as well.

In addition to the expected changes to the language reference, the loop
vectorizer, BasicTTI, and the SDAG builder (the intrinsic is transformed into
an FCOPYSIGN node, just like the function call), this also adds FCOPYSIGN to a
few lists in LegalizeVector{Ops,Types} so that vector copysigns can be
expanded.

In TargetLoweringBase::initActions, I've made the default action for FCOPYSIGN
be Expand for vector types. This seems correct for all in-tree targets, and I
think is the right thing to do because, previously, there was no way to generate
vector-values FCOPYSIGN nodes (and most targets don't specify an action for
vector-typed FCOPYSIGN).

llvm-svn: 188728
2013-08-19 23:35:46 +00:00
Peter Collingbourne
5c5e108012 Introduce non-const overloads for GlobalAlias::{get,resolve}AliasedGlobal.
llvm-svn: 188725
2013-08-19 23:13:33 +00:00
Elena Demikhovsky
af085f619a AVX-512: compiler intrinsics
llvm-svn: 188654
2013-08-19 06:55:01 +00:00
Juergen Ributzka
dedbd665dd The vbroadcastsi256 intrinsic does not exactly resemble the GCC
builtin. The GCC builtin expects the arguments to be passed by val,
whereas the LLVM intrinsic expects a pointer instead.

This is related to PR 16581 and rdar:14747994.

llvm-svn: 188608
2013-08-17 16:38:37 +00:00
Jack Carter
2c2f78cead [Mips][msa] Added the simple builtins (madd_q to xori)
Includes:
madd_q, maddr_q, maddv, max_[asu], maxi_[su], min_[asu], mini_[su], mod_[su],
msub_q, msubr_q, msubv, mul_q, mulr_q, mulv, nloc, nlzc, nori, ori, pckev,
pckod, pcnt, sat_[su], shf, sld, sldi, sll, slli, splat, splati, sr[al],
sr[al]i, subs_[su], subss_u, subus_s, subv, subvi, vshf, xori

Patch by Daniel Sanders

llvm-svn: 188460
2013-08-15 14:22:07 +00:00
Jack Carter
8798c3bae2 [Mips][msa] Added the simple builtins (fadd to ftq)
Includes:
fadd, fceq, fcg[et], fclass, fcl[et], fcne, fcun, fdiv, fexdo, fexp2,
fexup[lr], ffint_[su], ffql, ffqr, fill, flog2, fmadd, fmax, fmax_a, fmin,
fmin_a, fmsub, fmul, frint, frcp, frsqrt, fseq, fsge, fsgt, fsle, fslt,
fsne, fsqr, fsub, ftint_s, ftq

Patch by Daniel Sanders

llvm-svn: 188458
2013-08-15 13:45:36 +00:00
Jack Carter
80890657b3 [Mips][msa] Added the simple builtins (add_a to dpsub[su], ilvev to ldi)
Includes:
add_a, adds_[asu], addv, addvi, andi.b, asub_[su].[bhwd], aver?_[su]_[bhwd],
bclr, bclri, bins[lr], bins[lr]i, bmnzi, bmzi, bneg, bnegi, bseli, bset, bseti,
c(eq|ne), c(eq|ne)i, cl[et]_[su], cl[et]i_[su], copy_[su].[bhw], div_[su],
dotp_[su], dpadd_[su], dpsub_[su], ilvev, ilvl, ilvod, ilvr, insv, insve,
ldi

Patch by Daniel Sanders

llvm-svn: 188457
2013-08-15 12:24:57 +00:00
Michael Gottesman
e32ebb94bd [stackprotector] Added intrinsic llvm.stackprotectorcheck.
llvm-svn: 188191
2013-08-12 18:35:32 +00:00
Hal Finkel
bdc7aa32c1 Add ISD::FROUND for libm round()
All libm floating-point rounding functions, except for round(), had their own
ISD nodes. Recent PowerPC cores have an instruction for round(), and so here I'm
adding ISD::FROUND so that round() can be custom lowered as well.

For the most part, this is straightforward. I've added an intrinsic
and a matching ISD node just like those for nearbyint() and friends. The
SelectionDAG pattern I've named frnd (because ISD::FP_ROUND has already claimed
fround).

This will be used by the PowerPC backend in a follow-up commit.

llvm-svn: 187926
2013-08-07 22:49:12 +00:00
Elena Demikhovsky
cb3f9da2e3 AVX-512 set: added mask operations, lowering BUILD_VECTOR for i1 vector types.
Added intrinsics and tests.

llvm-svn: 187717
2013-08-05 08:52:21 +00:00
Robert Lytton
8fc4bdfaae remove executable permission from IntrinsicsXCore.td
llvm-svn: 187584
2013-08-01 17:17:59 +00:00
Tim Northover
dbac87d1fc AArch64: add initial NEON support
Patch by Ana Pazos.

- Completed implementation of instruction formats:
AdvSIMD three same
AdvSIMD modified immediate
AdvSIMD scalar pairwise

- Completed implementation of instruction classes
(some of the instructions in these classes
belong to yet unfinished instruction formats):
Vector Arithmetic
Vector Immediate
Vector Pairwise Arithmetic

- Initial implementation of instruction formats:
AdvSIMD scalar two-reg misc
AdvSIMD scalar three same

- Intial implementation of instruction class:
Scalar Arithmetic

- Initial clang changes to support arm v8 intrinsics.
Note: no clang changes for scalar intrinsics function name mangling yet.

- Comprehensive test cases for added instructions
To verify auto codegen, encoding, decoding, diagnosis, intrinsics.

llvm-svn: 187567
2013-08-01 09:20:35 +00:00
Robert Lytton
c10bbf30c8 XCore target: add GCCBuiltin to four intrinsics
The following are made available by clang in the XCore ABI
	__builtin_bitrev
	__builtin_getid
	__builtin_getps
	__builtin_setps

llvm-svn: 187566
2013-08-01 08:41:32 +00:00
Matt Arsenault
f58e03599f Revert "Remove isCastable since nothing uses it now"
Apparently dragonegg uses it.

llvm-svn: 187454
2013-07-30 22:02:14 +00:00
Matt Arsenault
2121a49954 Remove isCastable since nothing uses it now
llvm-svn: 187448
2013-07-30 21:11:17 +00:00
Matt Arsenault
c825ddd4ca Change behavior of calling bitcasted alias functions.
It will now only convert the arguments / return value and call
the underlying function if the types are able to be bitcasted.
This avoids using fp<->int conversions that would occur before.

llvm-svn: 187444
2013-07-30 20:45:05 +00:00
Matt Arsenault
823928b4b1 Re-add DataLayout pointer size convenience functions.
These were reverted in r167222 along with the rest
of the last different address space pointer size attempt.
These will be used in later commits.

llvm-svn: 187223
2013-07-26 17:37:20 +00:00
Rafael Espindola
32f9d6abe2 Remove the mblaze backend from llvm.
Approval in here http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-July/064169.html

llvm-svn: 187145
2013-07-25 18:55:05 +00:00
Bill Wendling
6420062d1b Add a way to add a kind-value string pair to an attribute.
llvm-svn: 187138
2013-07-25 18:34:24 +00:00
Rafael Espindola
d4a363d0de Make these methods const correct.
Thanks to Nick Lewycky for noticing it.

llvm-svn: 187098
2013-07-25 02:50:08 +00:00
Bill Wendling
2bf753029b Add helpful accessor methods to get the specified function attribute.
llvm-svn: 187088
2013-07-24 23:45:00 +00:00
Matt Arsenault
355591860e Fix missing const
llvm-svn: 186857
2013-07-22 18:58:53 +00:00
Joey Gouly
cfa16b3bc1 [ARMv8] Implement the NEON instructions VRINT{N, X, A, Z, M, P}.
llvm-svn: 186688
2013-07-19 16:34:16 +00:00
Joey Gouly
933fb028d7 [ARMv8] Add NEON instructions VCVT{A, N, P, M}.
llvm-svn: 186574
2013-07-18 11:53:22 +00:00
Adrian Prantl
5c3c7fab07 Get rid of the Dis/EnableDebugLocations() API.
I'm moving this functionality into clang instead.

llvm-svn: 186549
2013-07-18 00:27:46 +00:00
Joey Gouly
bc02a480d0 [ARMv8] Add support for the NEON instructions vmaxnm/vminnm.
This adds a new class for non-predicable NEON instructions and a
new DecoderNamespace for v8 NEON instructions.

llvm-svn: 186504
2013-07-17 13:59:38 +00:00
Manman Ren
929ebf85f2 Add getModuleFlag(StringRef Key) to query a module flag given Key.
No functionality change.

llvm-svn: 186470
2013-07-16 23:21:16 +00:00
Tim Northover
69d676cd12 ARM: implement ldrex, strex and clrex intrinsics
Intrinsics already existed for the 64-bit variants, so these support operations
of size at most 32-bits.

llvm-svn: 186392
2013-07-16 09:46:55 +00:00
Craig Topper
d5e9e015c6 Remove unneeded forward declarations.
llvm-svn: 186244
2013-07-13 08:28:45 +00:00
Benjamin Kramer
ebffe260a7 Mark MDNode::getOperand as readonly.
We can't inline it but we can still CSE calls to it.

llvm-svn: 186156
2013-07-12 12:05:13 +00:00
Charles Davis
2b2075f834 Target/X86: Add explicit Win64 and System V/x86-64 calling conventions.
Summary:
This patch adds explicit calling convention types for the Win64 and
System V/x86-64 ABIs. This allows code to override the default, and use
the Win64 convention on a target that wants to use SysV (and
vice-versa). This is needed to implement the `ms_abi` and `sysv_abi` GNU
attributes.

Reviewers:

CC:

llvm-svn: 186144
2013-07-12 06:02:35 +00:00
Nadav Rotem
3276e11bb5 IRBuilder: add an assertion that checks if we try to get a debug loc from ->end();
llvm-svn: 185952
2013-07-09 17:54:22 +00:00
Nadav Rotem
edc4aa7d9e Fix a bug in IRBuilder::ClearInsertionPoint. The IR Builder needs to reset both the BB and the insert point inside the BB.
llvm-svn: 185883
2013-07-08 23:27:43 +00:00
Nick Lewycky
181e3475a3 Add missing per-argument doesNotAccessMemory accessors. No functionality change
since it has no callers today.

llvm-svn: 185775
2013-07-07 08:29:51 +00:00
Nick Lewycky
7b093a1c2f Extend 'readonly' and 'readnone' to work on function arguments as well as
functions. Make the function attributes pass add it to known library functions
and when it can deduce it.

llvm-svn: 185735
2013-07-06 00:29:58 +00:00
Matt Arsenault
bccd895589 Fix extra whitespace / formatting
llvm-svn: 185238
2013-06-28 23:24:05 +00:00
Justin Holewinski
0f70140107 [NVPTX] Remove i8 register class. PTX support for i8 (.b8, .u8, .s8) is rather poor and we're better off just ignoring it and letting LLVM expand all i8 ops out to i16.
llvm-svn: 185174
2013-06-28 17:57:59 +00:00