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Commit Graph

14 Commits

Author SHA1 Message Date
Evan Cheng
493960579f ARM always use register scavenger. No longer reserves R12.
llvm-svn: 34999
2007-03-07 02:46:23 +00:00
Evan Cheng
db591ecaa8 Make requiresRegisterScavenging determination on a per MachineFunction basis.
llvm-svn: 34711
2007-02-28 00:59:19 +00:00
Evan Cheng
cfb0f8cfc6 Temporary: make R12 available in ARM mode if RegScavenger is being used.
llvm-svn: 34709
2007-02-28 00:22:44 +00:00
Evan Cheng
4357509984 Minor tweak. Allocate r0 to r3 in reverse order, r3 is least likely to be livein to a function.
llvm-svn: 34701
2007-02-27 23:03:55 +00:00
Evan Cheng
903e98b477 Comment.
llvm-svn: 33633
2007-01-29 22:23:02 +00:00
Evan Cheng
d9d93832b0 hasFP() is now a virtual method of MRegisterInfo.
llvm-svn: 33455
2007-01-23 00:57:47 +00:00
Evan Cheng
a6803554ab Clean up ARM PEI code.
llvm-svn: 33389
2007-01-20 02:09:25 +00:00
Evan Cheng
c6e1d453d3 ARM backend contribution from Apple.
llvm-svn: 33353
2007-01-19 07:51:42 +00:00
Rafael Espindola
99322ef58c initial support for frame pointers
llvm-svn: 31197
2006-10-26 13:31:26 +00:00
Rafael Espindola
36c3e0028b fix the names of the 64bit fp register
initial support for returning 64bit floating point numbers

llvm-svn: 30692
2006-10-02 19:30:56 +00:00
Rafael Espindola
1b39270c95 add floating point registers
implement SINT_TO_FP

llvm-svn: 30673
2006-09-29 21:20:16 +00:00
Chris Lattner
db290f7479 Constify some methods. Patch provided by Anton Vayvod, thanks!
llvm-svn: 29756
2006-08-17 22:00:08 +00:00
Rafael Espindola
14a59f5b6e initial implementation of ARMRegisterInfo::eliminateFrameIndex
fixes test/Regression/CodeGen/ARM/ret_arg5.ll

llvm-svn: 28854
2006-06-18 00:08:07 +00:00
Rafael Espindola
dd49dfc0df added a skeleton of the ARM backend
llvm-svn: 28301
2006-05-14 22:18:28 +00:00