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Commit Graph

5133 Commits

Author SHA1 Message Date
Reid Kleckner
493c014968 [WinEH] Create an llvm.x86.seh.exceptioninfo intrinsic
This intrinsic is like framerecover plus a load. It recovers the EH
registration stack allocation from the parent frame and loads the
exception information field out of it, giving back a pointer to an
EXCEPTION_POINTERS struct. It's designed for clang to use in SEH filter
expressions instead of accessing the EXCEPTION_POINTERS parameter that
is available on x64.

This required a minor change to MC to allow defining a label variable to
another absolute framerecover label variable.

llvm-svn: 239567
2015-06-11 22:32:23 +00:00
Douglas Katzman
0f36653e69 Fix English usage in command line flag help string.
llvm-svn: 239556
2015-06-11 20:03:23 +00:00
Pete Cooper
8328fce315 Remove MachineModuleInfo::UsedFunctions as it has no users.
It hasn't been used since r130964.

This also removes MachineModuleInfo::isUsedFunction and
MachineModuleInfo::AnalyzeModule, both of which were only
there to support UsedFunctions.

llvm-svn: 239501
2015-06-11 01:04:56 +00:00
Akira Hatanaka
c42437a4f8 Remove DisableTailCalls from TargetOptions and the code in resetTargetOptions
that was resetting it.

Remove the uses of DisableTailCalls in subclasses of TargetLowering and use
the value of function attribute "disable-tail-calls" instead. Also,
unconditionally add pass TailCallElim to the pipeline and check the function
attribute at the start of runOnFunction to disable the pass on a per-function
basis. 
 
This is part of the work to remove TargetMachine::resetTargetOptions, and since
DisableTailCalls was the last non-fast-math option that was being reset in that
function, we should be able to remove the function entirely after the work to
propagate IR-level fast-math flags to DAG nodes is completed.

Out-of-tree users should remove the uses of DisableTailCalls and make changes
to attach attribute "disable-tail-calls"="true" or "false" to the functions in
the IR.

rdar://problem/13752163

Differential Revision: http://reviews.llvm.org/D10099

llvm-svn: 239427
2015-06-09 19:07:19 +00:00
Akira Hatanaka
bcc4af8eec Include header file <functional>.
This is a follow-up to r239325.

llvm-svn: 239329
2015-06-08 19:03:32 +00:00
Akira Hatanaka
76bd57e472 [ARM] Pass a callback to FunctionPass constructors to enable skipping execution
on a per-function basis.

Previously some of the passes were conditionally added to ARM's pass pipeline
based on the target machine's subtarget. This patch makes changes to add those
passes unconditionally and execute them conditonally based on the predicate
functor passed to the pass constructors. This enables running different sets of
passes for different functions in the module.

rdar://problem/20542263

Differential Revision: http://reviews.llvm.org/D8717

llvm-svn: 239325
2015-06-08 18:50:43 +00:00
Sanjay Patel
044a50e6ce fix typos; NFC
llvm-svn: 239303
2015-06-08 15:21:38 +00:00
Hao Liu
d39edfda46 [LoopVectorize] Teach Loop Vectorizor about interleaved memory accesses.
Interleaved memory accesses are grouped and vectorized into vector load/store and shufflevector.
E.g. for (i = 0; i < N; i+=2) {
       a = A[i];         // load of even element
       b = A[i+1];       // load of odd element
       ...               // operations on a, b, c, d
       A[i] = c;         // store of even element
       A[i+1] = d;       // store of odd element
     }

  The loads of even and odd elements are identified as an interleave load group, which will be transfered into vectorized IRs like:
     %wide.vec = load <8 x i32>, <8 x i32>* %ptr
     %vec.even = shufflevector <8 x i32> %wide.vec, <8 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
     %vec.odd = shufflevector <8 x i32> %wide.vec, <8 x i32> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>

  The stores of even and odd elements are identified as an interleave store group, which will be transfered into vectorized IRs like:
     %interleaved.vec = shufflevector <4 x i32> %vec.even, %vec.odd, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7> 
     store <8 x i32> %interleaved.vec, <8 x i32>* %ptr

This optimization is currently disabled by defaut. To try it by adding '-enable-interleaved-mem-accesses=true'. 

llvm-svn: 239291
2015-06-08 06:39:56 +00:00
Matt Arsenault
b88a683ecf Add isLegalAddressingMode address space argument to TTI
Update to match the TLI version, and remove the TLI version's
default argument.

llvm-svn: 239260
2015-06-07 20:12:03 +00:00
Sanjay Patel
d41c35dc2f make reciprocal estimate code generation more flexible by adding command-line options (3rd try)
The first try (r238051) to land this was reverted due to ExecutionEngine build failure;
that was hopefully addressed by r238788.

The second try (r238842) to land this was reverted due to BUILD_SHARED_LIBS failure;
that was hopefully addressed by r238953.

This patch adds a TargetRecip class for processing many recip codegen possibilities.
The class is intended to handle both command-line options to llc as well
as options passed in from a front-end such as clang with the -mrecip option.

The x86 backend is updated to use the new functionality.
Only -mcpu=btver2 with -ffast-math should see a functional change from this patch.
All other x86 CPUs continue to *not* use reciprocal estimates by default with -ffast-math.

Differential Revision: http://reviews.llvm.org/D8982

llvm-svn: 239001
2015-06-04 01:32:35 +00:00
Rafael Espindola
81fe124a03 Revert "make reciprocal estimate code generation more flexible by adding command-line options (2nd try)"
This reverts commit r238842.

It broke -DBUILD_SHARED_LIBS=ON build.

llvm-svn: 238900
2015-06-03 05:32:44 +00:00
Benjamin Kramer
9139d0a501 Push constness through LoopInfo::isLoopHeader and clean it up a bit.
NFC.

llvm-svn: 238843
2015-06-02 15:28:27 +00:00
Sanjay Patel
006dd407ed make reciprocal estimate code generation more flexible by adding command-line options (2nd try)
The first try (r238051) to land this was reverted due to bot failures
that were hopefully addressed by r238788.

This patch adds a TargetRecip class for processing many recip codegen possibilities.
The class is intended to handle both command-line options to llc as well
as options passed in from a front-end such as clang with the -mrecip option.

The x86 backend is updated to use the new functionality.
Only -mcpu=btver2 with -ffast-math should see a functional change from this patch.
All other x86 CPUs continue to *not* use reciprocal estimates by default with -ffast-math.

Differential Revision: http://reviews.llvm.org/D8982

llvm-svn: 238842
2015-06-02 15:28:15 +00:00
Matthias Braun
6e408c79f4 LiveRangeEdit: Fix liveranges not shrinking on subrange kill.
If a dead instruction we may not only have a last-use in the main live
range but also in a subregister range if subregisters are tracked. We
need to partially rebuild live ranges in both cases.

The testcase only broke when subregister liveness was enabled. I
commited it in the current form because there is currently no flag to
enable/disable subregister liveness.

This fixes PR23720.

llvm-svn: 238785
2015-06-01 21:26:26 +00:00
Chandler Carruth
6f372f0515 [sdag] Add the helper I most want to the DAG -- building a bitcast
around a value using its existing SDLoc.

Start using this in just one function to save omg lines of code.

llvm-svn: 238638
2015-05-30 04:14:10 +00:00
Benjamin Kramer
0e31955b32 Replace push_back(Constructor(foo)) with emplace_back(foo) for non-trivial types
If the type isn't trivially moveable emplace can skip a potentially
expensive move. It also saves a couple of characters.


Call sites were found with the ASTMatcher + some semi-automated cleanup.

memberCallExpr(
    argumentCountIs(1), callee(methodDecl(hasName("push_back"))),
    on(hasType(recordDecl(has(namedDecl(hasName("emplace_back")))))),
    hasArgument(0, bindTemporaryExpr(
                       hasType(recordDecl(hasNonTrivialDestructor())),
                       has(constructExpr()))),
    unless(isInTemplateInstantiation()))

No functional change intended.

llvm-svn: 238602
2015-05-29 19:43:39 +00:00
Matthias Braun
4eae512569 CodeGen: Use mop_iterator instead of MIOperands/ConstMIOperands
MIOperands/ConstMIOperands are classes iterating over the MachineOperand
of a MachineInstr, however MachineInstr::mop_iterator does the same
thing.

I assume these two iterators exist to have a uniform interface to
iterate over the operands of a machine instruction bundle and a single
machine instruction. However in practice I find it more confusing to have 2
different iterator classes, so this patch transforms (nearly all) the
code to use mop_iterators.

The only exception being MIOperands::anlayzePhysReg() and
MIOperands::analyzeVirtReg() still needing an equivalent, I leave that
as an exercise for the next patch.

Differential Revision: http://reviews.llvm.org/D9932

This version is slightly modified from the proposed revision in that it
introduces MachineInstr::getOperandNo to avoid the extra counting
variable in the few loops that previously used MIOperands::getOperandNo.

llvm-svn: 238539
2015-05-29 02:56:46 +00:00
Matthias Braun
ab15095964 MachineFrameInfo: Simplify pristine register calculation.
About pristine regsiters:
Pristine registers "hold a value that is useless to the current
function, but that must be preserved - they are callee saved registers
that have not been saved." This concept saves compile time as it frees
the prologue/epilogue inserter from adding every such register to every
basic blocks live-in list.

However the current code in getPristineRegs is formulated in a
complicated way: Inside the function prologue and epilogue all callee
saves are considered pristine, while in the rest of the code only the
non-saved ones are considered pristine.  This requires logic to
differentiate between prologue/epilogue and the rest and in the presence
of shrink-wrapping this even becomes complicated/expensive.  It's also
unnecessary because the prologue epilogue inserters already mark
callee-save registers that are saved/restores properly in the respective
blocks in the prologue/epilogue (see updateLiveness() in
PrologueEpilogueInserter.cpp). So only declaring non-saved/restored
callee saved registers as pristine just works.

Differential Revision: http://reviews.llvm.org/D10101

llvm-svn: 238524
2015-05-28 23:20:35 +00:00
Alex Lorenz
8269eba38f MIR Serialization: print and parse machine function names.
This commit introduces a serializable structure called
'llvm::yaml::MachineFunction' that stores the machine
function's name. This structure will mirror the machine 
function's state in the future.

This commit prints machine functions as YAML documents
containing a YAML mapping that stores the state of a machine
function. This commit also parses the YAML documents
that contain the machine functions.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D9841

llvm-svn: 238519
2015-05-28 22:41:12 +00:00
Reid Kleckner
711f4eb0a1 [WinEH] Start inserting state number stores for C++ EH
This moves all the state numbering code for C++ EH to WinEHPrepare so
that we can call it from the X86 state numbering IR pass that runs
before isel.

Now we just call the same state numbering machinery and insert a bunch
of stores. It also populates MachineModuleInfo with information about
the current function.

llvm-svn: 238514
2015-05-28 22:00:24 +00:00
Duncan P. N. Exon Smith
9ba8af76a1 AsmPrinter: Stop exposing underlying DIE children list, NFC
Update `DIE` API to hide the implementation of `DIE::Children` so we can
swap it out.

llvm-svn: 238468
2015-05-28 19:56:34 +00:00
Duncan P. N. Exon Smith
0c791a688f AsmPrinter: Rename begin_values() => values_begin(), NFC
llvm-svn: 238456
2015-05-28 18:55:38 +00:00
Owen Anderson
e507d8cb77 Add support for the convergent flag at the MC and MachineInstr levels.
llvm-svn: 238450
2015-05-28 18:33:39 +00:00
Duncan P. N. Exon Smith
6869f59e40 AsmPrinter: Suppress warnings on GCC from r238362, NFC
GCC seems to have some overzealous warnings about strict aliasing.
Rafael reports that this patch suppresses them on GCC 4.9, and I'm
hoping this will work for GCC 4.7 as well.  I'll watch [1] and iterate
if necessary.

[1]: http://bb.pgr.jp/builders/clang-3stage-x86_64-linux/builds/8597

llvm-svn: 238447
2015-05-28 18:09:13 +00:00
Duncan P. N. Exon Smith
78ae127736 AsmPrinter: Return added DIE from DIE::addChild()
Change `DIE::addChild()` to return a reference to the just-added node,
and update consumers to use it directly.  An upcoming commit will
abstract away (and eventually change) the underlying storage of
`DIE::Children`.

llvm-svn: 238372
2015-05-27 22:59:03 +00:00
Duncan P. N. Exon Smith
287e807ffb AsmPrinter: Stop exposing underlying DIEValue list, NFC
Change the `DIE` API to hide the implementation of the list of
`DIEValue`s.

llvm-svn: 238369
2015-05-27 22:44:06 +00:00
Duncan P. N. Exon Smith
c4e8cdcf10 AsmPrinter: Store abbreviation data directly in DIE and DIEValue
Stop storing a `DIEAbbrev` in `DIE`, since the data fits neatly inside
the `DIEValue` list.  Besides being a cleaner data structure (avoiding
the parallel arrays), this gives us more freedom to rearrange the
`DIEValue` list.

This fixes the temporary memory regression from 845 MB up to 879 MB, and
drops it further to 829 MB for a net memory decrease of around 1.9%
(incremental decrease around 5.7%).

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

llvm-svn: 238364
2015-05-27 22:31:41 +00:00
Duncan P. N. Exon Smith
65e3562960 Reapply "AsmPrinter: Change DIEValue to be stored by value"
This reverts commit r238350, effectively reapplying r238349 after fixing
(all?) the problems, all somehow related to how I was using
`AlignedArrayCharUnion<>` inside `DIEValue`:

  - MSVC can only handle `sizeof()` on types, not values.  Change the
    assert.
  - GCC doesn't know the `is_trivially_copyable` type trait.  Instead of
    asserting it, add destructors.
  - Call placement new even when constructing POD (i.e., the pointers).
  - Instead of copying the char buffer, copy the casted classes.

I've left in a couple of `static_assert`s that I think both MSVC and GCC
know how to handle.  If the bots disagree with me, I'll remove them.

  - Check that the constructed type is either standard layout or a
    pointer.  This protects against a programming error: we really want
    the "small" `DIEValue`s to be small and simple, so don't
    accidentally change them not to be.
  - Similarly, check that the size of the buffer is no bigger than a
    `uint64_t` or a pointer.  (I thought checking against
    `sizeof(uint64_t)` would be good enough, but Chandler suggested that
    pointers might sometimes be bigger than that in the context of
    sanitizers.)

I've also committed r238359 in the meantime, which introduces a
DIEValue.def to simplify dispatching between the various types (thanks
to a review comment by David Blaikie).  Without that, this commit would
be almost unintelligible.

Here's the original commit message:
--
Change `DIEValue` to be stored/passed/etc. by value, instead of
reference.  It's now a discriminated union, with a `Val` field storing
the actual type.  The classes that used to inherit from `DIEValue` no
longer do.  There are two categories of these:

  - Small values fit in a single pointer and are stored by value.
  - Large values require auxiliary storage, and are stored by reference.

The only non-mechanical change is to tools/dsymutil/DwarfLinker.cpp.  It
was relying on `DIEInteger`s being passed around by reference, so I
replaced that assumption with a `PatchLocation` type that stores a safe
reference to where the `DIEInteger` lives instead.

This commit causes a temporary regression in memory usage, since I've
left merging `DIEAbbrevData` into `DIEValue` for a follow-up commit.  I
measured an increase from 845 MB to 879 MB, around 3.9%.  The follow-up
drops it lower than the starting point, and I've only recently brought
the memory this low anyway, so I'm committing these changes separately
to keep them incremental.  (I also considered swapping the commits, but
the other one first would cause a lot more code churn.)

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)
--

llvm-svn: 238362
2015-05-27 22:14:58 +00:00
Duncan P. N. Exon Smith
963930d2a6 AsmPrinter: Introduce DIEValue.def, NFC
Use a .def macro file to iterate through the various subclasses of
`DIEValue`.

llvm-svn: 238359
2015-05-27 21:15:43 +00:00
Duncan P. N. Exon Smith
ce281b5177 Revert "AsmPrinter: Change DIEValue to be stored by value"
This reverts commit r238349, since it caused some errors on bots:
  - std::is_trivially_copyable isn't available until GCC 5.0.
  - It was complaining about strict aliasing with my use of
    ArrayCharUnion.

llvm-svn: 238350
2015-05-27 19:30:27 +00:00
Duncan P. N. Exon Smith
c8fd56ec31 AsmPrinter: Change DIEValue to be stored by value
Change `DIEValue` to be stored/passed/etc. by value, instead of
reference.  It's now a discriminated union, with a `Val` field storing
the actual type.  The classes that used to inherit from `DIEValue` no
longer do.  There are two categories of these:

  - Small values fit in a single pointer and are stored by value.
  - Large values require auxiliary storage, and are stored by reference.

The only non-mechanical change is to tools/dsymutil/DwarfLinker.cpp.  It
was relying on `DIEInteger`s being passed around by reference, so I
replaced that assumption with a `PatchLocation` type that stores a safe
reference to where the `DIEInteger` lives instead.

This commit causes a temporary regression in memory usage, since I've
left merging `DIEAbbrevData` into `DIEValue` for a follow-up commit.  I
measured an increase from 845 MB to 879 MB, around 3.9%.  The follow-up
drops it lower than the starting point, and I've only recently brought
the memory this low anyway, so I'm committing these changes separately
to keep them incremental.  (I also considered swapping the commits, but
the other one first would cause a lot more code churn.)

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

llvm-svn: 238349
2015-05-27 19:22:50 +00:00
Duncan P. N. Exon Smith
ceedfec2fb AsmPrinter: Reorganize DIE.h, NFC
An upcoming commit will switch to storing `DIEValue`s by value in a
`DIE`, so move the `DIE` down below all the subclasses it can.  Two
subclasses inherit from `DIE`, so drop those down below `DIE`.

`DIEValue` will become a discriminated union, which contains an instance
of one of the classes that are currently subclasses.  "Big" ones, such
as those that inherit from `DIE`, will continue to be stored by pointer.
This commit does as much of the code motion ahead of time as possible.

llvm-svn: 238346
2015-05-27 18:49:38 +00:00
Alex Lorenz
b5ebbcd330 Resubmit r237954 (MIR Serialization: print and parse LLVM IR using MIR format).
This commit a 3rd attempt at comitting the initial MIR serialization patch.
The first commit (r237708) was reverted in 237730. Then the second commit
(r237954) was reverted in r238007, as the MIR library under CodeGen caused
a circular dependency where the CodeGen library depended on MIR and MIR
library depended on CodeGen.

This commit has fixed the dependencies between CodeGen and MIR by
reorganizing the MIR serialization code - the code that prints out
MIR has been moved to CodeGen, and the MIR library has been renamed
to MIRParser. Now the CodeGen library doesn't depend on the
MIRParser library, thus the circular dependency no longer exists.

--Original Commit Message--

MIR Serialization: print and parse LLVM IR using MIR format.

This commit is the initial commit for the MIR serialization project.
It creates a new library under CodeGen called 'MIR'. This new
library adds a new machine function pass that prints out the LLVM IR
using the MIR format. This pass is then added as a last pass when a
'stop-after' option is used in llc. The new library adds the initial
functionality for parsing of MIR files as well. This commit also
extends the llc tool so that it can recognize and parse MIR input files.

Reviewers: Duncan P. N. Exon Smith, Matthias Braun, Philip Reames

Differential Revision: http://reviews.llvm.org/D9616 

llvm-svn: 238341
2015-05-27 18:02:19 +00:00
Matthias Braun
d199caeaa9 MachineBasicBlock: Cleanup computeRegisterLiveness()
- Clean documentation comment
- Change the API to accept an iterator so you can actually pass
  MachineBasicBlock::end() now.
- Add more "const".

llvm-svn: 238288
2015-05-27 05:12:39 +00:00
Akira Hatanaka
6f08fc2ca6 Remove NoFramePointerElim and NoFramePointerElimOverride from TargetOptions and
remove ExecutionEngine's dependence on CodeGen. NFC.

This is a follow-up to r238080.

Differential Revision: http://reviews.llvm.org/D9830

llvm-svn: 238244
2015-05-26 20:17:20 +00:00
Matt Arsenault
9b6718f328 Make EmitFunctionHeader virtual
This is to fix problems introduced by r232481. For HSAIL,
this function does essentially nothing desirable, and
injects unwanted / incorrect stuff before the function.
The only thing it really needs to do is call EmitFunctionEntryLabel
in this case.

llvm-svn: 238222
2015-05-26 17:33:15 +00:00
NAKAMURA Takumi
f5fce1248c Prune CRLFs.
llvm-svn: 238125
2015-05-25 01:43:23 +00:00
Duncan P. N. Exon Smith
7d1c798112 AsmPrinter: Make DIEValue::Ty private, NFC
llvm-svn: 238123
2015-05-24 17:03:15 +00:00
Duncan P. N. Exon Smith
018e1309ce AsmPrinter: Avoid creating symbols in DwarfStringPool
Stop creating symbols we don't need in `DwarfStringPool`.  The consumers
only call `DwarfStringPoolEntryRef::getSymbol()` when DWARF is
relocatable, so this just stops creating the unused symbols when it's
not.  This drops memory usage from 851 MB to 845 MB, around 0.7%.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

llvm-svn: 238122
2015-05-24 16:58:59 +00:00
Duncan P. N. Exon Smith
34971e156b AsmPrinter: Avoid EmitLabelDifference() in DwarfAccelTable
Mint a new function, `AsmPrinter::emitDwarfStringOffset()`, which takes
a `DwarfStringPoolEntryRef`.  When DWARF is relocatable across sections,
this defers to `emitSectionOffset()` and emits the `MCSymbol`;
otherwise, just emit the offset directly, without using any intermediate
symbols.

`EmitLabelDifference()` is already optimized to emit absolute label
differences cheaply when possible, so there aren't any major memory
savings here (853 MB down to 851 MB, or 0.2%).  However, it prepares for
making the `MCSymbol`s in the `DwarfStringPool` optional.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

llvm-svn: 238119
2015-05-24 16:48:54 +00:00
Duncan P. N. Exon Smith
017697dbaf AsmPrinter: Use DwarfStringPoolEntry in DwarfAccelTable, NFC
This is just an API change, but it prepares to stop using
`EmitLabelDifference()` when possible.

llvm-svn: 238118
2015-05-24 16:44:32 +00:00
Duncan P. N. Exon Smith
1a688379a8 AsmPrinter: Make DIEString small
Expose the `DwarfStringPool` entry in a header, and store a pointer to
it directly in `DIEString`.  Instead of choosing at creation time how to
emit it, use the `dwarf::Form` to determine that at emission time.
Besides avoiding the other `DIEValue`, this shaves two pointers off of
`DIEString`; the data is now a single pointer.  This is a nice cleanup
on its own -- and drops memory usage from 861 MB down to 853 MB, around
0.9% -- but it's also preparation for passing `DIEValue`s by value.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

llvm-svn: 238117
2015-05-24 16:40:47 +00:00
Duncan P. N. Exon Smith
11482e6ab1 AsmPrinter: Extract DwarfStringPoolEntry from DwarfStringPool, NFC
Extract out `DwarfStringPoolEntry` and `DwarfStringPoolRef` from
`DwarfStringPool` so that downstream users can start using
`DwarfStringPool::getEntry()` directly.  This will allow users to delay
the decision between emitting a symbol or an offset until later.

llvm-svn: 238116
2015-05-24 16:33:33 +00:00
Duncan P. N. Exon Smith
9252f8630f AsmPrinter: Remove the vtable-entry from DIEValue
Remove all virtual functions from `DIEValue`, dropping the vtable
pointer from its layout.  Instead, create "impl" functions on the
subclasses, and use the `DIEValue::Type` to implement the dynamic
dispatch.

This is necessary -- obviously not sufficient -- for passing `DIEValue`s
around by value.  However, this change stands on its own: we make tons
of these.  I measured a drop in memory usage from 888 MB down to 860 MB,
or around 3.2%.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

llvm-svn: 238084
2015-05-23 01:45:07 +00:00
Duncan P. N. Exon Smith
c9056c2399 CodeGen: Remove redundant DIETypeSignature::dump(), NFC
We already have this in `DIEValue`; no reason to shadow it.

llvm-svn: 238082
2015-05-23 01:26:26 +00:00
Akira Hatanaka
626316f0c3 Stop resetting NoFramePointerElim in TargetMachine::resetTargetOptions.
This is part of the work to remove TargetMachine::resetTargetOptions.

In this patch, instead of updating global variable NoFramePointerElim in
resetTargetOptions, its use in DisableFramePointerElim is replaced with a call
to TargetFrameLowering::noFramePointerElim. This function determines on a
per-function basis if frame pointer elimination should be disabled.

There is no change in functionality except that cl:opt option "disable-fp-elim"
can now override function attribute "no-frame-pointer-elim". 

llvm-svn: 238080
2015-05-23 01:14:08 +00:00
Akira Hatanaka
c7f329a550 Simplify and rename function overrideFunctionAttributes. NFC.
This is in preparation to making changes needed to stop resetting
NoFramePointerElim in resetTargetOptions.

llvm-svn: 238079
2015-05-23 01:12:26 +00:00
Rafael Espindola
693b117a0a Revert "make reciprocal estimate code generation more flexible by adding command-line options"
This reverts commit r238051.

It broke some bots:

http://lab.llvm.org:8011/builders/llvm-ppc64-linux1/builds/18190

llvm-svn: 238075
2015-05-23 00:22:44 +00:00
Sanjay Patel
d16f201696 make reciprocal estimate code generation more flexible by adding command-line options
This patch adds a class for processing many recip codegen possibilities.
The TargetRecip class is intended to handle both command-line options to llc as well
as options passed in from a front-end such as clang with the -mrecip option.

The x86 backend is updated to use the new functionality.
Only -mcpu=btver2 with -ffast-math should see a functional change from this patch.
All other CPUs continue to *not* use reciprocal estimates by default with -ffast-math.

Differential Revision: http://reviews.llvm.org/D8982

llvm-svn: 238051
2015-05-22 21:10:06 +00:00
Sanjay Patel
e25813a137 remove names from comments, fix typos; NFC
llvm-svn: 238027
2015-05-22 15:38:24 +00:00