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3320 Commits

Author SHA1 Message Date
Dan Gohman
227e702cae Fix a tokenfactor node to use the load chain rather than the 
load value. This fixes PR2177.

llvm-svn: 48932
 2008-03-28 23:45:16 +00:00
Evan Cheng
10d0aba260 Backing out 48911 for now. It's breaking stuff. 
llvm-svn: 48922
 2008-03-28 17:49:06 +00:00
Evan Cheng
3b54c5fa08 New entry. 
llvm-svn: 48912
 2008-03-28 07:07:06 +00:00
Evan Cheng
d66e48366f Load from stub is already re-materializable. 
llvm-svn: 48911
 2008-03-28 06:49:25 +00:00
Evan Cheng
e66720fd57 Code clean up. 
llvm-svn: 48856
 2008-03-27 01:45:11 +00:00
Evan Cheng
aca67f0b29 Allow certain lea instructions to be rematerialized. 
llvm-svn: 48855
 2008-03-27 01:41:09 +00:00
Evan Cheng
1afaf3092f Remove an unused command line option. 
llvm-svn: 48854
 2008-03-27 01:30:24 +00:00
Roman Levenstein
55b8822511 Use a linked data structure for the uses lists of an SDNode, just like 
LLVM Value/Use does and MachineRegisterInfo/MachineOperand does.
This allows constant time for all uses list maintenance operations.

The idea was suggested by Chris. Reviewed by Evan and Dan.
Patch is tested and approved by Dan.

On normal use-cases compilation speed is not affected. On very big basic
blocks there are compilation speedups in the range of 15-20% or even better. 

llvm-svn: 48822
 2008-03-26 12:39:26 +00:00
Evan Cheng
6323ea8467 Fix some SSE4.1 instruction encoding bugs. 
llvm-svn: 48815
 2008-03-26 08:11:49 +00:00
Dale Johannesen
8c1e95810f Use ## for comment delimiter on darwin x86-32, so 
llvm's output .s files will go through gcc -std=c99
without triggering preprocesser errors.  Approach
suggested by Daveed Vandevoorde.

llvm-svn: 48808
 2008-03-25 23:29:30 +00:00
Evan Cheng
6226a78cb1 Smaller function alignment when optimizing for size. 
llvm-svn: 48805
 2008-03-25 22:29:46 +00:00
Dan Gohman
2b96ce84aa Add explicit keywords. 
llvm-svn: 48801
 2008-03-25 22:06:05 +00:00
Dan Gohman
22002efa15 A quick nm audit turned up several fixed tables and objects that were 
marked read-write. Use const so that they can be allocated in a
read-only segment.

llvm-svn: 48800
 2008-03-25 21:45:14 +00:00
Dan Gohman
58ad056286 Add CMP32mr and friends to the load-unfolding table. Among 
other things, this allows the scheduler to unfold a load operand
in the 2008-01-08-SchedulerCrash.ll testcase, so it now successfully
clones the comparison to avoid a pushf+popf.

llvm-svn: 48777
 2008-03-25 16:53:19 +00:00
Evan Cheng
dbdf48276a - SSE4.1 extractfps extracts a f32 into a gr32 register. Very useful! Not. Fix the instruction specification and teaches lowering code to use it only when the only use is a store instruction. 
llvm-svn: 48746
 2008-03-24 21:52:23 +00:00
Evan Cheng
14c5714421 Remove duplicated entries. 
llvm-svn: 48714
 2008-03-23 22:56:07 +00:00
Anton Korobeynikov
49574852c1 Minor typo fixes. Also add another FIXME. 
llvm-svn: 48710
 2008-03-23 20:32:06 +00:00
Anton Korobeynikov
7a1df26c95 Add license header 
llvm-svn: 48707
 2008-03-23 14:53:18 +00:00
Anton Korobeynikov
005dbb191c Add Win64 compilation callback. This allows easy examples to be JITed on Win64! 
llvm-svn: 48706
 2008-03-23 14:44:32 +00:00
Anton Korobeynikov
e07c433652 Provide a JIT selector on win64 
llvm-svn: 48704
 2008-03-23 13:43:47 +00:00
Anton Korobeynikov
8fda34a926 Hack out the PIC mode on Win64 targets. This needs to be investigated later. 
llvm-svn: 48703
 2008-03-23 13:41:18 +00:00
Anton Korobeynikov
7c5f998b22 Code cleanup. Provide generic way of selecting JIT pointer bitwidth regardless 
of compiler used.

llvm-svn: 48702
 2008-03-23 13:40:45 +00:00
Anton Korobeynikov
23d188b49c Remove old-standing obsolete code. 
llvm-svn: 48701
 2008-03-23 12:32:54 +00:00
Anton Korobeynikov
95f522419c Honour built-in defines on win64 targets for automatically subtarget recognize. 
Force stack alignment to 16 bytes on win targets.

llvm-svn: 48695
 2008-03-22 21:18:22 +00:00
Anton Korobeynikov
befd472d5e Recognize "windows" in target triple, not only "win32" 
llvm-svn: 48694
 2008-03-22 21:12:53 +00:00
Anton Korobeynikov
dbde70d7d6 Add information about callee-saved registers on Win64 
llvm-svn: 48692
 2008-03-22 21:04:01 +00:00
Anton Korobeynikov
dad919f561 Add convenient helper for win64 check. Simplify things slightly. 
llvm-svn: 48691
 2008-03-22 20:57:27 +00:00
Anton Korobeynikov
27c8ad4020 Initial support for Win64 calling conventions. Still in early state. 
llvm-svn: 48690
 2008-03-22 20:37:30 +00:00
Anton Korobeynikov
4b85ece1ab Another comments fixing 
llvm-svn: 48683
 2008-03-22 07:53:40 +00:00
Chris Lattner
308a452c90 Restore this assert now that the livevar bug is fixed. 
This verifies kill info for "ret" fp operands is right.

llvm-svn: 48656
 2008-03-21 20:41:27 +00:00
Duncan Sands
4153fc30c9 Introduce a new node for holding call argument 
flags.  This is needed by the new legalize types
infrastructure which wants to expand the 64 bit
constants previously used to hold the flags on
32 bit machines.  There are two functional changes:
(1) in LowerArguments, if a parameter has the zext
attribute set then that is marked in the flags;
before it was being ignored; (2) PPC had some bogus
code for handling two word arguments when using the
ELF 32 ABI, which was hard to convert because of
the bogusness.  As suggested by the original author
(Nicolas Geoffray), I've disabled it for the moment.
Tested with "make check" and the Ada ACATS testsuite.

llvm-svn: 48640
 2008-03-21 09:14:45 +00:00
Chris Lattner
edfc239ced remove Evan's "ugly hack" that sorta attempted to get 
x86-64 return conventions correct, but was never enabled.
We can now do the "right thing" with multiple return values.

llvm-svn: 48635
 2008-03-21 06:50:21 +00:00
Chris Lattner
8a4fa95cae Add support for calls that return two FP values in 
ST(0)/ST(1).

llvm-svn: 48634
 2008-03-21 06:38:26 +00:00
Chris Lattner
933d0d318b disable a bogus assertion. 
llvm-svn: 48633
 2008-03-21 06:01:05 +00:00
Chris Lattner
260473f983 Enable support for returning two long-double values in ST(0)/ST(1). 
This allows us to compile fp-stack-2results.ll into:

_test:
	fldz
	fld1
	ret

which returns 1 in ST(0) and 0 in ST(1).  This is needed for x86-64
_Complex long double.

llvm-svn: 48632
 2008-03-21 05:57:20 +00:00
Evan Cheng
4ae9fee64c Undo 48570. Correctly match mmx shift instructions with an immediate operand. 
llvm-svn: 48627
 2008-03-21 00:40:09 +00:00
Evan Cheng
8ecb189245 Fix this xform: (sra (shl X, m), result_size) -> (sign_extend (trunc (shl X, result_size - n - m))) 
llvm-svn: 48578
 2008-03-20 02:18:41 +00:00
Evan Cheng
6f729b2820 Add intrinsics to match mmx shift builtin's with immediate operand. 
llvm-svn: 48569
 2008-03-19 23:38:52 +00:00
Arnold Schwaighofer
19a78545d9 Don't loose incoming argument registers. Fix documentation style. 
llvm-svn: 48545
 2008-03-19 16:39:45 +00:00
Christopher Lamb
958b0494c3 Fix X86's isTruncateFree to not claim that truncate to i1 is free. This fixes Bill's testcase that failed for r48491. 
llvm-svn: 48542
 2008-03-19 08:30:06 +00:00
Bill Wendling
7ae70d6441 On Darwin, GCC issues a ".globl" for something that has a "visibility protected" 
attribute instead of ".protected".

llvm-svn: 48516
 2008-03-18 23:38:12 +00:00
Evan Cheng
5ac87b837e Fix a x86-64 isel lowering bug that's been around forever. A x86-64 varargs function implicitly reads X86::AL, don't clobber it! 
llvm-svn: 48515
 2008-03-18 23:36:35 +00:00
Evan Cheng
07643ce604 Unbreak JIT. Ignore TargetInstrInfo::IMPLICIT_DEF. 
llvm-svn: 48447
 2008-03-17 06:56:52 +00:00
Nate Begeman
f9691b8236 Add a couple missing SSE4 instructions 
llvm-svn: 48430
 2008-03-16 21:14:46 +00:00
Christopher Lamb
b4f4b41048 Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register. 
llvm-svn: 48412
 2008-03-16 03:12:01 +00:00
Evan Cheng
11d2c09adc Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF. 
llvm-svn: 48380
 2008-03-15 00:03:38 +00:00
Evan Cheng
877c5ecabd Fix some 80 col violations. 
llvm-svn: 48361
 2008-03-14 07:46:48 +00:00
Evan Cheng
fc6645a382 Fix a number of encoding bugs. SSE 4.1 instructions MPSADBWrri, PINSRDrr, etc. have 8-bits immediate field (ImmT == Imm8). 
llvm-svn: 48360
 2008-03-14 07:39:27 +00:00
Evan Cheng
6ef1ca4e87 Add debugging stuff. 
llvm-svn: 48359
 2008-03-14 07:13:42 +00:00
Chris Lattner
c60749aa4c Add an issue that is preventing instcombine from doing a simplification. 
llvm-svn: 48356
 2008-03-14 06:00:19 +00:00
Christopher Lamb
0f1c32eb63 Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects. 
Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes.
llvm-svn: 48329
 2008-03-13 05:47:01 +00:00
Chris Lattner
7925cc72c0 Reimplement the parameter attributes support, phase #1. hilights: 
1. There is now a "PAListPtr" class, which is a smart pointer around
   the underlying uniqued parameter attribute list object, and manages
   its refcount.  It is now impossible to mess up the refcount.
2. PAListPtr is now the main interface to the underlying object, and
   the underlying object is now completely opaque.
3. Implementation details like SmallVector and FoldingSet are now no
   longer part of the interface.
4. You can create a PAListPtr with an arbitrary sequence of
   ParamAttrsWithIndex's, no need to make a SmallVector of a specific 
   size (you can just use an array or scalar or vector if you wish).
5. All the client code that had to check for a null pointer before
   dereferencing the pointer is simplified to just access the 
   PAListPtr directly.
6. The interfaces for adding attrs to a list and removing them is a
   bit simpler.

Phase #2 will rename some stuff (e.g. PAListPtr) and do other less 
invasive changes.

llvm-svn: 48289
 2008-03-12 17:45:29 +00:00
Evan Cheng
df92afe7d3 Clean up my own mess. 
X86 lowering normalize vector 0 to v4i32. However DAGCombine can fold (sub x, x) -> 0 after legalization. It can create a zero vector of a type that's not expected (e.g. v8i16). We don't want to disable the optimization since leaving a (sub x, x) is really bad. Add isel patterns for other types of vector 0 to ensure correctness. It's highly unlikely to happen other than in bugpoint reduced test cases.

llvm-svn: 48279
 2008-03-12 07:02:50 +00:00
Anton Korobeynikov
55f54ba252 Correctly propagate thread-local flag from aliasee to alias. This fixes PR2137 
llvm-svn: 48257
 2008-03-11 22:38:53 +00:00
Dan Gohman
8e3c88c4e9 Use PassManagerBase instead of FunctionPassManager for functions 
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.

llvm-svn: 48256
 2008-03-11 22:29:46 +00:00
Chris Lattner
fd2c24af72 Implement basic support for the 'f' register class constraint. This basically 
works, but probably won't if you mix it with 't' or 'u' yet.

llvm-svn: 48243
 2008-03-11 19:50:13 +00:00
Chris Lattner
4458eecb7a coalesce away 80-bit floating point copies. 
llvm-svn: 48241
 2008-03-11 19:30:09 +00:00
Chris Lattner
aa2287714e convert a massive if statement to a switch. 
llvm-svn: 48240
 2008-03-11 19:28:17 +00:00
Chris Lattner
b3fefb1e5c start handling the 'f' x87 constraint. 
llvm-svn: 48239
 2008-03-11 19:06:29 +00:00
Christopher Lamb
4d5034cf91 Missed part of recommit. 
llvm-svn: 48224
 2008-03-11 10:27:36 +00:00
Christopher Lamb
74f4d837df Recommitting parts of r48130. These do not appear to cause the observed failures. 
llvm-svn: 48223
 2008-03-11 10:09:17 +00:00
Evan Cheng
53213ba056 In 32-bit mode, mark 64-bit GPR's as unallocatable. 
llvm-svn: 48217
 2008-03-11 07:16:00 +00:00
Nick Lewycky
02e4d6f2dd Fix the build on gcc 4.2. 
llvm-svn: 48212
 2008-03-11 05:56:09 +00:00
Chris Lattner
9826c9365e Change the model for FP Stack return to use fp operands on the 
RET instruction instead of using FpSET_ST0_32.  This also generalizes
the code to handling returning of multiple FP results.

llvm-svn: 48209
 2008-03-11 03:23:40 +00:00
Chris Lattner
d1a014af4e abort with an assert instead of a cerr to get line# 
llvm-svn: 48199
 2008-03-10 23:56:08 +00:00
Chris Lattner
f0684bfd16 Don't emit FP_REG_KILL into a block that just returns. Nothing 
can be live out of the block anyway, so it isn't needed.

llvm-svn: 48192
 2008-03-10 23:34:12 +00:00
Chris Lattner
d393772580 Eliminate the FP_GET_ST0/FP_SET_ST0 target-specific dag nodes, just lower to 
copyfromreg/copytoreg instead.

llvm-svn: 48174
 2008-03-10 21:08:41 +00:00
Evan Cheng
7d9e5a7680 Default ISD::PREFETCH to expand. 
llvm-svn: 48169
 2008-03-10 19:38:10 +00:00
Evan Cheng
067ecbc341 Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests. 
llvm-svn: 48167
 2008-03-10 19:31:26 +00:00
Scott Michel
bb8e8fca47 Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's 
return ValueType can depend its operands' ValueType.

This is a cosmetic change, no functionality impacted.

llvm-svn: 48145
 2008-03-10 15:42:14 +00:00
Christopher Lamb
32e5ce3d96 Allow insert_subreg into implicit, target-specific values. 
Change insert/extract subreg instructions to be able to be used in TableGen patterns.
Use the above features to reimplement an x86-64 pseudo instruction as a pattern.

llvm-svn: 48130
 2008-03-10 06:12:08 +00:00
Dale Johannesen
e6b0009792 Increase ISD::ParamFlags to 64 bits. Increase the ByValSize 
field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff.  Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and 
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)

llvm-svn: 48122
 2008-03-10 02:17:22 +00:00
Chris Lattner
b6bfedbcfd teach X86InstrInfo::copyRegToReg how to copy into ST(0) from 
an RFP register class.

Teach ScheduleDAG how to handle CopyToReg with different src/dst 
reg classes.

This allows us to compile trivial inline asms that expect stuff
on the top of x87-fp stack.

llvm-svn: 48107
 2008-03-09 09:15:31 +00:00
Chris Lattner
b29a963cf5 add some code to support cross-register class copying from 
RST -> RFP{32/64/80}.  We only handle ST(0) for now.

llvm-svn: 48104
 2008-03-09 08:46:19 +00:00
Chris Lattner
53b86390b7 rearrange some code, no functionality change. 
llvm-svn: 48101
 2008-03-09 07:58:04 +00:00
Chris Lattner
71189e9501 claim ST(x) registers are 80 bits, which is true. This doesn't affect 
codegen yet because these can't be spilled (they don't exist until after RA).

llvm-svn: 48098
 2008-03-09 07:49:01 +00:00
Chris Lattner
2e7537b60b rename FP_SETRESULT -> FP_SET_ST0 
llvm-svn: 48094
 2008-03-09 07:08:44 +00:00
Chris Lattner
826402e365 rename FpGETRESULT32 -> FpGET_ST0_32 etc. Add support for 
isel'ing value preserving FP roundings from one fp stack reg to another
into a noop, instead of stack traffic.

llvm-svn: 48093
 2008-03-09 07:05:32 +00:00
Chris Lattner
b628208161 Finish implementing a readme entry: when inserting an i64 variable 
into a vector of zeros or undef, and when the top part is obviously
zero, we can just use movd + shuffle.  This allows us to compile
vec_set-B.ll into:

_test3:
	movl	$1234567, %eax
	andl	4(%esp), %eax
	movd	%eax, %xmm0
	ret

instead of:

_test3:
	subl	$28, %esp
	movl	$1234567, %eax
	andl	32(%esp), %eax
	movl	%eax, (%esp)
	movl	$0, 4(%esp)
	movq	(%esp), %xmm0
	addl	$28, %esp
	ret

llvm-svn: 48090
 2008-03-09 05:42:06 +00:00
Chris Lattner
b741ebba29 add a note 
llvm-svn: 48064
 2008-03-09 01:08:22 +00:00
Chris Lattner
17f68a3075 Implement a readme entry, compiling 
#include <xmmintrin.h>
__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);}

into:
	movl	$1, %eax
	movd	%eax, %xmm0
	ret

instead of a constant pool load.

llvm-svn: 48063
 2008-03-09 01:05:04 +00:00
Chris Lattner
81deb3bc9c 1) Improve comments. 
2) Don't try to insert an i64 value into the low part of a 
   vector with movq on an x86-32 target.  This allows us to 
   compile:

__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);}

into:

_doload64:
	movaps	LCPI1_0, %xmm0
	ret

instead of:

_doload64:
	subl	$28, %esp
	movl	$0, 4(%esp)
	movl	$1, (%esp)
	movq	(%esp), %xmm0
	addl	$28, %esp
	ret

llvm-svn: 48057
 2008-03-08 22:59:52 +00:00
Chris Lattner
405f2c6356 minor simplifications to this code, don't create a dead 
SCALAR_TO_VECTOR on paths that end up not using it.

llvm-svn: 48056
 2008-03-08 22:48:29 +00:00
Chris Lattner
ff9dc0af80 This one looks easy, add a note. 
llvm-svn: 48055
 2008-03-08 22:32:39 +00:00
Chris Lattner
b12697f8bb move these to the appropriate file 
llvm-svn: 48054
 2008-03-08 22:28:45 +00:00
Evan Cheng
dba1dfe962 Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions. 
llvm-svn: 48042
 2008-03-08 00:58:38 +00:00
Chris Lattner
aa81dc7d21 mark frem as expand for all legal fp types on x86, regardless of whether 
we're using SSE or not.  This fixes PR2122.

llvm-svn: 48006
 2008-03-07 06:36:32 +00:00
Gabor Greif
92e00c1e50 some more spelling changes 
llvm-svn: 47996
 2008-03-06 10:51:21 +00:00
Chris Lattner
83e0b885f8 evan implemented this. 
llvm-svn: 47948
 2008-03-05 17:11:51 +00:00
Evan Cheng
a36562006a isTwoAddress = 1 -> Constraints. 
llvm-svn: 47941
 2008-03-05 08:19:16 +00:00
Evan Cheng
6c2bb7c67e PSLLWri etc. are two-address instructions. 
llvm-svn: 47940
 2008-03-05 08:11:27 +00:00
Chris Lattner
7571a88209 add a note 
llvm-svn: 47939
 2008-03-05 07:22:39 +00:00
Evan Cheng
d421708e35 Ignore debugging related instructions if they get this far. 
llvm-svn: 47934
 2008-03-05 02:34:36 +00:00
Evan Cheng
a2939a16de Rather than asserting. Dump out the MI that we are not able to encode and abort. 
llvm-svn: 47933
 2008-03-05 02:08:03 +00:00
Evan Cheng
e0b3c221ab Add a target lowering hook to control whether it's worthwhile to compress fp constant. 
For x86, if sse2 is available, it's not a good idea since cvtss2sd is slower than a movsd load and it prevents load folding. On x87, it's important to shrink fp constant since fldt is very expensive.

llvm-svn: 47931
 2008-03-05 01:30:59 +00:00
Andrew Lenharth
95c88272c6 64bit CAS on 32bit x86. 
llvm-svn: 47929
 2008-03-05 01:15:49 +00:00
Evan Cheng
18064ddb5b Refactor code. Remove duplicated functions that basically do the same thing as 
findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies.

llvm-svn: 47927
 2008-03-05 00:59:57 +00:00
Andrew Lenharth
f5674915c5 x86-64 atomics 
llvm-svn: 47903
 2008-03-04 21:13:33 +00:00
Evan Cheng
ae414db8d2 80 column violations. 
llvm-svn: 47878
 2008-03-04 03:20:06 +00:00
Evan Cheng
139517b682 Remove -always-fold-and-in-test. 
llvm-svn: 47871
 2008-03-04 00:40:35 +00:00
Dan Gohman
ccc0bc5878 Add support for lowering i64 SRA_PARTS and friends on x86-64. 
llvm-svn: 47865
 2008-03-03 22:22:09 +00:00
Devang Patel
d0d7028a2b s/isReturnStruct()/hasStructRetAttr()/g 
llvm-svn: 47857
 2008-03-03 21:46:28 +00:00
Chris Lattner
299977b5ca Evan implemented these. 
llvm-svn: 47828
 2008-03-02 18:05:14 +00:00
Andrew Lenharth
ba7f925582 good catch anton 
llvm-svn: 47800
 2008-03-01 23:18:21 +00:00
Andrew Lenharth
f6c220738c make CAS work 
llvm-svn: 47799
 2008-03-01 22:27:48 +00:00
Andrew Lenharth
b91c664226 all but CAS working on x86 
llvm-svn: 47798
 2008-03-01 21:52:34 +00:00
Andrew Lenharth
ad29a49169 Add lock prefix support to x86. Also add the instructions necessary for the atomic ops. They are still marked pseudo, since I cannot figure out what format to use, but they are the correct opcode. 
llvm-svn: 47795
 2008-03-01 13:37:02 +00:00
Anton Korobeynikov
875da2420a Use enumeration for preffered EH dwarf encoding reason 
llvm-svn: 47770
 2008-02-29 22:09:08 +00:00
Anders Carlsson
236f4dff95 Use the correct instruction encodings for the 64-bit MMX movd. 
llvm-svn: 47740
 2008-02-29 01:35:12 +00:00
Evan Cheng
ea1f2d1110 Added option -align-loops=<true/false> to disable loop aligner pass. 
llvm-svn: 47736
 2008-02-28 23:29:57 +00:00
Evan Cheng
e1d3e0958b Set to default: x86 no longer fold and into test if it has more than one use. 
llvm-svn: 47711
 2008-02-28 07:46:38 +00:00
Chris Lattner
33b1f491a0 Add a random not very important note 
llvm-svn: 47704
 2008-02-28 04:52:59 +00:00
Evan Cheng
f8b1257d2e Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries. 
llvm-svn: 47703
 2008-02-28 00:43:03 +00:00
Eli Friedman
912a1d48e1 A few more small things I've run into. 
llvm-svn: 47702
 2008-02-28 00:21:43 +00:00
Anton Korobeynikov
7bd4b77e30 Preparation step for some cleanup/generalization in EH information emission: 
provide TAI hook for selection of EH data emission format. Currently unused.

llvm-svn: 47699
 2008-02-27 23:33:50 +00:00
Evan Cheng
08f11a37d7 This is done. 
llvm-svn: 47688
 2008-02-27 20:26:32 +00:00
Chris Lattner
1f46cc2345 Make X86TargetLowering::LowerSINT_TO_FP return without creating a dead 
stack slot and store if the  SINT_TO_FP is actually legal.  This allows
us to compile:

double a(double b) {return (unsigned)b;}

to:

_a:
	cvttsd2siq	%xmm0, %rax
	movl	%eax, %eax
	cvtsi2sdq	%rax, %xmm0
	ret

instead of:

_a:
	subq	$8, %rsp
	cvttsd2siq	%xmm0, %rax
	movl	%eax, %eax
	cvtsi2sdq	%rax, %xmm0
	addq	$8, %rsp
	ret

crazy.

llvm-svn: 47660
 2008-02-27 05:57:41 +00:00
Chris Lattner
f19162a87f this code is correct but strange looking ;-) 
llvm-svn: 47659
 2008-02-27 05:48:44 +00:00
Chris Lattner
bc686e546a Compile x86-64-and-mask.ll into: 
_test:
	movl	%edi, %eax
	ret

instead of:

_test:
        movl    $4294967295, %ecx
        movq    %rdi, %rax
        andq    %rcx, %rax
        ret

It would be great to write this as a Pat pattern that used subregs 
instead of a 'pseudo' instruction, but I don't know how to do that
in td files.

llvm-svn: 47658
 2008-02-27 05:47:54 +00:00
Chris Lattner
a81d716e0c add a note 
llvm-svn: 47652
 2008-02-27 01:17:20 +00:00
Arnold Schwaighofer
642dc28734 Refactor according to Evan's and Anton's suggestions. 
llvm-svn: 47635
 2008-02-26 22:21:54 +00:00
Bill Wendling
50f5c4be14 Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool 
would have been a Godsend here!

llvm-svn: 47625
 2008-02-26 21:11:01 +00:00
Arnold Schwaighofer
7466041819 Correct function comments. 
llvm-svn: 47606
 2008-02-26 17:50:59 +00:00
Bill Wendling
16cba10ae6 De-tabify 
llvm-svn: 47600
 2008-02-26 10:57:23 +00:00
Arnold Schwaighofer
ddebd886dc Add support for intermodule tail calls on x86/32bit with 
GOT-style position independent code. Before only tail calls to
protected/hidden functions within the same module were optimized.
Now all function calls are tail call optimized.

llvm-svn: 47594
 2008-02-26 10:21:54 +00:00
Arnold Schwaighofer
6383666085 Change the lowering of arguments for tail call optimized 
calls. Before arguments that could overwrite each other were
explicitly lowered to a stack slot, not giving the register allocator
a chance to optimize. Now a sequence of copyto/copyfrom virtual
registers ensures that arguments are loaded in (virtual) registers
before they are lowered to the stack slot (and might overwrite each
other). Also parameter stack slots are marked mutable for
(potentially) tail calling functions.

llvm-svn: 47593
 2008-02-26 09:19:59 +00:00
Dan Gohman
b8e7fea22f Revert the assert for MUL_LOHI with an unused high result; Chris 
pointed out that this isn't correct at -O0.

llvm-svn: 47575
 2008-02-25 22:43:48 +00:00
Dale Johannesen
c67fa85683 Revise previous patch per review. 
llvm-svn: 47573
 2008-02-25 22:29:22 +00:00
Dan Gohman
2585bc7c46 Add an assert to verify that we don't see an 
{S,U}MUL_LOHI with an unused high value.

llvm-svn: 47569
 2008-02-25 22:15:55 +00:00
Dan Gohman
1914fa6932 Remove the hack that turned an {S,U}MUL_LOHI with an unused high 
result into a MUL late in the X86 codegen process. ISD::MUL is
once again Legal on X86, so this is no longer needed. And, the
hack was suboptimal; see PR1874 for details.

llvm-svn: 47567
 2008-02-25 21:57:04 +00:00
Dan Gohman
012abf0109 Convert MaskedValueIsZero and all its users to use APInt. Also add 
a SignBitIsZero function to simplify a common use case.

llvm-svn: 47561
 2008-02-25 21:11:39 +00:00
Dale Johannesen
574bb5e1e2 Expand removal of MMX memory copies to allow 1 level 
of TokenFactor underneath chain (seems to be enough)

llvm-svn: 47554
 2008-02-25 19:20:14 +00:00
Evan Cheng
d3e9e78aa0 Turning on remat of pic loads. 
llvm-svn: 47524
 2008-02-23 02:07:42 +00:00
Evan Cheng
97ca29e99a No need recognize load from a fixed argument slot as re-materializable. LiveIntervalAnalysis already handles it as a special case. 
llvm-svn: 47522
 2008-02-23 01:47:44 +00:00
Dale Johannesen
ae08bdb4cf Split ParameterAttributes.h, putting the complicated 
stuff into ParamAttrsList.h.  Per feedback from
ParamAttrs changes.

llvm-svn: 47504
 2008-02-22 22:17:59 +00:00
Dale Johannesen
23a6f7fc1f MMX vectors are passed 4-byte aligned. 
llvm-svn: 47483
 2008-02-22 17:47:28 +00:00
Evan Cheng
1b417c4d84 Allow re-materialization of pic load (controlled by -remat-pic-load for now). 
llvm-svn: 47476
 2008-02-22 09:25:47 +00:00
Chris Lattner
a64d4179d4 copy mmx values from/to memory with GPRs on x86-32 
instead of with mmx registers.  This horribleness is apparently
done by gcc to avoid having to insert emms in places that really 
should have it.  This is the second half of rdar://5741668.

llvm-svn: 47474
 2008-02-22 05:18:04 +00:00
Chris Lattner
e70bc39d74 Start using GPR's to copy around mmx value instead of mmx regs. 
GCC apparently does this, and code depends on not having to do
emms when this happens.  This is x86-64 only so far, second half
should handle x86-32.

rdar://5741668

llvm-svn: 47470
 2008-02-22 02:09:43 +00:00
Eli Friedman
123fc4b97d A few minor updates, removing implemented stuff and adding a couple of 
new things.

llvm-svn: 47458
 2008-02-21 21:16:49 +00:00
Chris Lattner
b25a98e364 Dan implemented one multiply issue. Replace it with another. :) 
llvm-svn: 47431
 2008-02-21 06:51:29 +00:00
Andrew Lenharth
db9cd46f5d Atomic op support. If any gcc test uses __sync builtins, it might start failing on archs that haven't implemented them yet 
llvm-svn: 47430
 2008-02-21 06:45:13 +00:00
Evan Cheng
f3a7cd1c62 Poorly named option. 
llvm-svn: 47400
 2008-02-20 20:57:32 +00:00
Anton Korobeynikov
c41f5b6af4 Fix newly-introduced 4.3 warnings 
llvm-svn: 47375
 2008-02-20 12:07:57 +00:00
Anton Korobeynikov
4f6e612973 Remove bunch of gcc 4.3-related warnings from Target 
llvm-svn: 47369
 2008-02-20 11:22:39 +00:00
Anton Korobeynikov
0c5e186924 Unbreak build with gcc 4.3: provide missed includes and silence most annoying warnings. 
llvm-svn: 47367
 2008-02-20 11:08:44 +00:00
Evan Cheng
e9708c997f Disable for now. This is pessimizing code. 
llvm-svn: 47354
 2008-02-20 02:29:17 +00:00
Evan Cheng
35253f2c22 Add hidden option -x86-fold-and-in-test to test the effect the test / and folding change. 
llvm-svn: 47351
 2008-02-19 23:36:51 +00:00
Chris Lattner
3a4ac3a69e Don't fold and's into test instructions if they have multiple uses. 
This compiles test-nofold.ll into:

_test:
	movl	$15, %ecx
	andl	4(%esp), %ecx
	testl	%ecx, %ecx
	movl	$42, %eax
	cmove	%ecx, %eax
	ret

instead of:
_test:
	movl	4(%esp), %eax
	movl	%eax, %ecx
	andl	$15, %ecx
	testl	$15, %eax
	movl	$42, %eax
	cmove	%ecx, %eax
	ret

llvm-svn: 47330
 2008-02-19 17:37:35 +00:00
Evan Cheng
ece0db124f Me not like duplicated comments. 
llvm-svn: 47300
 2008-02-19 02:05:16 +00:00