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Author SHA1 Message Date
Eli Friedman
ac33381aa1 Clean up uses of switch instructions so they are not dependent on the operand ordering. Patch by Stepan Dyatkovskiy. 
llvm-svn: 140803
 2011-09-29 20:21:17 +00:00
Devang Patel
e5a1e5b655 Simplify. 
llvm-svn: 140789
 2011-09-29 17:06:40 +00:00
Devang Patel
b1bef6ba30 Clarify comments. 
llvm-svn: 140787
 2011-09-29 16:52:53 +00:00
Devang Patel
0729c18444 Remove unnecessary and unused data member. 
llvm-svn: 140786
 2011-09-29 16:48:44 +00:00
Devang Patel
204df6030c Cosmetic changes, as per Nick's review. 
llvm-svn: 140785
 2011-09-29 16:46:47 +00:00
Duncan Sands
fbf3eb2e3e Place this bracket according to the LLVM style. 
llvm-svn: 140784
 2011-09-29 16:01:46 +00:00
Justin Holewinski
e429b56306 PTX: Fix broken shared library build 
llvm-svn: 140783
 2011-09-29 14:25:48 +00:00
Jakob Stoklund Olesen
76da38e8e8 Expand the x86 V_SET0* pseudos right after register allocation. 
This also makes it possible to reduce the number of pseudo instructions
and get rid of the encoding information.

llvm-svn: 140776
 2011-09-29 05:10:54 +00:00
NAKAMURA Takumi
f82662e1f6 Target/ARM: Unbreak! CMake! Build! 
llvm-svn: 140774
 2011-09-29 03:32:49 +00:00
Jakob Stoklund Olesen
a2a0ba4d56 Delete NEONMoveFix, now unused. 
llvm-svn: 140773
 2011-09-29 02:56:45 +00:00
Jakob Stoklund Olesen
cfd5280df5 Use ExecutionDepsFix instead of NEONMoveFix. 
This enables NEON domain tracking across basic blocks, but should
otherwise do the same thing.

llvm-svn: 140772
 2011-09-29 02:48:41 +00:00
Andrew Trick
fa2c108a22 typo + pasto 
llvm-svn: 140769
 2011-09-29 01:53:08 +00:00
Jakob Stoklund Olesen
49803374a4 Remove NumImplicitOps which is now unused. 
llvm-svn: 140767
 2011-09-29 01:47:36 +00:00
Andrew Trick
e1d5ae73ac LSR: rewrite inner loops only. 
Rewriting the entire loop nest now requires -enable-lsr-nested.
See PR11035 for some performance data.
A few unit tests specifically test nested LSR, and are now under a flag.

llvm-svn: 140762
 2011-09-29 01:33:38 +00:00
Andrew Trick
75c6a45d08 whitespace 
llvm-svn: 140761
 2011-09-29 01:31:48 +00:00
Andrew Trick
3f3416249a Fix build failures better. 
llvm-svn: 140758
 2011-09-29 01:22:31 +00:00
Daniel Dunbar
8b3e105420 Fix build failure. 
llvm-svn: 140755
 2011-09-29 01:14:42 +00:00
Bill Wendling
cc7e50a465 Move to ISelLowering. 
llvm-svn: 140754
 2011-09-29 01:13:55 +00:00
Justin Holewinski
4966d44b44 PTX: Add new patterns for bitconvert and any_extend 
llvm-svn: 140753
 2011-09-29 01:13:12 +00:00
Michael J. Spencer
3b747b0b5d llvm-size: Apply Chris's code review fixes. 
This doesn't use formated_raw_ostream because it doesn't support the
functionality needed.

llvm-svn: 140751
 2011-09-29 00:59:18 +00:00
Eric Christopher
70718394df Use the local we already set up. 
llvm-svn: 140745
 2011-09-29 00:50:59 +00:00
Jakob Stoklund Olesen
93b4947cff Rewrite MachineInstr::addOperand() to avoid NumImplicitOps. 
The function needs to scan the implicit operands anyway, so no
performance is won by caching the number of implicit operands added to
an instruction.

This also fixes a bug when adding operands after an implicit operand has
been added manually.  The NumImplicitOps count wasn't kept up to date.

MachineInstr::addOperand() will now consistently place all explicit
operands before all the implicit operands, regardless of the order they
are added.  It is possible to change an MI opcode and add additional
explicit operands.  They will be inserted before any existing implicit
operands.

The only exception is inline asm instructions where operands are never
reordered.  This is because of a hack that marks explicit clobber regs
on inline asm as <implicit-def> to please the fast register allocator.
This hack can go away when InstrEmitter and FastIsel can add exact
<dead> flags to physreg defs.

llvm-svn: 140744
 2011-09-29 00:40:51 +00:00
Daniel Dunbar
d499233312 tblgen/ClangDiagnostics: Add support for split default warning "no-werror" and 
"show-in-system-header" bits, which I will be adding in Clang shortly.

llvm-svn: 140741
 2011-09-29 00:29:04 +00:00
Jakob Stoklund Olesen
6cb1647b24 Revert r140731, "Define classes for unary and binary FP instructions and use them to define" 
It broke the unit tests.  Please reapply with tests fixed.

llvm-svn: 140735
 2011-09-28 23:59:28 +00:00
Evan Cheng
1e53900b70 Tighten a ARM dag combine condition to avoid an identity transformation, which 
ends up introducing a cycle in the DAG.

rdar://10196296

llvm-svn: 140733
 2011-09-28 23:16:31 +00:00
Akira Hatanaka
be2c5236ec Define classes for unary and binary FP instructions and use them to define 
multiclasses.

llvm-svn: 140731
 2011-09-28 21:58:01 +00:00
Bill Wendling
e26a78c400 Have the SjLjEHPrepare pass do some more heavy lifting. 
Upon further review, most of the EH code should remain written at the IR
level. The part which breaks SSA form is the dispatch table, so that part will
be moved to the back-end.

llvm-svn: 140730
 2011-09-28 21:56:53 +00:00
Michael J. Spencer
4dc1ab6c03 Fix cast. 
llvm-svn: 140726
 2011-09-28 21:24:44 +00:00
Eli Friedman
81fc13efd2 PR11033: Make sure we don't generate PCMPGTQ and PCMPEQQ if the target CPU does not support them. 
llvm-svn: 140723
 2011-09-28 21:00:25 +00:00
Michael J. Spencer
3e283fe7d4 Add llvm-size. 
llvm-svn: 140722
 2011-09-28 20:57:46 +00:00
Michael J. Spencer
5948c3822e Object: Add isSection{Data,BSS}. 
llvm-svn: 140721
 2011-09-28 20:57:30 +00:00
Eli Friedman
3b5162de17 NULL cannot be portably used as the last argument to a function with __attribute((sentinel)), even though it usually works. Use (void*)0 instead. PR11002. 
llvm-svn: 140720
 2011-09-28 20:41:50 +00:00
Bill Wendling
2400aacfb7 Perform the lowering only if there are invokes. 
llvm-svn: 140719
 2011-09-28 20:29:45 +00:00
Bill Wendling
37088b0660 Ahem...actually *add* the ARMSjLjLowering pass to the pass manager. 
llvm-svn: 140718
 2011-09-28 20:29:28 +00:00
Eric Christopher
c22f168cd8 Add a note on removing LLVMC. 
llvm-svn: 140715
 2011-09-28 19:47:28 +00:00
Devang Patel
3605f8423f Introduce llvm-cov. 
Add llvm-cov skeleton. It has initial support to read coverage info generated by GCOVProfiling.cpp. 
Today, you can do
prompt> clang a.c -ftest-coverage -fprofile-arcs -o a
prompt> ./a
prompt> llvm-cov -gcno a.gcno -gcda a.gcda 
a.c
 :	#include "a.h"
 :	
 :	int main() {
 :		int i = 0;
 :		if (i) {
1:			int j = 0;
1:			j = 1;
1:		} else {
 :			int k = 1;
 :			k = 2;
 :		}
1:		return 0;
 :	}
 :	
 :	

llvm-svn: 140712
 2011-09-28 18:50:00 +00:00
Justin Holewinski
f88506ac8d PTX: Fix alignment logic 
llvm-svn: 140709
 2011-09-28 18:24:58 +00:00
Akira Hatanaka
0510b9d75b Rename predicate In32BitMode to NotFP64bit and add definition of IsFP64bit. 
llvm-svn: 140705
 2011-09-28 18:11:19 +00:00
Akira Hatanaka
fa83d9ff16 Remove definitions of branch-on-FP-likely instructions. They are deprecated. 
llvm-svn: 140704
 2011-09-28 17:56:55 +00:00
Akira Hatanaka
2d08a7fd85 Mips64 predicate definitions. Patch by Liu. 
llvm-svn: 140703
 2011-09-28 17:50:27 +00:00
Andrew Trick
50915b5136 indvars: generalize SCEV getPreStartForSignExtend. 
Handle general Add expressions to avoid leaving around redundant
32-bit IVs.

llvm-svn: 140701
 2011-09-28 17:02:54 +00:00
Justin Holewinski
a68272b38f PTX: MC-ize the PTX backend (patch 2 of N) 
Get rid of some of the no-longer-needed parts of PTXAsmPrinter.

llvm-svn: 140698
 2011-09-28 14:32:06 +00:00
Justin Holewinski
2f96de340f PTX: MC-ize the PTX back-end (patch 1 of N) 
Lay some groundwork for converting to MC-based asm printer. This is the first
of probably many patches to bring the back-end back up-to-date with all of the
recent MC changes.

llvm-svn: 140697
 2011-09-28 14:32:04 +00:00
James Molloy
c4fcff419c Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit. 
Build on previous patches to successfully distinguish between an M-series and A/R-series MSR and MRS instruction. These take different mask names and have a *slightly* different opcode format.

Add decoder and disassembler tests.

Improvement on the previous patch - successfully distinguish between valid v6m and v7m masks (one is a subset of the other). The patch had to be edited slightly to apply to ToT.

llvm-svn: 140696
 2011-09-28 14:21:38 +00:00
Garrison Venn
473050b066 Changed comments on foreign C++ exceptions (generated with type info 7), 
handling with references to 
http://sourcery.mentor.com/public/cxx-abi/abi-eh.html (r 1.22).

llvm-svn: 140695
 2011-09-28 10:53:56 +00:00
Duncan Sands
638a8b94be A typeid of zero means a cleanup, not a catch. This case occurs 
when there is both a catch and a cleanup.  Correct the comment.

llvm-svn: 140686
 2011-09-28 09:13:02 +00:00
Benjamin Kramer
418d47fb38 PTX: Simplify code. No functionality change. 
llvm-svn: 140680
 2011-09-28 04:32:36 +00:00
Benjamin Kramer
e48bcfc038 PTX: Pass param name strings per const reference. 
The copies caused use-after-free bugs on std::string implementations without COW (i.e. anything but libstdc++)

llvm-svn: 140679
 2011-09-28 04:08:02 +00:00
Bill Wendling
8732528888 Strip off pointer casts when looking at the eh.sjlj.functioncontext's argument. 
llvm-svn: 140678
 2011-09-28 03:52:41 +00:00
Bill Wendling
7df5ebd83c Bitcast the alloca to an i8* to match the intrinsic's signature. 
llvm-svn: 140677
 2011-09-28 03:47:11 +00:00