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Author SHA1 Message Date
Chris Lattner
4f067261b6 so hey, it turns out that the histogram was completely wrong, because 
we sometimes emit nodes multiple times to string buffers to size them.
Compute the histogram correctly.

llvm-svn: 97708
 2010-03-04 01:34:29 +00:00
Evan Cheng
9120412740 Look ahead a bit to determine if a physical register def that is not marked dead is really alive. This is necessary to catch a lot of common cse opportunities for targets like x86. 
llvm-svn: 97706
 2010-03-04 01:33:55 +00:00
Chris Lattner
cf09c9dcef zap fixme. 
llvm-svn: 97705
 2010-03-04 01:26:00 +00:00
Chris Lattner
72df178091 now that complexpatterns are all emitted at the end of the match 
sequence, just emit instruction predicates right before them.  This
exposes yet more factoring opportunitites, shrinking the X86 table 
to 79144 bytes.

llvm-svn: 97704
 2010-03-04 01:25:36 +00:00
Chris Lattner
2bbca2de9e change the new isel matcher to emit ComplexPattern matches 
as the very last thing before node emission.  This should
dramatically reduce the number of times we do 'MatchAddress'
on X86, speeding up compile time.  This also improves comments
in the tables and shrinks the table a bit, now down to 
80506 bytes for x86.

llvm-svn: 97703
 2010-03-04 01:23:08 +00:00
Jeffrey Yasskin
15b3688e56 Make sure JITResolvers don't leave any stubs behind. When a JITResolver was 
destroyed, it could leave stubs in the StubToResolverMap, which would confuse
the lookup for subsequent lazy compilations.

llvm-svn: 97698
 2010-03-04 00:32:33 +00:00
Chris Lattner
87aaa6af4f enhance comment output to specify what recorded slot 
numbers a ComplexPat will match into.

llvm-svn: 97696
 2010-03-04 00:28:05 +00:00
Dan Gohman
9f6d374ab7 Fix more code to work properly with vector operands. Based on 
a patch my Micah Villmow for PR6465.

llvm-svn: 97692
 2010-03-04 00:23:16 +00:00
John McCall
282b01ff42 Teach the pic16 target to recognize pic16-*-* triples. 
llvm-svn: 97691
 2010-03-04 00:21:47 +00:00
Chris Lattner
19007009c8 inline CannotYetSelectIntrinsic into CannotYetSelect and simplify. 
llvm-svn: 97690
 2010-03-04 00:21:16 +00:00
Evan Cheng
9729f2a2b4 Fix a logic error. An instruction that has a live physical register def cannot be CSE'ed, but it *can* be used to replace a common subexpression. 
llvm-svn: 97688
 2010-03-03 23:59:08 +00:00
Evan Cheng
7310728cf9 Remove PHINodeTraits and use MachineInstrExpressionTrait instead. 
llvm-svn: 97687
 2010-03-03 23:55:49 +00:00
Erick Tryzelaar
0b21835716 Expose the rest of the llvm-c scalar opts to ocaml. 
llvm-svn: 97685
 2010-03-03 23:51:34 +00:00
Erick Tryzelaar
c99098f20d Rename some ocaml functions. 
llvm-svn: 97684
 2010-03-03 23:51:30 +00:00
Erick Tryzelaar
d513bd7f7d Expose the external functions for ocaml's execution engine as an optimization. 
llvm-svn: 97683
 2010-03-03 23:51:28 +00:00
Erick Tryzelaar
2825c880af Expose alignment and stack alignment attributes to llvm-c and ocaml. 
llvm-svn: 97682
 2010-03-03 23:51:25 +00:00
Evan Cheng
8c608dffd5 Move MachineInstrExpressionTrait::getHashValue() out of line so it can skip over only virtual register defs. This matches what isEqual() is doing. 
llvm-svn: 97680
 2010-03-03 23:37:30 +00:00
Evan Cheng
36a7a94029 Re-apply r97667 but with a little bit of thought put into the patch. This implements a special DenseMapInfo trait for DenseMap<MachineInstr*> that compare the value of the MachineInstr rather than the pointer value. Since the hashing and equality test functions ignore defs it's useful for doing CSE kind optimization. 
llvm-svn: 97678
 2010-03-03 23:27:36 +00:00
Johnny Chen
c903faa636 Modified the asm string of 16-bit Thumb MUL instruction so that it prints: 
MULS <Rdm>, <Rn>, <Rdm>

according to A8.6.105 MUL Encoding T1.

llvm-svn: 97675
 2010-03-03 23:15:43 +00:00
Dan Gohman
fe6b41169a Revert 97667. It broke a bunch of tests. 
llvm-svn: 97673
 2010-03-03 22:40:03 +00:00
Evan Cheng
57064125c4 Fix funky indentation and add comments. 
llvm-svn: 97670
 2010-03-03 21:54:14 +00:00
Evan Cheng
338c7aed4c Move DenseMapInfo for MachineInstr* to MachineInstr.h 
llvm-svn: 97667
 2010-03-03 21:47:16 +00:00
Dan Gohman
cdc603ecae Fix a bug in SelectionDAG's ReplaceAllUsesWith in the case where 
CSE and recursive RAUW calls delete a node from the use list,
invalidating the use list iterator. There's currently no known
way to reproduce this in an unmodified LLVM, however there's no
fundamental reason why a SelectionDAG couldn't be formed which
would trigger this case.

llvm-svn: 97665
 2010-03-03 21:33:37 +00:00
Evan Cheng
918ac5d21f Machine CSE work in progress. It's doing some CSE now. But implicit def of physical registers are getting in the way. 
llvm-svn: 97664
 2010-03-03 21:20:05 +00:00
Evan Cheng
810a26689e Add MachineRegisterInfo::hasOneUse and hasOneNonDBGUse. 
llvm-svn: 97663
 2010-03-03 21:18:38 +00:00
Chris Lattner
acb553060b don't use always_inline with gcc 3.4, it has some unimplemented features 
and is too old to really care about the performance of the generated 
compiler.

llvm-svn: 97662
 2010-03-03 20:47:12 +00:00
Evan Cheng
a139c6cb44 TopLevelMap[] reference is a pointer. 
llvm-svn: 97661
 2010-03-03 20:46:48 +00:00
Andrew Lenharth
89d887d0bc Fix PR6444, note still doesn't compile libgcc2 all the way, but fixes that error. May not fix it in an ABI complient way. It wasn't clear what gcc does 
llvm-svn: 97660
 2010-03-03 20:15:31 +00:00
Chris Lattner
9e230fb6b2 fix incorrect folding of icmp with undef, PR6481. 
llvm-svn: 97659
 2010-03-03 19:46:03 +00:00
Bill Wendling
f0bd51c4e3 Revert... 
--- Reverse-merging r97592 into '.':
U    lib/CodeGen/TargetLoweringObjectFileImpl.cpp

llvm-svn: 97657
 2010-03-03 19:31:05 +00:00
Johnny Chen
c25f4d30f9 Added 32-bit Thumb instructions LDRT, LDRBT, LDRHT,,LDRSBT, LDRSHT, STRT, STRBT, 
and STRHT for disassembly only.

llvm-svn: 97655
 2010-03-03 18:45:36 +00:00
Chris Lattner
9e7f00c3aa add some of the more obscure predicate types to the 
Scope accelerator.

llvm-svn: 97652
 2010-03-03 07:46:25 +00:00
Chris Lattner
9889ed8c45 speed up scope node processing: if the first element of a scope 
entry we're about to process is obviously going to fail, don't
bother pushing a scope only to have it immediately be popped.
This avoids a lot of scope stack traffic in common cases.

Unfortunately, this requires duplicating some of the predicate
dispatch.  To avoid duplicating the actual logic I pulled each
predicate out to its own static function which gets used in
both places.

llvm-svn: 97651
 2010-03-03 07:31:15 +00:00
Chris Lattner
92a814205f introduce a new SwitchTypeMatcher node (which is analogous to 
SwitchOpcodeMatcher) and have DAGISelMatcherOpt form it.  This
speeds up selection, particularly for X86 which has lots of 
variants of instructions with only type differences.

llvm-svn: 97645
 2010-03-03 06:28:15 +00:00
Bill Wendling
5a72a97e6b Fix comment. 
llvm-svn: 97644
 2010-03-03 05:40:40 +00:00
Dan Gohman
4d2339f18d Make SCEVExpander and LSR more aggressive about hoisting expressions out 
of loops.

llvm-svn: 97642
 2010-03-03 05:29:13 +00:00
Dan Gohman
da13ee1220 Revert r97580; that's not the right way to fix this. 
llvm-svn: 97639
 2010-03-03 04:36:42 +00:00
Evan Cheng
13f096bf0a Work in progress. Finding some cse now. 
llvm-svn: 97635
 2010-03-03 02:48:20 +00:00
Chris Lattner
2e934b978c remove nvload and two patterns that use it which are 
better done by dag combine.

llvm-svn: 97633
 2010-03-03 02:14:54 +00:00
Johnny Chen
6ecb4d7b7c Added 32-bit Thumb instructions t2NOP, t2YIELD, t2WFE, t2WFI, t2SEV, and t2DBG 
for disassembly only.

llvm-svn: 97632
 2010-03-03 02:09:43 +00:00
Bill Wendling
65baaf9499 Use APInt instead of zext value. 
llvm-svn: 97631
 2010-03-03 01:58:01 +00:00
Chris Lattner
88f948aec4 factor the 'in the default address space' check out to a single 
'dsload' pattern.  tblgen doesn't check patterns to see if they're
textually identical.  This allows better factoring.

llvm-svn: 97630
 2010-03-03 01:52:59 +00:00
Chris Lattner
b178d16c23 factor the 'sign extended from 8 bit' patterns better so 
that they are not destination type specific.  This allows
tblgen to factor them and the type check is redundant with
what the isel does anyway.

llvm-svn: 97629
 2010-03-03 01:45:01 +00:00
Evan Cheng
70b7ecdef9 - Change MachineInstr::isIdenticalTo to take a new option that determines whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality. 
- Eliminate TargetInstrInfo::isIdentical and replace it with produceSameValue. In the default case, produceSameValue just checks whether two machine instructions are identical (except for virtual register defs). But targets may override it to check for unusual cases (e.g. ARM pic loads from constant pools).

llvm-svn: 97628
 2010-03-03 01:44:33 +00:00
Evan Cheng
ae376081d2 Add an option to enable machine cse (it's not doing anything yet. 
llvm-svn: 97627
 2010-03-03 01:38:35 +00:00
Evan Cheng
3f08373243 Ordering forward declarations. 
llvm-svn: 97626
 2010-03-03 01:37:50 +00:00
Bill Wendling
959aa1373b Don't turn assertions on by default. 
llvm-svn: 97623
 2010-03-03 01:13:55 +00:00
Evan Cheng
4e3c0e66f7 Eliminate unused instruction classes. 
llvm-svn: 97617
 2010-03-03 00:43:15 +00:00
Bill Wendling
d1f658563d This test case: 
long test(long x) { return (x & 123124) | 3; }

Currently compiles to:

_test:
        orl     $3, %edi
        movq    %rdi, %rax
        andq    $123127, %rax
        ret

This is because instruction and DAG combiners canonicalize

  (or (and x, C), D) -> (and (or, D), (C | D))

However, this is only profitable if (C & D) != 0. It gets in the way of the
3-addressification because the input bits are known to be zero.

llvm-svn: 97616
 2010-03-03 00:35:56 +00:00
Johnny Chen
7be11bea79 Added 32-bit Thumb instructions t2DMB variants, t2DSB variants, and t2ISBsy for 
disassembly only.

llvm-svn: 97614
 2010-03-03 00:16:28 +00:00