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Commit Graph

73863 Commits

Author SHA1 Message Date
Akira Hatanaka
52263f51f1 Do not treat atomic.load.sub differently than other atomic binary intrinsics.
llvm-svn: 135418
2011-07-18 19:58:59 +00:00
Akira Hatanaka
79f38f0ae7 Set mayLoad or mayStore flags for SC and LL in order to prevent LICM from
moving them out of the loop. Previously, stores and loads to a stack frame
object were inserted to accomplish this. Remove the code that was needed to do
this. Patch by Sasa Stankovic.

llvm-svn: 135415
2011-07-18 18:52:12 +00:00
Owen Anderson
aadc53ca80 Re-apply r135319 with a fix for the constant island pass.
Original Log: Get rid of the separate opcodes for the Darwin versions of tBL, tBLXi, and tBLXr, using pseudo-instructions to lower to the single final opcode.  Update the ARM disassembler for this change.

llvm-svn: 135414
2011-07-18 18:50:52 +00:00
Jakob Stoklund Olesen
89e84069d2 Fix a crash when building 177.mesa for armv6.
When splitting a live range immediately before an LDR_POST instruction
that redefines the address register, make sure to use the correct value
number in leaveIntvBefore.

We need the value number entering the instruction.

<rdar://problem/9793765>

llvm-svn: 135413
2011-07-18 18:47:13 +00:00
Andrew Trick
40113d052b indvars: Added verification that LFTR and other indvars goodness does
not interfere with BackedgeTakenCount computation.

llvm-svn: 135412
2011-07-18 18:44:20 +00:00
Andrew Trick
111d0bc134 indvars: Added isHighCostExpansion. Avoid generating extra ops in the
preheader for the sole purpose of LFTR, since LFTR itself is usually not
a clear optimization.

llvm-svn: 135409
2011-07-18 18:21:35 +00:00
Bruno Cardoso Lopes
bdf75dfa28 Be more smart with VCVTSS2SD. Also place the patterns close to the
definitions.

llvm-svn: 135407
2011-07-18 18:11:25 +00:00
Bruno Cardoso Lopes
da90f383ab Add AVX 128-bit sqrt versions
llvm-svn: 135404
2011-07-18 17:51:40 +00:00
Akira Hatanaka
d5690b20d3 Change destination register operands of SC instructions so that unique
virtual registers are used. 

llvm-svn: 135403
2011-07-18 17:44:27 +00:00
Jakob Stoklund Olesen
c5fe14efd2 Intern all RecTy subclass instances to avoid duplicates.
Make all of the RecTy constructors private, and use get() factory
methods instead. Return singleton instances when it makes sense.

ListTy instance pointers are stored in the element RecTy instance.

BitsRecTy instance pointers, one per length, are stored in a static vector.

Also unique DefInit instances. A Record has a unique DefInit which
has a unique RecordRecTy instance.

This saves some 200k-300k RecTy allocations when parsing ARM.td. It
reduces TableGen's heap usage by almost 50%.

llvm-svn: 135399
2011-07-18 17:02:57 +00:00
Chris Lattner
320e39de40 various cleanups noticed by Frits
llvm-svn: 135396
2011-07-18 16:35:57 +00:00
Chris Lattner
e909e2936b remove pasto
llvm-svn: 135394
2011-07-18 16:04:11 +00:00
Frits van Bommel
107d4e0957 Hopefully fix some GCC-based buildbots. GCC apparently decays the array to a pointer here before overload resolution, so construct with an explicit length instead.
llvm-svn: 135391
2011-07-18 12:31:03 +00:00
Frits van Bommel
6c24f9c277 Migrate LLVM and Clang to use the new makeArrayRef(...) functions where previously explicit non-default constructors were used.
Mostly mechanical with some manual reformatting.

llvm-svn: 135390
2011-07-18 12:00:32 +00:00
Frits van Bommel
9286081ccc Introduce the 'makeArrayRef(...)' family of functions, which fills a similar role for ArrayRef<> as std::make_pair() fills for std::pair<>: they return the right instantiation of ArrayRef<T> based on the types of the parameters.
They mostly mirror the ArrayRef constructors, with two exceptions:
 * There's no function mirroring the default constructor because it wouldn't have any parameters to deduce the right ArrayRef<T> from.
 * There's an explicit SmallVector<T> overload in addition to the SmallVectorImpl<T> overload. Without it, the single-element overload would try to create an ArrayRef<Smallvector<T> > because it's a better match according to the overloading rules. (And both overloads are used in the current tree, so neither is redundant)

llvm-svn: 135389
2011-07-18 11:58:53 +00:00
Nick Lewycky
47f28ebead Delete empty unused file.
llvm-svn: 135379
2011-07-18 05:54:06 +00:00
Jakob Stoklund Olesen
b19797de85 Fix PR10387.
When trying to rematerialize a value before an instruction that has an
early-clobber redefine of the virtual register, make sure to look up the
correct value number.

Early-clobber defs are moved one slot back, so getBaseIndex is needed to
find the used value number.

Bugpoint was unable to reduce the test case for this, see PR10388.

llvm-svn: 135378
2011-07-18 05:31:59 +00:00
Chris Lattner
0acd1a9d12 document this api change.
llvm-svn: 135376
2011-07-18 04:56:02 +00:00
Chris Lattner
e1fe7061ce land David Blaikie's patch to de-constify Type, with a few tweaks.
llvm-svn: 135375
2011-07-18 04:54:35 +00:00
Chris Lattner
568b96b828 update for recent api changes. I have a hard time believing that this is actually a useful example.
llvm-svn: 135374
2011-07-18 04:52:58 +00:00
Chris Lattner
210e9162c9 update this to build with a recent IRBuilder change and de-constify types.
llvm-svn: 135373
2011-07-18 04:52:09 +00:00
Evan Cheng
cd7b5ef7fc LLC doesn't need to create MCInstrInfo's.
llvm-svn: 135369
2011-07-18 04:16:27 +00:00
Chris Lattner
009603a6d2 add iteration support to TinyPtrVector for clang's use.
llvm-svn: 135367
2011-07-18 01:53:11 +00:00
Chris Lattner
04b988a1c0 fix a warning in TinyPtrVector, adopt it in SSAUpdater, saving some
mallocs.

llvm-svn: 135366
2011-07-18 01:43:58 +00:00
Chris Lattner
fde62dcdb7 introduce a new TinyPtrVector class.
llvm-svn: 135365
2011-07-18 01:40:02 +00:00
Benjamin Kramer
e07d9da4f4 Simplify & microoptimize code. No intended functionality change.
llvm-svn: 135364
2011-07-18 00:00:20 +00:00
Nadav Rotem
4c2c253f68 Minor code cleanups
llvm-svn: 135362
2011-07-17 19:05:00 +00:00
Oscar Fuentes
d6898d0cf5 Fix CMake build on Solaris
When building LLVM/Clang on Solaris. The generated makefiles would
have an extraneous semi-colon character in them prior to this change
due to the way the 'CMAKE_CXX_FLAGS' variable was defined. Simply
adjusting the definition by moving the current CMAKE_CXX_FLAGS value
within the quotes solves the problem.

Patch by Art Haas!

llvm-svn: 135361
2011-07-17 17:35:15 +00:00
Chris Lattner
1810c19d8e tidy up
llvm-svn: 135360
2011-07-17 06:01:30 +00:00
Benjamin Kramer
9de5b6c35b Silence compiler warnings.
llvm-svn: 135358
2011-07-16 22:26:27 +00:00
Jakub Staszak
be41018cf4 Remove unused LoopRanges from RegAllocGreedy.
llvm-svn: 135354
2011-07-16 20:43:00 +00:00
Jakub Staszak
7bd3be24d8 Remove "LoopInfo.h" include from BranchProbabilityInfo.h.
llvm-svn: 135353
2011-07-16 20:31:15 +00:00
Jakub Staszak
a0010953f7 Add MachineBlockFrequency analysis.
llvm-svn: 135352
2011-07-16 20:23:20 +00:00
Owen Anderson
03cf89c6f0 Revert r135319 in an attempt to get to unbreak testers.
llvm-svn: 135343
2011-07-16 09:17:43 +00:00
Eric Christopher
f49a77b3b6 More minor adjustments.
llvm-svn: 135342
2011-07-16 07:28:35 +00:00
Matt Beaumont-Gay
8c4a5f3635 Silence unused variable warning
llvm-svn: 135339
2011-07-16 04:18:47 +00:00
Eli Friedman
f6cac8a620 Make the disassembler able to disassemble a bunch of instructions with names in the TableGen files containing "64" on x86-32. This includes a bunch of x87 instructions, like fld, and a bunch of SSSE3 instructions on MMX registers like pshufb. Part of PR8873.
llvm-svn: 135337
2011-07-16 02:41:28 +00:00
Andrew Trick
3300087d49 indvars: fix a pass-sensitivity issue that would hit the SCEVExpander
assertion I added in r135333. Check for the existence of a preheader
before expanding a recurrence.

llvm-svn: 135335
2011-07-16 01:18:53 +00:00
Andrew Trick
3b06e51b87 indvars: remove ExprToIVMap because it won't be needed by LFTR.
llvm-svn: 135334
2011-07-16 01:06:48 +00:00
Andrew Trick
b2c2eec80d Fix SCEVEXpander to handle arbitrary phi expansion. Includes two
related bug fixes and corresponding assertions for uninitialized data
and missing NULL check. Test cases will be included with the new LFTR.

llvm-svn: 135333
2011-07-16 00:59:39 +00:00
Bruno Cardoso Lopes
d258749f73 Add AVX 128-bit patterns for sint_to_fp
llvm-svn: 135332
2011-07-16 00:50:20 +00:00
Eric Christopher
542f64abc9 Finish propagating %asmtmp->%1 change.
llvm-svn: 135330
2011-07-16 00:26:07 +00:00
Jakob Stoklund Olesen
25cece01c9 He said *before* the last split point.
This should unbreak the build-self-4-mingw32 tester. I have a very
complicated test case that I will try to clean up.

llvm-svn: 135329
2011-07-16 00:13:30 +00:00
Chris Lattner
b09652e74d fix rdar://9776316 - type remapping needed for inline asm blobs,
fixing some objc llvm-test crashes with LTO.

llvm-svn: 135324
2011-07-15 23:18:40 +00:00
Chris Lattner
7fc89c5ff8 deconstify getType()'s.
llvm-svn: 135323
2011-07-15 23:15:45 +00:00
Dan Gohman
8e056f4a49 LegalizeDAG doesn't need its own copy of this enum.
llvm-svn: 135320
2011-07-15 22:51:43 +00:00
Owen Anderson
cd207640a2 Get rid of the separate opcodes for the Darwin versions of tBL, tBLXi, and tBLXr, using pseudo-instructions to lower to the single final opcode. Update the ARM disassembler for this change.
llvm-svn: 135319
2011-07-15 22:49:31 +00:00
Dan Gohman
a44add3a49 Delete LegalizeDAG's own version of isTypeLegal and getTypeAction
and just use the ones from TargetLowering directly.

llvm-svn: 135318
2011-07-15 22:39:09 +00:00
Bruno Cardoso Lopes
d5b62f3403 Fix a couple of things:
1) Make non-legal 256-bit loads to be promoted to v4i64. This lets us
canonize the loads and handle things the same way we use to handle
for 128-bit registers. Despite of what one of the removed comments
explained, the load promotion would not mess with VPERM, it's only a
matter of doing the appropriate bitcasts when this instructions comes
to be introduced. Also make LOAD v8i32 legal.

2) Doing 1) exposed two bugs:
- v4i64 was being promoted to itself for several opcodes (introduced
in r124447 by David Greene) causing endless recursion and the stack to
explode.
- there was no support for allOnes BUILD_VECTORs and ANDNP would fail to
match because it was generating early target constant pools during
lowering.

3) The testcases are already checked-in, doing 1) exposed the
bugs in the current testcases.

4) Tidy up code to be more clear and explicit about AVX.

llvm-svn: 135313
2011-07-15 22:24:33 +00:00
Bruno Cardoso Lopes
2a23e486ad Add a few patterns for 256-bit bitcasts. No testcases now, they are
comming together with other tests.

llvm-svn: 135312
2011-07-15 22:24:17 +00:00