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Commit Graph

287 Commits

Author SHA1 Message Date
Jim Grosbach
082e9f2f2c Remove trailing whitespace.
llvm-svn: 119608
2010-11-18 01:39:50 +00:00
Jim Grosbach
2f9a2efb3c ARM PseudoInst instructions don't need or use an assembler string. Get rid of
the operand to the pattern.

llvm-svn: 119607
2010-11-18 01:38:26 +00:00
Bill Wendling
b450d320ec Encode the multi-load/store instructions with their respective modes ('ia',
'db', 'ib', 'da') instead of having that mode as a separate field in the
instruction. It's more convenient for the asm parser and much more readable for
humans.
<rdar://problem/8654088>

llvm-svn: 119310
2010-11-16 01:16:36 +00:00
Owen Anderson
52e3873edc Add support for ARM's specialized vector-compare-against-zero instructions.
llvm-svn: 118453
2010-11-08 23:21:22 +00:00
Owen Anderson
add19dd6dd Add codegen and encoding support for the immediate form of vbic.
llvm-svn: 118291
2010-11-05 19:27:46 +00:00
Owen Anderson
1a89511e5d Add support for code generation of the one register with immediate form of vorr.
We could be more aggressive about making this work for a larger range of constants,
but this seems like a good start.

llvm-svn: 118201
2010-11-03 22:44:51 +00:00
Owen Anderson
98f9965c89 Unlike a lot of NEON instructions, vext isn't _actually_ parameterized by element size. Instead,
all of the different element sizes are pseudo instructions that map down to vext.8 underneath, with
the immediate shifted left to reflect the increased element size.

llvm-svn: 118183
2010-11-03 18:16:27 +00:00
Bob Wilson
f44e708279 Add codegen patterns for VST1-lane instructions. Radar 8599955.
llvm-svn: 118176
2010-11-03 16:24:53 +00:00
Jim Grosbach
c10d3f3d4b Break ARM addrmode4 (load/store multiple base address) into its constituent
parts. Represent the operation mode as an optional operand instead.
rdar://8614429

llvm-svn: 118137
2010-11-03 01:01:43 +00:00
Owen Anderson
f754738bbb Revert r118097 to fix buildbots.
llvm-svn: 118121
2010-11-02 23:47:29 +00:00
Owen Anderson
ea89766d0c Since these fields are not exactly equivalent to the encoded field, rename them to something with semantic meaning.
llvm-svn: 118097
2010-11-02 22:41:42 +00:00
Owen Anderson
cdd587157f Provide correct encodings for the remaining vst variants that we currently generate.
llvm-svn: 118087
2010-11-02 22:18:18 +00:00
Owen Anderson
1f88ac90a1 Tentative encodings for the "single element from one lane" variant of vst1.
llvm-svn: 118084
2010-11-02 21:54:45 +00:00
Owen Anderson
46d4ab1a87 Add correct encodings for basic variants for vst3 and vst4.
llvm-svn: 118082
2010-11-02 21:47:03 +00:00
Bob Wilson
248c691f9a Add NEON VST1-lane instructions. Partial fix for Radar 8599955.
llvm-svn: 118069
2010-11-02 21:18:25 +00:00
Owen Anderson
36d5c04fbd Add correct encodings for the basic variants for vst2.
llvm-svn: 118068
2010-11-02 21:16:58 +00:00
Owen Anderson
c9f6909c96 Add correct encodings for the basic form of vst1.
llvm-svn: 118067
2010-11-02 21:06:06 +00:00
Owen Anderson
b34a5f1d02 Factor out a common encoding class for loads and stores with a lane parameter.
llvm-svn: 118055
2010-11-02 20:47:39 +00:00
Owen Anderson
ee1337c01f Add correct encodings for the rest of the vld instructions that we generate.
llvm-svn: 118053
2010-11-02 20:40:59 +00:00
Owen Anderson
9d85c89ade Add correct NEON encodings for vld2, vld3, and vld4 basic variants.
llvm-svn: 117997
2010-11-02 01:24:55 +00:00
Owen Anderson
f4ab06d0b6 Attempt to provide correct encodings for a number of other vld1 variants, which we can't test
since we can neither generate nor parse them at the moment.

llvm-svn: 117988
2010-11-02 00:24:52 +00:00
Owen Anderson
6647eb222b Add correct NEON encodings for the "multiple single elements" form of vld.
llvm-svn: 117984
2010-11-02 00:05:05 +00:00
Bob Wilson
b6bc135df8 Add NEON VLD1-lane instructions. Partial fix for Radar 8599955.
llvm-svn: 117964
2010-11-01 22:04:05 +00:00
Owen Anderson
e75f7c5419 Add correct NEON encodings for vtbl and vtbx.
llvm-svn: 117513
2010-10-28 00:18:46 +00:00
Owen Anderson
008116cb71 Add correct NEON encodings for vext, vtrn, vuzp, and vzip.
llvm-svn: 117512
2010-10-27 23:56:39 +00:00
Owen Anderson
9437a20a72 Provide correct encodings for NEON vcvt, which has its own special immediate encoding
for specifying fractional bits for fixed point conversions.

llvm-svn: 117501
2010-10-27 22:49:00 +00:00
Owen Anderson
d28d229ded Provide correct encodings for the get_lane and set_lane variants of vmov.
llvm-svn: 117495
2010-10-27 21:28:09 +00:00
Owen Anderson
7c46fcfee4 Provide correct NEON encodings for vdup.
llvm-svn: 117475
2010-10-27 19:25:54 +00:00
Owen Anderson
c8757eb137 Add correct NEON encodings for vsli and vsri.
llvm-svn: 117459
2010-10-27 17:40:08 +00:00
Owen Anderson
e64b7187a9 Add correct NEON encodings for vsra and vrsra.
llvm-svn: 117458
2010-10-27 17:29:29 +00:00
Owen Anderson
1dc05f20e2 Add correct NEON encodings for vqshl, vqshrn, vqshrun, vqrshl, vqshrn, and vqrshrun.
llvm-svn: 117411
2010-10-26 22:50:46 +00:00
Owen Anderson
55c0bad37d Correct NEON encodings for vshrn, vrshl, vrshr, vrshrn.
llvm-svn: 117402
2010-10-26 21:58:41 +00:00
Owen Anderson
570a4cdc45 Simplify classes for shift instructions, which are never commutable.
llvm-svn: 117398
2010-10-26 21:13:59 +00:00
Owen Anderson
0cecbd810e Provide correct NEON encodings for vshl, register and immediate forms.
llvm-svn: 117394
2010-10-26 20:56:57 +00:00
Owen Anderson
d8e5d26a56 Add correct NEON encoding for vpadal.
llvm-svn: 117380
2010-10-26 18:18:03 +00:00
Owen Anderson
b7618a821f Add NEON encodings for vmov and vmvn of immediates.
llvm-svn: 117374
2010-10-26 17:40:54 +00:00
Owen Anderson
e5e0dcd665 Add correct encodings for NEON vabal.
llvm-svn: 117315
2010-10-25 21:29:04 +00:00
Owen Anderson
3eff0b86a5 Add correct NEON encodings for vaba.
llvm-svn: 117309
2010-10-25 20:52:57 +00:00
Owen Anderson
61f5b3f2dc Attempt to provide correct encodings for NEON vbit and vbif, even though we can't test them at the moment.
llvm-svn: 117294
2010-10-25 20:17:22 +00:00
Owen Anderson
072692331e Provide correct NEON encodings for vbsl.
llvm-svn: 117293
2010-10-25 20:13:13 +00:00
Owen Anderson
59e85cbd66 Add correct instruction encodings for vbic, vorn, and vmvn.
llvm-svn: 117282
2010-10-25 18:43:52 +00:00
Owen Anderson
ba261b092c Add NEON encoding tests for vcgt and vacgt.
llvm-svn: 117276
2010-10-25 18:03:59 +00:00
Owen Anderson
3a5f798790 Add tests for NEON encodings of vcge and vacge.
llvm-svn: 117274
2010-10-25 17:49:32 +00:00
Owen Anderson
757022131f Add a warning about our inability to test the encoding of vceq with immediate zero.
llvm-svn: 117273
2010-10-25 17:33:02 +00:00
Owen Anderson
424434414e Add correct NEON encodings for vqdmlal.
llvm-svn: 117134
2010-10-22 19:35:48 +00:00
Owen Anderson
2bbdc62e17 Provide correct encodings for NEON vmlal.
llvm-svn: 117131
2010-10-22 19:05:25 +00:00
Owen Anderson
ada2b33321 Provide correct NEON encodings for vmla.
llvm-svn: 117126
2010-10-22 18:54:37 +00:00
Owen Anderson
ba2ac80921 ARM encodes Q registers as 2xregno (i.e. the number of the D register that corresponds to the lower
half of the Q register), rather than with just regno.  This allows us to unify the encodings for
a lot of different NEON instrucitons that differ only in whether they have Q or D register operands.

llvm-svn: 117056
2010-10-21 20:21:49 +00:00
Owen Anderson
51a6bc3b27 Add correct NEON encodings for vhadd and vrhadd.
llvm-svn: 117047
2010-10-21 18:55:04 +00:00
Owen Anderson
dce283c7db Add correct encodings for NEON vaddw.s* and vaddw.u*.
llvm-svn: 117040
2010-10-21 18:20:25 +00:00