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Author SHA1 Message Date
Evan Cheng
58bfb4e600 Make CALL node consistent with RET node. Signness of value has type MVT::i32 
instead of MVT::i1. Either is fine except MVT::i32 is probably a legal type
for most (if not all) platforms while MVT::i1 is not.

llvm-svn: 28511
 2006-05-26 23:13:20 +00:00
Evan Cheng
de0f25081a Change RET node to include signness information of the return values. i.e. 
RET chain, value1, sign1, value2, sign2, ...

llvm-svn: 28510
 2006-05-26 23:10:12 +00:00
Evan Cheng
f53c4cc192 Change RET node to include signness information of the return values. e.g. 
RET chain, value1, sign1, value2, sign2

llvm-svn: 28509
 2006-05-26 23:09:09 +00:00
Owen Anderson
4e6d8eb367 Trivial testcase that LCSSA can already handle. 
llvm-svn: 28508
 2006-05-26 21:59:20 +00:00
Owen Anderson
d706fc78b2 Fix a copy-and-paste-o that would break some compilers. 
llvm-svn: 28507
 2006-05-26 21:19:17 +00:00
Owen Anderson
2414055ac6 Clean up and refactor LCSSA a bunch. It should also run faster now, though 
there's still a lot of work to be done on it.

llvm-svn: 28506
 2006-05-26 21:11:53 +00:00
Evan Cheng
25db1a52d2 Vector argument must be passed in memory location aligned on 16-byte boundary. 
llvm-svn: 28505
 2006-05-26 20:37:47 +00:00
Evan Cheng
7f468901bb Mac OS X ABI document lied. The first four XMM registers are used to pass 
vector arguments, not three.

llvm-svn: 28504
 2006-05-26 19:22:06 +00:00
Chris Lattner
0043931185 Implement Transforms/InstCombine/store.ll:test2. 
llvm-svn: 28503
 2006-05-26 19:19:20 +00:00
Chris Lattner
80f83ad994 New testcase for trivial DSE 
llvm-svn: 28502
 2006-05-26 19:18:40 +00:00
Chris Lattner
e3222507ee Fix a bug in the bc reader/writer: we were not correctly encoding varargs 
nonccc calls (we were dropping the CC and tail flag).  This broke several
FORTRAN programs.

Testcase here: Regression/Assembler/2006-05-26-VarargsCallEncode.ll

llvm-svn: 28501
 2006-05-26 18:42:34 +00:00
Chris Lattner
4f0be93f9b New testcase, check that the bc file correctly encodes varargs nonccc calls. 
llvm-svn: 28500
 2006-05-26 18:41:26 +00:00
Evan Cheng
629df0afb2 Minor update to make the code more clear 
llvm-svn: 28499
 2006-05-26 18:39:59 +00:00
Evan Cheng
bde90b2732 Update more comments. 
llvm-svn: 28498
 2006-05-26 18:37:16 +00:00
Evan Cheng
414c909954 Fix some comments. 
llvm-svn: 28497
 2006-05-26 18:25:43 +00:00
Evan Cheng
a4b6f4749d No need to handle illegal types. 
llvm-svn: 28496
 2006-05-26 18:22:49 +00:00
Owen Anderson
93098cfc4c Skeletal LCSSA pass. This is currently non-functional. Expect functionality 
and documentation updates soo.

llvm-svn: 28495
 2006-05-26 13:58:26 +00:00
Rafael Espindola
f7c5af4863 On ARM, alignment is in bits 
Add lr as a hard coded operand of bx

llvm-svn: 28494
 2006-05-26 10:56:17 +00:00
Evan Cheng
c80154a36e Remove a couple of bogus casts. 
llvm-svn: 28493
 2006-05-26 08:04:31 +00:00
Evan Cheng
328b47bc28 Remove a bogus cast. 
llvm-svn: 28492
 2006-05-26 08:00:14 +00:00
Evan Cheng
77b8eaf292 Minor bug caught by Ashwin Chandra 
llvm-svn: 28491
 2006-05-26 06:22:34 +00:00
Chris Lattner
c6c2770e08 Transform things like (splat(splat)) -> splat 
llvm-svn: 28490
 2006-05-26 00:29:06 +00:00
Chris Lattner
261299e3f5 Introduce a helper function that simplifies interpretation of shuffle masks. 
No functionality change.

llvm-svn: 28489
 2006-05-25 23:48:38 +00:00
Evan Cheng
f610c3e318 Consistency 
llvm-svn: 28488
 2006-05-25 23:31:23 +00:00
Chris Lattner
c678c720a7 Turn (cast (shuffle (cast)) -> shuffle (cast) if it reduces the # casts in 
the program.  This exposes more opportunities for the instcombiner, and implements
vec_shuffle.ll:test6

llvm-svn: 28487
 2006-05-25 23:24:33 +00:00
Chris Lattner
d5dcb39d9f new testcase 
llvm-svn: 28486
 2006-05-25 23:23:22 +00:00
Chris Lattner
5df88a112b extract element from a shuffle vector can be trivially turned into an 
extractelement from the SV's source.  This implement vec_shuffle.ll:test[45]

llvm-svn: 28485
 2006-05-25 22:53:38 +00:00
Chris Lattner
3bbd20f754 new testcases 
llvm-svn: 28484
 2006-05-25 22:52:49 +00:00
Evan Cheng
fb5e64ff9e Some clean up. 
llvm-svn: 28483
 2006-05-25 22:38:31 +00:00
Chris Lattner
5e1d6724da Add support for the missing FP condition codes 
llvm-svn: 28482
 2006-05-25 22:26:02 +00:00
Evan Cheng
ee280ac5d0 Remove some dead code. 
llvm-svn: 28481
 2006-05-25 22:25:52 +00:00
Evan Cheng
564c7ac8f6 X86 / Cygwin asm / alignment fixes. 
Patch contributed by Anton Korobeynikov!

llvm-svn: 28480
 2006-05-25 21:59:08 +00:00
Chris Lattner
24762cd819 The patch corresponding to this test had to be reverted as unsafe. 
llvm-svn: 28479
 2006-05-25 21:25:54 +00:00
Chris Lattner
d3eff919d8 Revert a patch that is unsafe, due to out of range array accesses in inner 
array scopes possibly accessing valid memory in outer subscripts.

llvm-svn: 28478
 2006-05-25 21:25:12 +00:00
Evan Cheng
227c09e7d2 New test case. x86 isel was creating a cycle in the DAG. 
llvm-svn: 28477
 2006-05-25 20:21:19 +00:00
Evan Cheng
1e9556ee06 Can't trust NodeDepth when checking for possibility of load folding creating 
a cycle. This increase the search space and will increase compile time (in
practice it appears to be small, e.g. 176.gcc goes from 62 sec to 65 sec)
that will be addressed later.

llvm-svn: 28476
 2006-05-25 20:16:55 +00:00
Evan Cheng
abb909e3bb Build breakage. 
llvm-svn: 28475
 2006-05-25 18:56:34 +00:00
Chris Lattner
cbcad040b3 Fix build failure of povray 
llvm-svn: 28473
 2006-05-25 18:06:16 +00:00
Chris Lattner
e3059fb8bd Fix Benchmarks/MallocBench/cfrac 
llvm-svn: 28471
 2006-05-25 16:54:16 +00:00
Rafael Espindola
31b98f8e04 implement initial version of ARMAsmPrinter::printOperand 
llvm-svn: 28470
 2006-05-25 12:57:06 +00:00
Rafael Espindola
90eec6b0f7 port the ARM backend to use ISD::CALL instead of LowerCallTo 
llvm-svn: 28469
 2006-05-25 11:00:18 +00:00
Rafael Espindola
eedf343115 create test/Regression/CodeGen/ARM/ and add a minimal test to it 
llvm-svn: 28468
 2006-05-25 10:49:19 +00:00
Evan Cheng
4890385e8f -sched-commute-nodes is now on by default. 
llvm-svn: 28467
 2006-05-25 08:39:25 +00:00
Evan Cheng
6fdd4960aa Turn on -sched-commute-nodes by default. 
llvm-svn: 28465
 2006-05-25 08:37:31 +00:00
Chris Lattner
819480fcb2 Fix breakage on platforms where string/cassert don't pull in int64_t. 
llvm-svn: 28464
 2006-05-25 05:59:50 +00:00
Evan Cheng
bb17ad5ffa Switch X86 over to a call-selection model where the lowering code creates 
the copyto/fromregs instead of making the X86ISD::CALL selection code create
them.

llvm-svn: 28463
 2006-05-25 00:59:30 +00:00
Evan Cheng
4a74dd0c51 CALL node change (arg / sign pairs instead of just arguments). 
llvm-svn: 28462
 2006-05-25 00:57:32 +00:00
Evan Cheng
920d9c86f1 CALL node change: now including signness of every argument. 
llvm-svn: 28461
 2006-05-25 00:55:32 +00:00
Evan Cheng
5d83c6ad6a CALL node change: now containing signness of each argument. 
llvm-svn: 28460
 2006-05-25 00:54:33 +00:00
Evan Cheng
09942d3f8b Assert if InflightSet is not cleared after instruction selecting a BB. 
llvm-svn: 28459
 2006-05-25 00:24:28 +00:00