1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 03:33:20 +01:00
Commit Graph

209596 Commits

Author SHA1 Message Date
wlei
593cc2c826 [NFC] Fix build break by a initializer list converting error 2021-01-13 14:28:02 -08:00
Florian Hahn
ca3e71391e [DSE] Add tests with stores of existing values.
This patch pre-commits test cases with dead stores of
existing values for D90328. It also updates a few tests that had such
stores by accident, to preserve the original spirit of those tests.
2021-01-13 21:56:21 +00:00
Nikita Popov
4c62220bd7 [FuncAttrs] Add additional willreturn tests (NFC) 2021-01-13 22:33:22 +01:00
Kazu Hirata
9d49d680e1 Fix the warnings on unused variables (NFC) 2021-01-13 13:32:40 -08:00
Florian Hahn
2bcad0829e [LTO] Add test for freestanding LTO option.
This patch adds a test for the -lto-freestanding option, similar to
llvm/test/ThinLTO/X86/tli-nobuiltin.ll.
2021-01-13 20:43:22 +00:00
Jeroen Dobbelaere
8dd6e7c3bc [NFC] Use correct ssa.copy spelling when referring to the intrinsic
Split out from D91250. Fixes wrong ssa_copy naming.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D94310
2021-01-13 20:43:14 +01:00
wlei
82ce5502f2 [NFC] fix missing SectionName declaration 2021-01-13 11:30:09 -08:00
wlei
37f75ec7df [CSSPGO][llvm-profgen] Virtual unwinding with pseudo probe
This change extends virtual unwinder to support pseudo probe in llvm-profgen. Please refer https://groups.google.com/g/llvm-dev/c/1p1rdYbL93s and https://reviews.llvm.org/D89707 for more context about CSSPGO and llvm-profgen.

**Implementation**

- Added `ProbeBasedCtxKey` derived from `ContextKey` for sample counter aggregation. As we need string splitting to infer the profile for callee function, string based context introduces more string handling overhead, here we just use probe pointer based context.
- For linear unwinding, as inline context is encoded in each pseudo probe, we don't need to go through each instruction to extract range sharing same inliner. So just record the range for the context.
- For probe based context, we should ignore the top frame probe since it will be extracted from the address range. we defer the extraction in `ProfileGeneration`.
- Added `PseudoProbeProfileGenerator` for pseudo probe based profile generation.
- Some helper function to get pseduo probe info(call probe, inline context) from profiled binary.
- Added regression test for unwinder's output

The pseudo probe based profile generation will be in the upcoming patch.

Test Plan:

ninja & ninja check-llvm

Differential Revision: https://reviews.llvm.org/D92896
2021-01-13 11:02:58 -08:00
wlei
35a868aba5 [CSSPGO][llvm-profgen] Refactor to unify hashable interface for trace sample and context-sensitive counter
As we plan to support both CSSPGO and AutoFDO for llvm-profgen, we will have different kinds of perf sample and different kinds of sample counter(cs/non-cs, with/without pseudo probe) which both need to do aggregation in hash map.  This change implements the hashable interface(`Hashable`) and the unified base class for them to have better extensibility and reusability.

Currently perf trace sample and sample counter with context implemented this `Hashable` and  the class hierarchy is like:

```
| Hashable
           | PerfSample
                          | HybridSample
                          | LBRSample
           | ContextKey
                          | StringBasedCtxKey
                          | ProbeBasedCtxKey
                          | CallsiteBasedCtxKey
           | ...
```

- Class specifying `Hashable` should implement `getHashCode` and `isEqual`. Here we make `getHashCode` a non-virtual function to avoid vtable overhead, so derived class should calculate and assign the base class's HashCode manually. This also provides the flexibility for calculating the hash code incrementally(like rolling hash) during frame stack unwinding
- `isEqual` is a virtual function, which will have perf overhead. In the future, if we redesign a better hash function, then we can just skip this or switch to non-virtual function.
- Added `PerfSample` and `ContextKey` as base class for perf sample and counter context key, leveraging llvm-style RTTI for this.
- Added `StringBasedCtxKey` class extending  `ContextKey` to use string as context id.
- Refactor `AggregationCounter` to take all kinds of `PerfSample` as key
- Refactor `ContextSampleCounter` to take all kinds of `ContextKey` as key
- Other refactoring work:
 - Create a wrapper class `SampleCounter` to wrap `RangeCounter` and `BranchCounter`
 - Hoist `ContextId` and `FunctionProfile` out of `populateFunctionBodySamples` and `populateFunctionBoundarySamples` to reuse them in ProfileGenerator

Differential Revision: https://reviews.llvm.org/D92584
2021-01-13 11:02:57 -08:00
wlei
b32f59cb87 [CSSPGO][llvm-profgen] Pseudo probe decoding and disassembling
This change implements pseudo probe decoding and disassembling for llvm-profgen/CSSPGO. Please see https://groups.google.com/g/llvm-dev/c/1p1rdYbL93s and https://reviews.llvm.org/D89707 for more context about CSSPGO and llvm-profgen.

**ELF section format**
Please see the encoding patch(https://reviews.llvm.org/D91878) for more details of the format, just copy the example here:

Two section(`.pseudo_probe_desc` and  `.pseudoprobe` ) is emitted in ELF to support pseudo probe.
The format of `.pseudo_probe_desc` section looks like:

```
.section   .pseudo_probe_desc,"",@progbits
.quad   6309742469962978389  // Func GUID
.quad   4294967295           // Func Hash
.byte   9                    // Length of func name
.ascii  "_Z5funcAi"          // Func name
.quad   7102633082150537521
.quad   138828622701
.byte   12
.ascii  "_Z8funcLeafi"
.quad   446061515086924981
.quad   4294967295
.byte   9
.ascii  "_Z5funcBi"
.quad   -2016976694713209516
.quad   72617220756
.byte   7
.ascii  "_Z3fibi"
```

For each `.pseudoprobe` section, the encoded binary data consists of a single function record corresponding to an outlined function (i.e, a function with a code entry in the `.text` section). A function record has the following format :

```
FUNCTION BODY (one for each outlined function present in the text section)
    GUID (uint64)
        GUID of the function
    NPROBES (ULEB128)
        Number of probes originating from this function.
    NUM_INLINED_FUNCTIONS (ULEB128)
        Number of callees inlined into this function, aka number of
        first-level inlinees
    PROBE RECORDS
        A list of NPROBES entries. Each entry contains:
          INDEX (ULEB128)
          TYPE (uint4)
            0 - block probe, 1 - indirect call, 2 - direct call
          ATTRIBUTE (uint3)
            reserved
          ADDRESS_TYPE (uint1)
            0 - code address, 1 - address delta
          CODE_ADDRESS (uint64 or ULEB128)
            code address or address delta, depending on ADDRESS_TYPE
    INLINED FUNCTION RECORDS
        A list of NUM_INLINED_FUNCTIONS entries describing each of the inlined
        callees.  Each record contains:
          INLINE SITE
            GUID of the inlinee (uint64)
            ID of the callsite probe (ULEB128)
          FUNCTION BODY
            A FUNCTION BODY entry describing the inlined function.
```

**Disassembling**
A switch `--show-pseudo-probe` is added to use along with `--show-disassembly` to print disassembly code with pseudo probe directives.

For example:
```
00000000002011a0 <foo2>:
  2011a0: 50                    push   rax
  2011a1: 85 ff                 test   edi,edi
  [Probe]:  FUNC: foo2  Index: 1  Type: Block
  2011a3: 74 02                 je     2011a7 <foo2+0x7>
  [Probe]:  FUNC: foo2  Index: 3  Type: Block
  [Probe]:  FUNC: foo2  Index: 4  Type: Block
  [Probe]:  FUNC: foo   Index: 1  Type: Block  Inlined: @ foo2:6
  2011a5: 58                    pop    rax
  2011a6: c3                    ret
  [Probe]:  FUNC: foo2  Index: 2  Type: Block
  2011a7: bf 01 00 00 00        mov    edi,0x1
  [Probe]:  FUNC: foo2  Index: 5  Type: IndirectCall
  2011ac: ff d6                 call   rsi
  [Probe]:  FUNC: foo2  Index: 4  Type: Block
  2011ae: 58                    pop    rax
  2011af: c3                    ret
```

**Implementation**
- `PseudoProbeDecoder` is added in ProfiledBinary as an infra for the decoding. It decoded the two section and generate two map: `GUIDProbeFunctionMap` stores all the `PseudoProbeFunction` which is the abstraction of a general function. `AddressProbesMap` stores all the pseudo probe info indexed by its address.
- All the inline info is encoded into binary as a trie(`PseudoProbeInlineTree`) and will be constructed from the decoding. Each pseudo probe can get its inline context(`getInlineContext`) by traversing its inline tree node backwards.

Test Plan:
ninja & ninja check-llvm

Differential Revision: https://reviews.llvm.org/D92334
2021-01-13 11:02:57 -08:00
Sanjay Patel
781444d01f [SLP] simplify type check for reductions
This is NFC-intended. The 'valid' call allows int/FP/pointers
for other parts of SLP. The difference here is that we can't
reduce pointers.
2021-01-13 13:30:46 -05:00
Krzysztof Parzyszek
20d6150d67 [Hexagon] Improve legalizing of ISD::SETCC result 2021-01-13 12:29:22 -06:00
LLVM GN Syncbot
f78fe9df8c [gn build] Port 60fda8ebb6d 2021-01-13 17:33:32 +00:00
Sam Tebbs
f7f437fb68 [ARM] Add a pass that re-arranges blocks when there is a backwards WLS branch
Blocks can be laid out such that a t2WhileLoopStart branches backwards. This is forbidden by the architecture and so it fails to be converted into a low-overhead loop. This new pass checks for these cases and moves the target block, fixing any fall-through that would then be broken.

Differential Revision: https://reviews.llvm.org/D92385
2021-01-13 17:23:00 +00:00
Simon Pilgrim
241cf3723d [DAG] visitVECTOR_SHUFFLE - use all_of to check for all-undef shuffle mask. NFCI. 2021-01-13 17:19:41 +00:00
Simon Pilgrim
f2fbbf52c5 [X86][AVX] Add test for another 'reverse HADD' pattern mentioned in PR41813 2021-01-13 17:19:41 +00:00
Simon Pilgrim
45c24eb179 [X86][SSE] canonicalizeShuffleMaskWithHorizOp - simplify shuffle(HOP(HOP(X,Y),HOP(Z,W))) style chains.
See if we can remove the shuffle by resorting a HOP chain so that the HOP args are pre-shuffled.

This initial version just handles (the most common) v4i32/v4f32 hadd/hsub reduction patterns - future work can extend this to v8i16 types plus PACK chains (2f64 HADD/HSUB should already be handled in the half-lane combine code later on).
2021-01-13 17:19:40 +00:00
Jonas Devlieghere
2dfbaeb628 [dsymutil] Warn on timestmap mismatch between object file and debug map
This re-lands e5553b9a6ab9 with two small fixes to the tests:

 - Don't touch the source directory in debug-map-parsing.test but
   instead copy everything over in a temporary directory in
   timestamp-mismatch.test.
 - Don't redirect stderr to stdout to avoid the output getting
   intertwined in extern-alias.test.
2021-01-13 09:15:30 -08:00
Andrew Litteken
63c50a23a3 [IROutliner] Adapting to hoisted bitcasts in CodeExtractor
In commit 700d2417d8281ea56dfd7ac72d1a1473d03d2d59 the CodeExtractor
was updated so that bitcasts that have lifetime markers that beginning
outside of the region are deduplicated outside the region and are not
used as an output.  This caused a discrepancy in the IROutliner, where
in these cases there were arguments added to the aggregate function
that were not needed causing assertion errors.

The IROutliner queries the CodeExtractor twice to determine the inputs
and outputs, before and after `findAllocas` is called with the same
ValueSet for the outputs causing the duplication. This has been fixed
with a dummy ValueSet for the first call.

However, the additional bitcasts prevent us from using the same
similarity relationships that were previously defined by the
IR Similarity Analysis Pass. In these cases, we check whether the
initial version of the region being analyzed for outlining is still the
same as it was previously.  If it is not, i.e. because of the additional
bitcast instructions from the CodeExtractor, we discard the region.

Reviewers: yroux

Differential Revision: https://reviews.llvm.org/D94303
2021-01-13 11:10:37 -06:00
Nikita Popov
2639acbee3 [InstCombine] Fold select -> and/or using impliesPoison
We can fold a ? b : false to a & b if is_poison(b) implies that
is_poison(a), at which point we're able to reuse all the usual fold
on ands. In particular, this covers the very common case of
icmp X, C && icmp X, C'. The same applies to ors.

This currently only has an effect if the
-instcombine-unsafe-select-transform=0 option is set.

Differential Revision: https://reviews.llvm.org/D94550
2021-01-13 17:45:40 +01:00
Sanjay Patel
d7148a8a86 [SLP] add reduction test for FMF; NFC 2021-01-13 11:43:51 -05:00
Muhammad Asif Manzoor
680b733958 [AArch64][GlobalISel] Add support for FCONSTANT of FP128 type
Add support for G_FCONSTANT of FP128 (Quadruple precision) type.
It replaces the constant by emitting a load with a constant pool entry.

Reviewed By: aemerson

Differential Revision: https://reviews.llvm.org/D94437
2021-01-13 10:46:10 -05:00
Hsiangkai Wang
f44895099b [NFC][RISCV] Add double type in RISC-V V CodeGen test cases for RV32.
Differential Revision: https://reviews.llvm.org/D94584
2021-01-13 23:45:13 +08:00
Matt Arsenault
1862ece684 GlobalISel: Do not set observer of MachineIRBuilder in LegalizerHelper
This fixes double printing of insertion debug messages in the
legalizer.

Try to cleanup usage of observers. Currently the use of observers is
pretty hard to follow and it's not clear what is responsible for
them. Observers are referenced in 3 places:

1. In the MachineFunction
2. In the MachineIRBuilder
3. In the LegalizerHelper

The observers in the MachineFunction and MachineIRBuilder are both
called only on insertions, and are redundant with each other. The
source of the double printing was the same observer was added to both
the MachineFunction, and the MachineIRBuilder. One of these references
needs to be removed. Arguably observers in general should be fully
removed from one or the other, but it may be useful to have a local
observer in the MachineIRBuilder that is not added to the function's
observers. Alternatively, the wrapper observer could manage a local
observer in one place.

The LegalizerHelper only ever calls the observer on changing/changed
instructions, and never insertions. Logically these are two different
types of observers, for changes and for insertions.

Additionally, some places used the GISelObserverWrapper when they only
needed a single observer they could use directly.

Setting the observer in the LegalizerHelper constructor is not
flexible enough if the LegalizerHelper is constructed anywhere outside
the one used by the legalizer. AMDGPU calls the LegalizerHelper in
RegBankSelect, and needs to use a local observer to apply the regbank
to newly created instructions. Currently it accomplishes this by
constructing a local MachineIRBuilder. I'm trying to move the
MachineIRBuilder to be owned/maintained by the RegBankSelect pass
itself, but the locally constructed LegalizerHelper would reset the
observer.

Mips also has a special case use of the LegalizationArtifactCombiner
in applyMappingImpl; I think we do need to run the artifact combiner
during RegBankSelect, but in a more consistent way outside of
applyMappingImpl.
2021-01-13 10:44:31 -05:00
Nicholas Guy
ca4da13283 [AArch64] Attempt to sink mul operands
Following on from D91255, this patch is responsible for sinking relevant mul
operands to the same block so that umull/smull instructions can be correctly
generated by the mul combine implemented in the aforementioned patch.

Differential revision: https://reviews.llvm.org/D91271
2021-01-13 15:23:36 +00:00
Florian Hahn
af11738662 [X86] Add tests for rv_marker lowering.
Precommit tests for D94597.
2021-01-13 14:58:50 +00:00
Simon Pilgrim
47530dbc50 [X86] canonicalizeShuffleMaskWithHorizOp - minor refactor to support multiple src ops. NFCI.
canonicalizeShuffleMaskWithHorizOp currently only supports shuffles with 1 or 2 sources, but PR41813 will require us to support higher numbers of sources.

This patch just generalizes the initial setup stages to ensure all src ops are the same type and opcode and then will continue to early out if we have more than 2 sources.
2021-01-13 13:59:56 +00:00
Dávid Bolvanský
9e352f39e6 [Tests] Added test for memcpy loop idiom recognization 2021-01-13 14:55:46 +01:00
Markus Lavin
8e1b636cfa [ValueTracking] Fix one s/dyn_cast/dyn_cast_or_null/
Handle if Constant::getAggregateElement() returns nullptr in
canCreateUndefOrPoison().

Differential Revision: https://reviews.llvm.org/D94494
2021-01-13 13:39:53 +01:00
Kerry McLaughlin
126c3ccc68 [SVE][CodeGen] CTLZ, CTTZ & CTPOP operations (predicates)
Canonicalise the following operations in getNode() for predicate types:
 - CTLZ(Pred)  -> bitwise_NOT(Pred)
 - CTTZ(Pred)  -> bitwise_NOT(Pred)
 - CTPOP(Pred) -> Pred

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D94428
2021-01-13 12:24:54 +00:00
David Zarzycki
92c89b7de3 Revert "[dsymutil] Warn on timestmap mismatch between object file and debug map"
This reverts commit e5553b9a6ab9f02f382a31cc5117b52c3bfaf77a.

Tests are not allowed to modify the source. Please figure out a way to
use %t rather than dynamically modifying the inputs.
2021-01-13 07:23:34 -05:00
Nathan James
9a01228ffe Fix build errors after ceb9379a9
For some reason some builds dont like the arrow operator access. using the deref then access should fix the issue.

/home/buildbots/ppc64le-flang-mlir-rhel-test/ppc64le-flang-rhel-clang-build/llvm-project/llvm/include/llvm/ADT/iterator.h:171:34: error: taking the address of a temporary object of type 'llvm::StringRef' [-Waddress-of-temporary]
  PointerT operator->() { return &static_cast<DerivedT *>(this)->operator*(); }
                                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/buildbots/ppc64le-flang-mlir-rhel-test/ppc64le-flang-rhel-clang-build/llvm-project/llvm/include/llvm/ADT/StringExtras.h:387:13: note: in instantiation of member function 'llvm::iterator_facade_base<llvm::mapped_iterator<mlir::tblgen::TypeParameter *, (lambda at /home/buildbots/ppc64le-flang-mlir-rhel-test/ppc64le-flang-rhel-clang-build/llvm-project/mlir/tools/mlir-tblgen/TypeDefGen.cpp:414:19), llvm::StringRef>, std::random_access_iterator_tag, llvm::StringRef, long, llvm::StringRef *, llvm::StringRef &>::operator->' requested here
    Len += I->size();
2021-01-13 12:19:53 +00:00
Florian Hahn
04553aba9f [LTO] Add test to ensure objc-arc-contract is executed.
This test adds additional test coverage for upcoming refactorings.
2021-01-13 12:18:17 +00:00
Nathan James
1a9d376e87 [ADT] Fix join_impl using the wrong size when calculating total length
Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D83305
2021-01-13 11:36:49 +00:00
Cullen Rhodes
e4528c98d0 [SVE] Add ISel pattern for addvl
Reviewed By: cameron.mcinally

Differential Revision: https://reviews.llvm.org/D94504
2021-01-13 10:57:49 +00:00
Simon Pilgrim
29b48afef1 [X86][AVX] combineVectorSignBitsTruncation - limit AVX512 truncations to 128-bits (PR48727)
rG73a44f437bf1 result in 256-bit packss/packus ops with additional shuffles that shuffle combining can sometimes try to convert back into a truncation.
2021-01-13 10:38:23 +00:00
Joe Ellis
7f6a519103 [AArch64][SVE] Remove chains of unnecessary SVE reinterpret intrinsics
This commit extends SVEIntrinsicOpts::optimizeConvertFromSVBool to
identify and remove longer chains of redundant SVE reintepret
intrinsics. For example, the following chain of redundant SVE
reinterprets is now recognised as redundant:

    %a = <vscale x 2 x i1>
    %1 = <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool(<vscale x 2 x i1> %a)
    %2 = <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool(<vscale x 16 x i1> %1)
    %3 = <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool(<vscale x 4 x i1> %2)
    %4 = <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool(<vscale x 16 x i1> %3)
    %5 = <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool(<vscale x 4 x i1> %4)
    %6 = <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool(<vscale x 16 x i1> %5)
    ret <vscale x 2 x i1> %6

and will be replaced with:

    ret <vscale x 2 x i1> %a

Eliminating these can sometimes mean emitting fewer unnecessary
loads/stores when lowering to assembly.

Differential Revision: https://reviews.llvm.org/D94074
2021-01-13 09:44:09 +00:00
David Sherwood
1d15e5fce3 [NFC][InstructionCost] Use InstructionCost in Transforms/Scalar/RewriteStatepointsForGC.cpp
In places where we calculate costs using TTI.getXXXCost() interfaces
I have changed the code to use InstructionCost instead of unsigned.
The change is non functional since InstructionCost behaves in the
same way as an integer for valid costs. Currently the getXXXCost()
functions used in this file do not return invalid costs.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Differential revision: https://reviews.llvm.org/D94484
2021-01-13 09:42:58 +00:00
Florian Hahn
229248a14d [LTO] Replace anonymous namespace with static functions (NFC).
Only class declarations should be inside anonymous namespaces
(https://llvm.org/docs/CodingStandards.html#anonymous-namespaces)

Instead of using a anonymous namespace, just mark the functions in it as
static (some of them already were).

This simplifies the diff for D94486.
2021-01-13 09:32:15 +00:00
Georgii Rymar
90f5750361 [obj2yaml,yaml2obj] - Refine how we set/dump the sh_entsize field.
This reuses the code from yaml2obj (moves it to ELFYAML.h).
With it we can set the `sh_entsize` in a single place in `obj2yaml`.

Note that it also fixes a bug of `yaml2obj`: we do not
set the `sh_entsize` field for the `SHT_ARM_EXIDX` section properly.

Differential revision: https://reviews.llvm.org/D93858
2021-01-13 11:52:40 +03:00
David Green
67b6fc085a [ARM] Update isVMOVNOriginalMask to handle single input shuffle vectors
The isVMOVNOriginalMask was previously only checking for two input
shuffles that could be better expanded as vmovn nodes. This expands that
to single input shuffles that will later be legalized to multiple
vectors.

Differential Revision: https://reviews.llvm.org/D94189
2021-01-13 08:51:28 +00:00
Georgii Rymar
8e4afeec9b [llvm-readelf/obj] - Add support of multiple SHT_SYMTAB_SHNDX sections.
Currently we don't support multiple SHT_SYMTAB_SHNDX sections
and the DT_SYMTAB_SHNDX tag currently.

This patch implements it and fixes the
https://bugs.llvm.org/show_bug.cgi?id=43991.

I had to introduce the `struct DataRegion` to ELF.h,
it is used to represent a region that might have no known size.
It is needed, because we don't know the size of the extended
section indices table when it is located via DT_SYMTAB_SHNDX.
In this case we still want to validate that we don't read
past the end of the file.

Differential revision: https://reviews.llvm.org/D92923
2021-01-13 11:36:43 +03:00
David Green
3b162ef2a9 [ARM] Additional tests for different interleaving patterns. NFC 2021-01-13 08:31:50 +00:00
Serguei Katkov
187141b789 [Verifier] Add tied-ness verification to statepoint intsruction
Reviewers: reames, dantrushin
Reviewed By: reames, dantrushin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D94483
2021-01-13 14:40:44 +07:00
Jonas Devlieghere
059e346af5 [dsymutil] Add preliminary support for DWARF 5.
Currently dsymutil will silently fail when processing binaries with
Dwarf 5 debug info. This patch adds rudimentary support for Dwarf 5 in
dsymutil.

 - Recognize relocations in the debug_addr section.
 - Recognize (a subset of) Dwarf 5 form values.
 - Emits valid Dwarf 5 compile unit header chains.

To simplify things (and avoid having to emit indexed sections) I decided
to emit the relocated addresses directly in the debug info section.

 - DW_FORM_strx gets relocated and rewritten to DW_FORM_strp
 - DW_FORM_addrx gets relocated and rewritten to DW_FORM_addr

Obviously there's a lot of work left, but this should be a step in the
right direction.

rdar://62345491

Differential revision: https://reviews.llvm.org/D94323
2021-01-12 21:55:41 -08:00
Kazu Hirata
62feab8afa [llvm] Use Optional::getValueOr (NFC) 2021-01-12 21:43:50 -08:00
Kazu Hirata
42b5b228d1 [CodeGen] Remove unused function isRegLiveInExitBlocks (NFC)
The last use was removed on Jan 17, 2020 in commit
42350cd893a9cf6c199b17441dc2ba526c7cca71.
2021-01-12 21:43:48 -08:00
Kazu Hirata
dfbe37a54f [llvm] Remove redundant string initialization (NFC)
Identified with readability-redundant-string-init.
2021-01-12 21:43:46 -08:00
Serguei Katkov
5f9a319f66 [Verifier] Extend statepoint verifier to cover more constants
Also old mir tests are updated to meet last changes in STATEPOINT format.

Reviewers: reames, dantrushin
Reviewed By: reames, dantrushin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D94482
2021-01-13 11:51:48 +07:00
Serguei Katkov
36ff00d4ce [Statepoint Lowering] Add an option to allow use gc values in regs for landing pad
Default value is not changed, so it is NFC actually.

The option allows to use gc values on registers in landing pads.

Reviewers: reames, dantrushin
Reviewed By: reames, dantrushin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D94469
2021-01-13 11:39:34 +07:00