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Author SHA1 Message Date
Evan Cheng
5a058ed2a0 Remove a dead comment. 
llvm-svn: 113259
 2010-09-07 20:01:10 +00:00
Chris Lattner
f2534b401f rename test. 
llvm-svn: 113257
 2010-09-07 19:57:06 +00:00
Chris Lattner
7b50cefea8 hopefully fix a problem building on cygwin-1.5 
llvm-svn: 113255
 2010-09-07 19:50:53 +00:00
Owen Anderson
e15120e561 Clean up some of the PassRegistry implementation, and pImpl-ize it to reduce #include clutter 
and exposing internal details.

llvm-svn: 113252
 2010-09-07 19:16:25 +00:00
Bill Wendling
601bbfe6e3 Fix whitespace, because I'm OCD. 
llvm-svn: 113250
 2010-09-07 18:49:14 +00:00
Stuart Hastings
f0d248515f Test case for r113248. Raar 8361341. 
llvm-svn: 113249
 2010-09-07 18:43:57 +00:00
Bruno Cardoso Lopes
21e1fc67c3 decouple MMX check from regular splat checks. Some refactoring is coming, and MMX should be left alone to be easily removed after moving to intrinsics 
llvm-svn: 113247
 2010-09-07 18:41:45 +00:00
Bruno Cardoso Lopes
dcc8690051 Remove now useless check, because the code can be matched below, no need to leave it for isel 
llvm-svn: 113242
 2010-09-07 18:29:03 +00:00
Dan Gohman
2625d9a286 Issue a #error if the host doesn't have an implementation for 
GetMainExecutable yet.

llvm-svn: 113240
 2010-09-07 18:26:49 +00:00
Bruno Cardoso Lopes
e6f7e4684d Minor change. Since the checks are equivalent, use isMMX 
llvm-svn: 113239
 2010-09-07 18:24:00 +00:00
Devang Patel
e9dcee0a69 Fix command line used to link these test cases. 
llvm-svn: 113237
 2010-09-07 18:17:56 +00:00
Nick Lewycky
95bce25477 Update configure for change to autoconf/configure.ac to add PTX backend. 
llvm-svn: 113236
 2010-09-07 18:14:42 +00:00
Nick Lewycky
cad1395824 Create PTX backend. Patch by Che-Liang Chiou! 
llvm-svn: 113235
 2010-09-07 18:14:24 +00:00
Dale Johannesen
8354cab2de Add patterns for MMX that use the new intrinsics. 
Enable palignr intrinsic.
These may need adjustment for a new VT in due course.

llvm-svn: 113233
 2010-09-07 18:10:56 +00:00
Devang Patel
ca974014e7 Reintroduce dbg-declare tests. 
llvm-svn: 113232
 2010-09-07 18:01:49 +00:00
Bruno Cardoso Lopes
92bb02f722 Remove unused target specific node 
llvm-svn: 113224
 2010-09-07 17:38:55 +00:00
Devang Patel
c1cdbbb6d5 Remove last three tests. I need to make them independent of my setup. 
llvm-svn: 113213
 2010-09-07 17:08:57 +00:00
Devang Patel
cb223026e6 Add a test case to check handling of dbg-declare during hybrid mode where we begin using fast-isel but switch back to DAG building at some point. 
llvm-svn: 113210
 2010-09-07 17:03:44 +00:00
Devang Patel
5b5dd1d32b Add a test case to check handling of dbg-declare by selection DAG builder. 
llvm-svn: 113209
 2010-09-07 16:56:35 +00:00
Devang Patel
bcdf6f20ac Add a test case to check handling of dbg-declare by fast-isel. 
llvm-svn: 113208
 2010-09-07 16:40:53 +00:00
Benjamin Kramer
32f7af702a Don't leak the old operand when transforming "sldt" into "sldtw". 
llvm-svn: 113200
 2010-09-07 14:40:58 +00:00
Chris Lattner
bdedd983a9 attempt to appease msvc 
llvm-svn: 113198
 2010-09-07 06:10:48 +00:00
Gabor Greif
cb72b44075 fix comment typos 
llvm-svn: 113197
 2010-09-07 06:06:06 +00:00
Nick Lewycky
9698dae1df Add completely hokey binary-and and binary-or operations to ConstantRange and 
teach LazyValueInfo to use them.

llvm-svn: 113196
 2010-09-07 05:39:02 +00:00
Nick Lewycky
8c155b346e Fix major bug in thunk detection. Also verify the calling convention. 
Switch from isWeakForLinker to mayBeOverridden which is more accurate.

Add more statistics and debugging info. Add comments. Move static function
outside anonymous namespace.

llvm-svn: 113190
 2010-09-07 01:42:10 +00:00
Chris Lattner
fd65cfd3eb add missing cmov aliases, this resolves rdar://8208499 
llvm-svn: 113189
 2010-09-07 00:05:45 +00:00
Chris Lattner
927dc7a5d2 remove duplicated entry 
llvm-svn: 113188
 2010-09-06 23:57:24 +00:00
Nick Lewycky
ca54f909d8 Add a new isSignWrappedSet() method to ConstantRange. 
Fix zeroExtend and signExtend to support empty sets, and to return the smallest
possible result set which contains the extension of each element in their
inputs. For example zext i8 [100, 10) to i16 is now [0, 256), not i16 [100, 10)
which contains 63446 members.

llvm-svn: 113187
 2010-09-06 23:52:49 +00:00
Chris Lattner
5a696fb3ca "sldt <mem>" is ambiguous in 64-bit mode, but should 
always be disambiguated as sldtw.  sldtw and sldtq with
a mem operands have the same effect, but sldtw is more
compact.  Force it to sldtw, resolving rdar://8017530

llvm-svn: 113186
 2010-09-06 23:51:44 +00:00
Chris Lattner
3377802111 fix rdar://8017621 - llvm-mc can't guess encoding for "push $(1000)" 
llvm-svn: 113184
 2010-09-06 23:40:56 +00:00
Chris Lattner
9f2c0da214 generalize my previous operand loc info hack. If the same operand 
is busted for all variants, report it as the location.  This allows
us to get the operand right for bugs like:

t.s:3:12: error: invalid operand for instruction
	outb %al, %gs
	          ^

Even though there are reg/imm and reg/reg forms of this instruction.

llvm-svn: 113183
 2010-09-06 23:37:39 +00:00
Chris Lattner
6ecbbff857 fix the operand constraints of the immediate form of in/out, 
allowing unsigned 8-bit operands.  This fixes rdar://8208481

llvm-svn: 113182
 2010-09-06 23:29:05 +00:00
Chris Lattner
6bfa0d9988 in the case where an instruction only has one implementation 
of a mneumonic, report operand errors with better location
info.  For example, we now report:

t.s:6:14: error: invalid operand for instruction
        cwtl $1
             ^

but we fail for common cases like:

t.s:11:4: error: invalid operand for instruction
   addl $1, $1
   ^

because we don't know if this is supposed to be the reg/imm or imm/reg
form.

llvm-svn: 113178
 2010-09-06 22:11:18 +00:00
Chris Lattner
bb5e19cb63 Now that we know if we had a total fail on the instruction mnemonic, 
give a more detailed error.  Before:

t.s:11:4: error: unrecognized instruction
   addl $1, $1
   ^
t.s:12:4: error: unrecognized instruction
   f2efqefa $1
   ^

After:

t.s:11:4: error: invalid operand for instruction
   addl $1, $1
   ^
t.s:12:4: error: invalid instruction mnemonic 'f2efqefa'
   f2efqefa $1
   ^

This fixes rdar://8017912 - llvm-mc says "unrecognized instruction" when it means "invalid operands"

llvm-svn: 113176
 2010-09-06 21:54:15 +00:00
Chris Lattner
fd211fc740 simplify DEBUG_WITH_TYPE usage 
llvm-svn: 113174
 2010-09-06 21:28:52 +00:00
Chris Lattner
4a6911275e this if can now be an assert. 
llvm-svn: 113173
 2010-09-06 21:25:43 +00:00
Chris Lattner
90ef8a5d5a ; 
llvm-svn: 113172
 2010-09-06 21:23:43 +00:00
Chris Lattner
7b80f3c39c now that the opcode is trivially exposed, start matching instructions 
by doing a binary search over the mnemonic instead of doing a linear
search through all possible instructions.  This implements rdar://7785064

llvm-svn: 113171
 2010-09-06 21:22:45 +00:00
Chris Lattner
e443a993fb emit the match table at global scope instead of within the 
MatchInstructionImpl. This makes it easier to read/understand
MatchInstructionImpl.

llvm-svn: 113170
 2010-09-06 21:08:38 +00:00
Chris Lattner
d323dac9bd special case the mnemonic operand of the instruction in the 
generated matcher, emiting it as a column in the MatchEntry
table instead of forcing it to go through classification and
everything else.  Making it be classified caused tblgen to
produce a ton of one-off classes for each mneumonic.  This
should reduce the size of the generated matcher significantly
while paving the way for future improvements.

llvm-svn: 113169
 2010-09-06 21:01:37 +00:00
Chris Lattner
72d2fb8001 The "ambiguous instructions" check only produces anything with -debug, 
so only do the N^2 loop with debug mode.

llvm-svn: 113168
 2010-09-06 20:21:47 +00:00
Chris Lattner
87234fd589 simplify the hacks around jrcxz. 
llvm-svn: 113167
 2010-09-06 20:10:12 +00:00
Chris Lattner
68f7c5b750 have tblgen detect when an instruction would have matched, but 
failed because a subtarget feature was not enabled.  Use this to
remove a bunch of hacks from the X86AsmParser for rejecting things
like popfl in 64-bit mode.  Previously these hacks weren't needed,
but were important to get a message better than "invalid instruction"
when used in the wrong mode.

This also fixes bugs where pushal would not be rejected correctly in
32-bit mode (just pusha).

llvm-svn: 113166
 2010-09-06 20:08:02 +00:00
Chris Lattner
22bb9cb511 change MatchInstructionImpl to return an enum instead of bool. 
llvm-svn: 113165
 2010-09-06 19:22:17 +00:00
Chris Lattner
faf356777a add note 
llvm-svn: 113164
 2010-09-06 19:14:40 +00:00
Chris Lattner
45a204be76 have AsmMatcherEmitter.cpp produce the hunk of code that gets included 
into the middle of the class, and rework how the different sections of
the generated file are conditionally included for simplicity.

llvm-svn: 113163
 2010-09-06 19:11:01 +00:00
Eric Christopher
fa4de56909 Regenerate. 
llvm-svn: 113160
 2010-09-06 18:47:10 +00:00
Eric Christopher
b26776adb4 Update to 2.9 post-2.8 branch. 
llvm-svn: 113159
 2010-09-06 18:47:00 +00:00
Roman Divacky
f760edb301 Redefine LOOP* instructions from I to Ii8PCRel as they take an i8 argument. 
llvm-svn: 113158
 2010-09-06 18:43:14 +00:00
Chris Lattner
3bd0996c77 random cleanups 
llvm-svn: 113157
 2010-09-06 18:32:06 +00:00