1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-28 22:42:52 +01:00
Commit Graph

169 Commits

Author SHA1 Message Date
Anton Korobeynikov
5ad0c235f1 Use isWeakForLinker() hook
llvm-svn: 53318
2008-07-09 13:27:59 +00:00
Anton Korobeynikov
f16db15839 Switch to new section name handling facility
llvm-svn: 53316
2008-07-09 13:27:16 +00:00
Anton Korobeynikov
3bde8f2e24 Fix thinko
llvm-svn: 53309
2008-07-09 13:24:38 +00:00
Evan Cheng
f51c436a1b Back out 53254. It broke ppc debug info codegen.
llvm-svn: 53280
2008-07-09 06:36:53 +00:00
Dale Johannesen
d609d7166c Make debug info come out in data-only files.
This is a question of the debugging setup code not
being called at the right time, and it's called from
target-dependent code for some reason.  I have only
attempted to fix Darwin, but I'm pretty sure it's
broken elsewhere; I'll leave that to people who can
test it.

llvm-svn: 53254
2008-07-08 21:56:22 +00:00
Evan Cheng
6af015292e Unbreak C++ tests on x86 Darwin.
llvm-svn: 53237
2008-07-08 16:40:43 +00:00
Evan Cheng
5be1103646 Avoid unnecessary string construction during asm printing.
llvm-svn: 53215
2008-07-08 00:55:58 +00:00
Evan Cheng
688a8070f4 ATT asm printer just print register AsmName's instead of calling tolower on each charater of Name. This speeds it up by 10%.
llvm-svn: 53208
2008-07-07 22:21:06 +00:00
Dan Gohman
c8097f8c8c Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.

Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.

This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.

llvm-svn: 52943
2008-07-01 00:05:16 +00:00
Dan Gohman
c8c04b1ff4 std::ostream and std::string microoptimizations for asm printing.
llvm-svn: 52929
2008-06-30 22:03:41 +00:00
Anton Korobeynikov
0b708e559e Unbreak
llvm-svn: 52866
2008-06-28 11:10:06 +00:00
Anton Korobeynikov
8562255056 Temporary rever invalid commit
llvm-svn: 52865
2008-06-28 11:09:48 +00:00
Anton Korobeynikov
ea88d91267 Move printing of module-level GVs into dedicated helper
llvm-svn: 52864
2008-06-28 11:09:32 +00:00
Anton Korobeynikov
77c3528f69 Use common naming convention
llvm-svn: 52863
2008-06-28 11:09:17 +00:00
Anton Korobeynikov
2331efee7e Factor out stuff into helper function
llvm-svn: 52862
2008-06-28 11:09:01 +00:00
Anton Korobeynikov
908c1fab55 Cleanup
llvm-svn: 52861
2008-06-28 11:08:44 +00:00
Anton Korobeynikov
adec555f96 Remove X86SharedAsmPrinter
llvm-svn: 52860
2008-06-28 11:08:27 +00:00
Anton Korobeynikov
dcc6a8314a whitespace cleanup
llvm-svn: 52859
2008-06-28 11:08:09 +00:00
Rafael Espindola
feaadb1e05 add support for PIC on linux x86-64
llvm-svn: 52139
2008-06-09 09:52:31 +00:00
Duncan Sands
d634afe3aa Wrap MVT::ValueType in a struct to get type safety
and better control the abstraction.  Rename the type
to MVT.  To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits().  Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).

llvm-svn: 52044
2008-06-06 12:08:01 +00:00
Dale Johannesen
e6977495aa Handle quoted names when constructing $stub's,
$non_lazy_ptr's and $lazy_ptr's.

llvm-svn: 51277
2008-05-19 21:38:18 +00:00
Dale Johannesen
768b6f281e Add CommonLinkage; currently tentative definitions
are represented as "weak", but there are subtle differences
in some cases on Darwin, so we need both.  The intent
is that "common" will behave identically to "weak" unless
somebody changes their target to do something else.
No functional change as yet.

llvm-svn: 51118
2008-05-14 20:12:51 +00:00
Anton Korobeynikov
04c974b1b2 Add General Dynamic TLS model for X86-64. Some parts looks really ugly (look for tlsaddr pattern),
but should work. Work is in progress, more models will follow

llvm-svn: 50630
2008-05-04 21:36:32 +00:00
Dale Johannesen
2d29b1c5bb Handle the situation in 2008-01-25-EmptyFunction.ll
correctly when unwind info is being generated.

llvm-svn: 49366
2008-04-08 00:37:56 +00:00
Dale Johannesen
79633a914f Recommitting EH patch; this should answer most of the
review feedback.
-enable-eh is still accepted but doesn't do anything.
EH intrinsics use Dwarf EH if the target supports that,
and are handled by LowerInvoke otherwise.
The separation of the EH table and frame move data is,
I think, logically figured out, but either one still
causes full EH info to be generated (not sure how to
split the metadata correctly).
MachineModuleInfo::needsFrameInfo is no longer used and
is removed.

llvm-svn: 49064
2008-04-02 00:25:04 +00:00
Evan Cheng
6226a78cb1 Smaller function alignment when optimizing for size.
llvm-svn: 48805
2008-03-25 22:29:46 +00:00
Anton Korobeynikov
4b85ece1ab Another comments fixing
llvm-svn: 48683
2008-03-22 07:53:40 +00:00
Evan Cheng
11d2c09adc Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
llvm-svn: 48380
2008-03-15 00:03:38 +00:00
Christopher Lamb
0f1c32eb63 Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects.
Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes.
llvm-svn: 48329
2008-03-13 05:47:01 +00:00
Anton Korobeynikov
55f54ba252 Correctly propagate thread-local flag from aliasee to alias. This fixes PR2137
llvm-svn: 48257
2008-03-11 22:38:53 +00:00
Evan Cheng
f8b1257d2e Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.
llvm-svn: 47703
2008-02-28 00:43:03 +00:00
Bill Wendling
50f5c4be14 Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
would have been a Godsend here!

llvm-svn: 47625
2008-02-26 21:11:01 +00:00
Evan Cheng
ece0db124f Me not like duplicated comments.
llvm-svn: 47300
2008-02-19 02:05:16 +00:00
Dan Gohman
cabaec582f Rename MRegisterInfo to TargetRegisterInfo.
llvm-svn: 46930
2008-02-10 18:45:23 +00:00
Evan Cheng
f61d1115af Get rid of the annoying blank lines before labels.
llvm-svn: 46667
2008-02-02 08:39:46 +00:00
Bill Wendling
7b83688c73 If there's no instructions being emitted on X86 for a function, emit a
nop. Emit the nop directly for PPC.

llvm-svn: 46398
2008-01-26 09:03:52 +00:00
Anton Korobeynikov
539129f881 Remove Darwin'ism
llvm-svn: 46199
2008-01-20 13:59:37 +00:00
Evan Cheng
5b9282f3b5 Combine MovePCtoStack + POP32r into one instruction MOVPC32r so it can be moved if needed.
llvm-svn: 45605
2008-01-05 00:41:47 +00:00
Chris Lattner
9e5cc35593 Add new shorter predicates for testing machine operands for various types:
e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.

llvm-svn: 45464
2007-12-30 23:10:15 +00:00
Chris Lattner
12477d46b4 Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
llvm-svn: 45453
2007-12-30 20:49:49 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Dale Johannesen
8c3541787f Fix .eh table linkage issues on Darwin. Some EH support
for Darwin PPC, but it's not fully working yet.

llvm-svn: 44258
2007-11-20 23:24:42 +00:00
Evan Cheng
c0dc7b6e61 Oops. Debugging code shouldn't have been checked in.
llvm-svn: 44128
2007-11-14 19:08:32 +00:00
Anton Korobeynikov
58298cb9cc Fix PIC jump table codegen on x86-32/linux. In fact, such thing should be applied
to all targets uses GOT-relative offsets for PIC (Alpha?)

llvm-svn: 44108
2007-11-14 09:18:41 +00:00
Evan Cheng
fd33cb316f Clean up sub-register implementation by moving subReg information back to
MachineOperand auxInfo. Previous clunky implementation uses an external map
to track sub-register uses. That works because register allocator uses
a new virtual register for each spilled use. With interval splitting (coming
soon), we may have multiple uses of the same register some of which are
of using different sub-registers from others. It's too fragile to constantly
update the information.

llvm-svn: 44104
2007-11-14 07:59:08 +00:00
Evan Cheng
946afd2f6c Unbreak x86-64 jumptable.
llvm-svn: 43955
2007-11-09 19:11:23 +00:00
Evan Cheng
7d8deec92f Much improved pic jumptable codegen:
Then:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        imull   $4, %ecx, %ecx
        leal    LJTI1_0-"L1$pb"(%eax), %edx
        addl    LJTI1_0-"L1$pb"(%ecx,%eax), %edx
        jmpl    *%edx

        .align  2
        .set L1_0_set_3,LBB1_3-LJTI1_0
        .set L1_0_set_2,LBB1_2-LJTI1_0
        .set L1_0_set_5,LBB1_5-LJTI1_0
        .set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

Now:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        addl    LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
        jmpl    *%eax

		.align  2
		.set L1_0_set_3,LBB1_3-"L1$pb"
		.set L1_0_set_2,LBB1_2-"L1$pb"
		.set L1_0_set_5,LBB1_5-"L1$pb"
		.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

llvm-svn: 43924
2007-11-09 01:32:10 +00:00
Chris Lattner
8fac63c8b5 Fix PR1761 by not printing (rip) suffix when in -static mode.
Evan, please review this.

llvm-svn: 43680
2007-11-04 19:23:28 +00:00
Chris Lattner
1503362624 Add support for the x86-64 'q' regigster modifier, and add support for the
b/h/w/k/q inline asm memory modifiers, which are just ignored.  This fixes
PR1748 and CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll

llvm-svn: 43430
2007-10-29 03:09:07 +00:00
Evan Cheng
33df6a6bed Revert 42908 for now.
llvm-svn: 42960
2007-10-14 05:57:21 +00:00