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133029 Commits

Author SHA1 Message Date
Haicheng Wu
67cbb8014b [BranchFolding] Replace MachineBlockFrequencyInfo with MBFIWrapper. NFC.
Differential Revision: http://reviews.llvm.org/D20184

llvm-svn: 271923
2016-06-06 18:35:41 +00:00
Alina Sbirlea
24ff9ec84b [cpu-detection] Substantial refactor of Host CPU detection code (x86)
Summary:
Following D20970 (committed as r271726).
This is a substantial refactoring of the host CPU detection code.

There is no functionality change intended, but the changes are extensive.

Definitions of architecture types and subtypes are by no means exhaustive or
perfectly defined, but a fair starting point.
Suggestions for futher improvements are welcome.

Reviewers: llvm-commits

Differential Revision: http://reviews.llvm.org/D20988

llvm-svn: 271921
2016-06-06 18:29:59 +00:00
Lang Hames
b9bf9fd55e [Kaleidoscope][BuildingAJIT] More cleanup of Chapter 2.
Streamline some wording, fix a bug in the markup for the layer interface table.

llvm-svn: 271917
2016-06-06 18:22:47 +00:00
Lang Hames
4f6955f990 [Kaleidoscope][BuildingAJIT] Clean up sentence, remove comments from code block.
llvm-svn: 271913
2016-06-06 18:07:23 +00:00
Sanjay Patel
6ec19288fa [InstCombine] limit icmp transform to ConstantInt (PR28011)
In r271810 ( http://reviews.llvm.org/rL271810 ), I loosened the check
above this to work for any Constant rather than ConstantInt. AFAICT, 
that part makes sense if we can determine that the shrunken/extended 
constant remained equal. But it doesn't make sense for this later 
transform where we assume that the constant DID change. 

This could assert for a ConstantExpr:
https://llvm.org/bugs/show_bug.cgi?id=28011

And it could be wrong for a vector as shown in the added regression test.

llvm-svn: 271908
2016-06-06 16:56:57 +00:00
Sanjay Patel
810d7e88a4 regenerate checks
llvm-svn: 271904
2016-06-06 16:03:06 +00:00
Sanjay Patel
95a34fb288 regenerate checks
llvm-svn: 271903
2016-06-06 15:55:00 +00:00
Artem Tamazov
b28a41c23e [AMDGPU][llvm-mc] v_cndmask_b32: src2 is mandatory; do not enforce VOP2 when src2 == VCC.
Another step for unification llvm assembler/disassembler with sp3.
Besides, CodeGen output is a bit improved, thus changes in CodeGen tests.
Assembler/Disassembler tests updated/added.

Differential Revision: http://reviews.llvm.org/D20796

llvm-svn: 271900
2016-06-06 15:23:43 +00:00
Matthew Simpson
0887882326 [LAA] Use load and store vectors (NFC)
Contributed-by: Aditya Kumar <hiraditya@msn.com>
Differential Revision: http://reviews.llvm.org/D20953

llvm-svn: 271895
2016-06-06 14:15:41 +00:00
Igor Breger
e3844a404a [KNL] Fix UMULO lowering.
Differential Revision: http://reviews.llvm.org/D21013

llvm-svn: 271891
2016-06-06 12:24:52 +00:00
Benjamin Kramer
2d31039cb1 Remove dead function with incredibly broken assert.
Found by clang-tidy's misc-assert-side-effect.

llvm-svn: 271887
2016-06-06 12:10:42 +00:00
Filipe Cabecinhas
4ea419e23b [NFC] Silence gcc warning (-Wsign-compare)
llvm-svn: 271882
2016-06-06 10:49:56 +00:00
Craig Topper
bb0d5ffb41 [AVX512] Remove masked palignr intrinsics and auto-upgrade them to native IR of vector shuffle and select.
llvm-svn: 271872
2016-06-06 06:12:54 +00:00
NAKAMURA Takumi
311ae9cc2f LLVM_BUILD_32_BITS: Add -m32 with CMAKE_C*_FLAGS. [CMP0056]
With CMP0056, try_compile() uses also CMAKE_EXE_LINKER_FLAG.
It caused mismatch between CMAKE_CXX_FLAGS and CMAKE_EXE_LINKER_FLAGS, to fail to examine CXX_SUPPORTS_CXX11 with -m32.

FYI, before this, try_compile() tries without -m32 regardless of LLVM_BUILD_32_BITS.

llvm-svn: 271871
2016-06-06 05:54:55 +00:00
Craig Topper
50151618a6 [AVX512] Add PALIGNR shuffle lowering for v32i16 and v16i32.
llvm-svn: 271870
2016-06-06 05:39:10 +00:00
Craig Topper
c4ce25ed3e [AVX512] Update tests to show shuffle decoding for vpshuflw/vpshufhw.
llvm-svn: 271869
2016-06-06 05:39:07 +00:00
Lang Hames
9bad4819bf [Kaleidoscope][BuildingAJIT] Split up the code-block describing the substitution
of OptimizeLayer for CompileLayer in Chapter 2.

Hopefully this will read a little more clearly.

llvm-svn: 271868
2016-06-06 05:07:52 +00:00
Lang Hames
8b961a44c2 [Kaleidoscope][BuildingAJIT] Fix code-blocks in Chapter 2.
llvm-svn: 271867
2016-06-06 04:53:59 +00:00
Lang Hames
6c7de226cb [Kaleidoscope][BuildingAJIT] Add tutorial text for Chapter 2.
This chapter discusses IR optimizations, the ORC IRTransformLayer, and the ORC
layer concept itself.

The text is still pretty rough, but I think the main ideas are there. Feedback
is very welcome, as always.

llvm-svn: 271865
2016-06-06 03:28:12 +00:00
Nick Lewycky
3ff4515717 Fix spelling and capitalization in comments. NFC
llvm-svn: 271862
2016-06-06 01:51:23 +00:00
NAKAMURA Takumi
ce4daad0d6 Trailing whitespace.
llvm-svn: 271861
2016-06-06 00:31:45 +00:00
NAKAMURA Takumi
c3ea8d0e63 Untabify.
llvm-svn: 271860
2016-06-06 00:31:28 +00:00
Eli Friedman
fee40fb679 LICM: Don't sink stores out of loops that may throw.
Summary:
This hasn't been caught before because it requires noalias or similarly
strong alias analysis to actually reproduce.

Fixes http://llvm.org/PR27952 .

Reviewers: hfinkel, sanjoy

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D20944

llvm-svn: 271858
2016-06-05 22:13:52 +00:00
Sanjoy Das
7a0f514448 Add safety check to InstCombiner::commonIRemTransforms
Since FoldOpIntoPhi speculates the binary operation to potentially each
of the predecessors of the PHI node (pulling it out of arbitrary control
dependence in the process), we can FoldOpIntoPhi only if we know the
operation doesn't have UB.

This also brings up an interesting profitability question -- the way it
is written today, commonIRemTransforms will hoist out work from
dynamically dead code into code that will execute at runtime.  Perhaps
that isn't the best canonicalization?

Fixes PR27968.

llvm-svn: 271857
2016-06-05 21:17:04 +00:00
Sanjoy Das
feb879a718 Add test case for InstCombiner::commonIRemTransforms; NFC
The PHI case in commonIRemTransforms was untested; add a trivial test
case.

llvm-svn: 271856
2016-06-05 21:17:00 +00:00
Eli Friedman
d8092c740d Fix deadlock in ThreadPool unittest.
(Yes, this only deadlocks on a computer with a single core; I'm using
a virtual machine.)

llvm-svn: 271855
2016-06-05 21:15:46 +00:00
Davide Italiano
1d6e137f97 [Internalize] Test that __stack_chk_{guard, fail} are not internalized.
r154645 introduced this feature without test. This should have better
coverage now.

llvm-svn: 271853
2016-06-05 19:08:54 +00:00
Filipe Cabecinhas
929b72c699 [BitCode] Make sure atomicrmw's argument is an actual PointerType
llvm-svn: 271851
2016-06-05 18:43:40 +00:00
Filipe Cabecinhas
020e10c851 [BitCode] Make sure storeatomic's argument is an actual PointerType
llvm-svn: 271850
2016-06-05 18:43:33 +00:00
Filipe Cabecinhas
06c97ab46d [BitCode] Diagnose GEPs with no indices
llvm-svn: 271849
2016-06-05 18:43:26 +00:00
Filipe Cabecinhas
cb52965257 [BitCode] Don't allow constants of void type.
llvm-svn: 271848
2016-06-05 18:43:17 +00:00
Mike Spertus
bfcbd10626 Add Visual Studio Visualizer for ArrayRef
Modeled after visualization of llvm::SmallVec

llvm-svn: 271847
2016-06-05 18:34:02 +00:00
Sanjoy Das
6a0879ec65 [PM] Port IndVarSimplify to the new pass manager
Summary:
There are some rough corners, since the new pass manager doesn't have
(as far as I can tell) LoopSimplify and LCSSA, so I've updated the
tests to run them separately in the old pass manager in the lit tests.
We also don't have an equivalent for AU.setPreservesCFG() in the new
pass manager, so I've left a FIXME.

Reviewers: bogner, chandlerc, davide

Subscribers: sanjoy, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D20783

llvm-svn: 271846
2016-06-05 18:01:19 +00:00
Sanjoy Das
8562f7e8b8 [IndVars] Remove -liv-reduce
It is an off-by-default option that no one seems to use[0], and given
that SCEV directly understands the overflow instrinsics there is no real
need for it anymore.

[0]: http://lists.llvm.org/pipermail/llvm-dev/2016-April/098181.html

llvm-svn: 271845
2016-06-05 18:01:12 +00:00
Sanjay Patel
1709e61793 fix checks
update_test_checks.py got confused matching the variable names. 

llvm-svn: 271844
2016-06-05 17:54:56 +00:00
Sanjay Patel
57c134b91a [InstCombine] allow vector icmp bool transforms
llvm-svn: 271843
2016-06-05 17:49:45 +00:00
Sanjay Patel
b11050c641 add tests to show missing vector transforms
llvm-svn: 271842
2016-06-05 17:32:58 +00:00
Sanjay Patel
b1c8f8ce55 regenerate checks
llvm-svn: 271841
2016-06-05 17:29:45 +00:00
Sanjay Patel
605061c514 update test to use FileCheck
llvm-svn: 271840
2016-06-05 17:13:09 +00:00
Sanjay Patel
94e6bdaa7f fix documentation comments and other clean-ups; NFC
llvm-svn: 271839
2016-06-05 16:46:18 +00:00
Sanjay Patel
24556cdcec update test to use FileCheck
llvm-svn: 271838
2016-06-05 16:41:20 +00:00
Sanjay Patel
7c1912623f update test to FileCheck
llvm-svn: 271837
2016-06-05 16:29:15 +00:00
Simon Pilgrim
585db6f6c3 [X86][XOP] Added VPERMIL2PD/VPERMIL2PS raw mask decoding for target shuffle combines
llvm-svn: 271834
2016-06-05 15:21:30 +00:00
Simon Pilgrim
94a9893eda [X86][XOP] Added VPERMIL2PD/VPERMIL2PS as a target shuffle type
llvm-svn: 271831
2016-06-05 15:01:45 +00:00
Simon Pilgrim
8b04898abe [X86][XOP] Tidied up DecodeVPERMIL2PMask to more closely match DecodeVPERMILPMask.
llvm-svn: 271830
2016-06-05 14:33:43 +00:00
Craig Topper
2249826460 [AVX512] Add support for lowering PALIGNR for v64i8.
Could do this for other types to, but this is what's needed to replace the instrinsic with native IR in clang.

llvm-svn: 271828
2016-06-05 06:29:12 +00:00
Craig Topper
47e5abb616 [AVX512] Split command lines and regenerate a test to prepare for a future commit.
llvm-svn: 271827
2016-06-05 06:29:08 +00:00
Craig Topper
d8c697aad5 [AVX512] Fix PANDN combining for v4i32/v8i32 when VLX is enabled.
v4i32/v8i32 ANDs aren't promoted to v2i64/v4i64 when VLX is enabled.

llvm-svn: 271826
2016-06-05 05:35:11 +00:00
Xinliang David Li
6326853102 Fix wrong comment in header /NFC
llvm-svn: 271825
2016-06-05 05:18:20 +00:00
Xinliang David Li
27d32c7208 Fix pass declaration order /NFC
llvm-svn: 271824
2016-06-05 05:15:45 +00:00