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Author SHA1 Message Date
Lang Hames
5c5532d32d Disentangle moving a machine instr from updating LiveIntervals. 
llvm-svn: 150552
 2012-02-15 01:23:52 +00:00
Pete Cooper
bfec627c63 Added hook to let targets custom lower splitting of illegal vectors 
llvm-svn: 150550
 2012-02-15 00:55:31 +00:00
Chad Rosier
889c968001 Use a temporary variable, rather then a series of redundant calls. 
llvm-svn: 150538
 2012-02-15 00:36:26 +00:00
Pete Cooper
21409dd760 Stop custom lowering forr x86 DEC64m from happening if the load in the lowered sequence has more than 1 user 
llvm-svn: 150537
 2012-02-15 00:33:37 +00:00
Chad Rosier
00614de9ff Use a temporary variable, rather then a series of redundant calls. 
llvm-svn: 150536
 2012-02-15 00:23:55 +00:00
Jakob Stoklund Olesen
6dfa98e1c1 Fix global live range splitting regmask accuracy. 
Pretend that regmask interference ends at the 'dead' slot, even when
there is other interference ending at the 'reg' slot of the same
instruction.

llvm-svn: 150531
 2012-02-14 23:53:23 +00:00
Jakob Stoklund Olesen
c1054e87e4 Fix details in local live range splitting with regmasks. 
Perform all comparisons at instruction granularity, and make sure
register masks on uses count in both gaps.

llvm-svn: 150530
 2012-02-14 23:51:27 +00:00
Jakob Stoklund Olesen
b1738b3c04 Handle regmasks in findRegisterDefOperandIdx(). 
Only accept register masks when looking for an 'overlapping' def. When
Overlap is not set, the function searches for a proper definition of
Reg.

This means MI->modifiesRegister() considers register masks, but
MI->definesRegister() doesn't.

llvm-svn: 150529
 2012-02-14 23:49:37 +00:00
Jakob Stoklund Olesen
248b6c4556 Use the proper clobber check in handleLiveInRegister(). 
When a physreg is live in to a basic block, look for any instruction in
the block that clobbers the physreg.

The instruction doesn't have to properly redefine the register, any
overlapping clobber is OK.

This slightly changes live ranges when compiling with register masks.

llvm-svn: 150528
 2012-02-14 23:46:24 +00:00
Jakob Stoklund Olesen
bf8c36fea9 Dump live intervals in numerical order. 
The old DenseMap hashed order was very confusing.

llvm-svn: 150527
 2012-02-14 23:46:21 +00:00
Lang Hames
3a181593ec Don't create a new copy of reserved regs - we already have one handy. 
llvm-svn: 150525
 2012-02-14 23:06:12 +00:00
Chad Rosier
253ed7de62 Remove unnecessary assignment to temporary, ResultReg. 
llvm-svn: 150520
 2012-02-14 22:29:48 +00:00
Dmitri Gribenko
c4f5e8c3e2 Silence the new -Wempty-body warning. It appeared because the next statement 
after the `for(...) ;' has more indentation than for itself.

llvm-svn: 150516
 2012-02-14 22:17:14 +00:00
Aaron Ballman
a0bfab217b Using the new external-linkage warning recently added instead of disabling all return type warnings. 
llvm-svn: 150512
 2012-02-14 21:44:03 +00:00
Aaron Ballman
241c75de89 Fixing warning due to the new "UTD return type in extern 'C'". 
Patch by Matt Johnson

llvm-svn: 150508
 2012-02-14 21:29:32 +00:00
Bill Wendling
493a72b2fe Add code to the target lowering object file module to handle module flags. 
The MachO back-end needs to emit the garbage collection flags specified in the
module flags. This is a WIP, so the front-end hasn't been modified to emit these
flags just yet. Documentation and front-end switching to occur soon.

llvm-svn: 150507
 2012-02-14 21:28:13 +00:00
Lang Hames
e470bbc589 Update MachineVerifier to check the new physreg live-in rules. 
llvm-svn: 150496
 2012-02-14 19:17:48 +00:00
Lang Hames
11ccc79191 Tighten physical register invariants: Allocatable physical registers can 
only be live in to a block if it is the function entry point or a landing pad.

llvm-svn: 150494
 2012-02-14 18:51:53 +00:00
Nadav Rotem
5da800572a Fix PR12000. Some vector operations may use scalar operands with types 
that are greater than the vector element type. For example BUILD_VECTOR
of type <1 x i1> with a constant i8 operand.
This patch fixes the assertion.

llvm-svn: 150477
 2012-02-14 13:06:32 +00:00
Benjamin Kramer
3c5bcdba1a Turn push_back loops into append/insert. 
llvm-svn: 150471
 2012-02-14 10:29:27 +00:00
Bill Wendling
0f9a487360 Change error tests to coincide with message changes. 
llvm-svn: 150467
 2012-02-14 09:29:21 +00:00
Bill Wendling
d1355b33da Capitalize messages so that they appear nicely with the linker's error messages. 
llvm-svn: 150466
 2012-02-14 09:13:54 +00:00
Craig Topper
a754fb54b1 Move old movl vector_shuffle patterns. Not needed anymore since vector_shuffles shouldn't reach isel. 
llvm-svn: 150462
 2012-02-14 08:14:53 +00:00
Lang Hames
70bdeac646 Rename getExceptionAddressRegister() to getExceptionPointerRegister() for consistency with setExceptionPointerRegister(...). 
llvm-svn: 150460
 2012-02-14 04:45:49 +00:00
Lang Hames
724a5e8fe1 Use convenience function for consistency. 
llvm-svn: 150457
 2012-02-14 03:04:29 +00:00
Kostya Serebryany
7b2649a9ca [tsan] fix compiler warnings 
llvm-svn: 150449
 2012-02-14 00:52:07 +00:00
Lang Hames
a486c1b72e Third time's the charm...? 
llvm-svn: 150447
 2012-02-14 00:34:30 +00:00
Lang Hames
a20e2c80fd Unswap swap operands, partially reducing confusion. 
llvm-svn: 150444
 2012-02-14 00:17:12 +00:00
Kostya Serebryany
457b375949 [asan] fix asan-vs-gvn.ll test (it did not actually check much before this change) 
llvm-svn: 150441
 2012-02-14 00:02:35 +00:00
Andrew Trick
c1482c669a Add simplifyLoopLatch to LoopRotate pass. 
This folds a simple loop tail into a loop latch. It covers the common (in fortran) case of postincrement loops. It's a "free" way to expose this type of loop to downstream loop optimizations that bail out on non-canonical loops (getLoopLatch is a heavily used check).

llvm-svn: 150439
 2012-02-14 00:00:23 +00:00
Andrew Trick
89aab9961e whitespace 
llvm-svn: 150438
 2012-02-14 00:00:19 +00:00
Bill Wendling
e0204d6871 Don't reserve the R0 and R1 registers here. We don't use these registers, and 
marking them as "live-in" into a BB ruins some invariants that the back-end
tries to maintain.

llvm-svn: 150437
 2012-02-13 23:47:16 +00:00
Bill Wendling
1c47b5cbf5 Don't recalculate the size of the vector each time through the loop. 
llvm-svn: 150436
 2012-02-13 23:45:26 +00:00
Lang Hames
fab0ff3380 Make operands for VSWP read-modify-write. 
llvm-svn: 150433
 2012-02-13 23:37:19 +00:00
Jakob Stoklund Olesen
41b8a28aaa Add register mask support to ScheduleDAGRRList. 
The scheduler will sometimes check the implicit-def list on instructions
to properly handle pre-colored DAG edges.

Also check any register mask operands for physreg clobbers.

llvm-svn: 150428
 2012-02-13 23:25:24 +00:00
Devang Patel
7f07d60411 Check against umin while converting fcmp into an icmp. 
llvm-svn: 150425
 2012-02-13 23:05:18 +00:00
Dan Gohman
20fd978e4b Just like in regular escape analysis, loads and stores through 
(but not of) a block pointer do not cause the block pointer to
escape. This fixes rdar://10803830.

llvm-svn: 150424
 2012-02-13 22:57:02 +00:00
Kostya Serebryany
5cd1e1380f ThreadSanitizer, a race detector. First LLVM commit. 
Clang patch (flags) will follow shortly.
The run-time library will also follow, but not immediately.

llvm-svn: 150423
 2012-02-13 22:50:51 +00:00
Owen Anderson
13efe74a97 v2f16 is a floating point type. Add symbolic floating point type ranges to prevent this kind of issue in the future. 
llvm-svn: 150416
 2012-02-13 21:47:20 +00:00
Andrew Trick
b94e7e93b2 LiveIntervalAnalysis does not depend on MachineLoopInfo. 
llvm-svn: 150411
 2012-02-13 20:44:42 +00:00
Dylan Noblesmith
d07dd21f5c add LLVM_VERSION_MAJOR and _MINOR defines 
This is useful for clients that want to maintain compatibility
across multiple releases of LLVM. Currently users like Klee and
Mesa all have to roll their own 'parse llvm-config --version
output and generate defines' solution.

Also reuse the new macros so that version information is less
redundant/likely to fall out of sync again in the future.

llvm-svn: 150405
 2012-02-13 18:48:10 +00:00
Jakob Stoklund Olesen
52b793ba37 Check regmask interference for -join-physregs. 
llvm-svn: 150404
 2012-02-13 18:17:04 +00:00
Nadav Rotem
2141a8413e Fix a bug in DAGCombine for the optimization of BUILD_VECTOR. We cant generate a shuffle node from two vectors of different types. 
llvm-svn: 150383
 2012-02-13 12:42:26 +00:00
Ahmed Charles
e92b73aed8 Remove duplicate code in this header file which seemed to undergo a copy/paste fiasco. 
llvm-svn: 150369
 2012-02-13 09:45:36 +00:00
Craig Topper
f70ffc68b2 Still more vector_shuffle pattern removal. 
llvm-svn: 150365
 2012-02-13 07:23:41 +00:00
Ahmed Charles
bf926759cc Fix various issues (or do cleanups) found by enabling certain MSVC warnings. 
- Use unsigned literals when the desired result is unsigned. This mostly allows unsigned/signed mismatch warnings to be less noisy even if they aren't on by default.
- Remove misplaced llvm_unreachable.
- Add static to a declaration of a function on MSVC x86 only.
- Change some instances of calling a static function through a variable to simply calling that function while removing the unused variable.

llvm-svn: 150364
 2012-02-13 06:30:56 +00:00
Craig Topper
3073033e59 Remove more vector_shuffle patterns for unpack. These should be target specific nodes when they get to isel. 
llvm-svn: 150363
 2012-02-13 05:48:49 +00:00
Craig Topper
5cb2de69d8 Recommit r150328. Previous test failures should be fixed by r150360. 
llvm-svn: 150362
 2012-02-13 05:10:10 +00:00
Craig Topper
1487726cdf Revert accidental commit of a pruned testcase from r150360. 
llvm-svn: 150361
 2012-02-13 04:33:33 +00:00
Craig Topper
250c8fb194 Update CanXFormVExtractWithShuffleIntoLoad to ensure bitcasts of loads only have one use. Matches DAGCombiner and prevents vector_shuffles from reaching isel. 
llvm-svn: 150360
 2012-02-13 04:30:38 +00:00