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Commit Graph

18377 Commits

Author SHA1 Message Date
Lauro Ramos Venancio
5e0a3ef555 Fix a bug in getFrameRegister.
Reported by Raul Herbster.

llvm-svn: 36262
2007-04-19 14:09:38 +00:00
Zhou Sheng
9339daf407 Make use of ConstantInt::isZero instead of ConstantInt::isNullValue.
llvm-svn: 36261
2007-04-19 05:39:12 +00:00
Zhou Sheng
2cb77f2d6c Make the operations of APInt variables more efficient.
llvm-svn: 36260
2007-04-19 05:35:00 +00:00
Evan Cheng
91e0637ed3 Revert Owen's last check-in. This is breaking Mac OS X / PPC llvm-gcc bootstrap.
llvm-svn: 36258
2007-04-18 22:39:00 +00:00
Dan Gohman
bdb94669ba Fix the spelling of the prefetchnta instruction.
llvm-svn: 36256
2007-04-18 14:09:14 +00:00
Owen Anderson
16d1fd6ec8 Revert changes that caused breakage.
llvm-svn: 36255
2007-04-18 06:46:57 +00:00
Owen Anderson
781cbecd34 Switch more uses of DominatorTree over to ETForest.
llvm-svn: 36254
2007-04-18 05:43:13 +00:00
Owen Anderson
c3aa967684 Use ETForest instead of DominatorTree.
llvm-svn: 36252
2007-04-18 05:25:43 +00:00
Evan Cheng
fbbdb92c9d VarInfo::UsedBlocks is no longer used. Remove.
llvm-svn: 36250
2007-04-18 05:04:38 +00:00
Owen Anderson
c07f29d206 Use ETForest instead of DominatorTree.
llvm-svn: 36249
2007-04-18 04:55:33 +00:00
Owen Anderson
d8bb3aca7b Use new ETForest accessor.
llvm-svn: 36248
2007-04-18 04:46:35 +00:00
Owen Anderson
909895b564 Use ETForest instead of DominatorTree.
llvm-svn: 36247
2007-04-18 04:39:32 +00:00
Chris Lattner
ea3c945817 allow SRL to simplify its operands, as it doesn't demand all bits as input.
llvm-svn: 36245
2007-04-18 03:06:49 +00:00
Chris Lattner
4ce8602d58 When replacing a node in SimplifyDemandedBits, if the old node used any
single-use nodes, they will be dead soon.  Make sure to remove them before
processing other nodes.  This implements CodeGen/X86/shl_elim.ll

llvm-svn: 36244
2007-04-18 03:05:22 +00:00
Chris Lattner
639f807048 fix a pasto
llvm-svn: 36242
2007-04-18 03:01:40 +00:00
Evan Cheng
1325999a14 Don't populate TryAgainList when coalescing only physical registers with virtual registers.
llvm-svn: 36240
2007-04-18 02:30:19 +00:00
Devang Patel
ffbee86b8e Cache DT[*SI] lookup.
llvm-svn: 36239
2007-04-18 01:19:55 +00:00
Chris Lattner
0ee78670b8 don't access argument list of prototypes
llvm-svn: 36238
2007-04-18 00:57:22 +00:00
Devang Patel
daba9f7064 Fix
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070416/047971.html

llvm-svn: 36236
2007-04-18 00:53:01 +00:00
Evan Cheng
eecfac47a8 Increment use count of new virtuals created during PHI elimination.
llvm-svn: 36233
2007-04-18 00:36:11 +00:00
Chris Lattner
af290edea7 Be more careful when inserting reused instructions. This fixes CodeGen/Generic/2007-04-17-lsr-crash.ll
llvm-svn: 36231
2007-04-17 23:43:50 +00:00
Evan Cheng
fe5856c4f3 Oops. Didn't mean to check in a quick hack.
llvm-svn: 36227
2007-04-17 23:33:39 +00:00
Chris Lattner
1677782ef0 Fix a bug in my previous patch, grabbing the shift amount width from the
wrong operand.

llvm-svn: 36223
2007-04-17 22:53:02 +00:00
Chris Lattner
87296c2580 dag combiner just got better at pruning bits. This fixes CodeGen/ARM/rev.ll
llvm-svn: 36222
2007-04-17 22:39:58 +00:00
Chris Lattner
b55496c660 Fold (x << c1)>> c2 into a single shift if the bits shifted out aren't used.
This compiles:
int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }

into:
_baz:
        srwi r2, r3, 1
        extsh r3, r2
        blr

on PPC, instead of:
_baz:
        slwi r2, r3, 8
        srwi r2, r2, 9
        extsh r3, r2
        blr

GCC produces:
_baz:
        srwi r10,r4,24
        insrwi r10,r3,24,0
        srawi r9,r3,24
        srawi r3,r10,9
        extsh r3,r3
        blr

This implements CodeGen/PowerPC/shl_elim.ll

llvm-svn: 36221
2007-04-17 21:14:16 +00:00
Evan Cheng
48352d7a71 Copy coalescing change to prevent a physical register from being pin to a
long live interval that has low usage density.
1. Change order of coalescing to join physical registers with virtual
   registers first before virtual register intervals become too long.
2. Check size and usage density to determine if it's worthwhile to join.
3. If joining is aborted, assign virtual register live interval allocation
   preference field to the physical register.
4. Register allocator should try to allocate to the preferred register
   first (if available) to create identify moves that can be eliminated.

llvm-svn: 36218
2007-04-17 20:32:26 +00:00
Evan Cheng
c5d2df366a Add a register allocation preference field; add a method to compute size of a live interval.
llvm-svn: 36216
2007-04-17 20:25:11 +00:00
Evan Cheng
023342b277 Change getAllocatableSet() so it returns allocatable registers for a specific register class.
llvm-svn: 36215
2007-04-17 20:23:34 +00:00
Evan Cheng
94e0223e55 Keep track of number of uses within the function per virtual register.
llvm-svn: 36214
2007-04-17 20:22:11 +00:00
Anton Korobeynikov
60de2ce283 Add comment
llvm-svn: 36213
2007-04-17 19:34:00 +00:00
Chris Lattner
9ad682ad80 SIGN_EXTEND_INREG does not demand its top bits. Give SimplifyDemandedBits
a chance to hack on it.  This compiles:

int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }

into:
_baz:
        slwi r2, r3, 8
        srwi r2, r2, 9
        extsh r3, r2
        blr

instead of:

_baz:
        srwi r2, r4, 24
        rlwimi r2, r3, 8, 0, 23
        srwi r2, r2, 9
        extsh r3, r2
        blr

This implements CodeGen/PowerPC/sign_ext_inreg1.ll

llvm-svn: 36212
2007-04-17 19:03:21 +00:00
Dan Gohman
a7e1f3c85b Spell doFinalization right, so that it is a proper virtual override and
gets called.

llvm-svn: 36208
2007-04-17 18:21:36 +00:00
Chris Lattner
8e28e7654d remove use of BasicBlock::getNext
llvm-svn: 36205
2007-04-17 18:09:47 +00:00
Chris Lattner
af5c203dbd add a note
llvm-svn: 36203
2007-04-17 18:03:00 +00:00
Chris Lattner
d503b61318 remove use of BasicBlock::getNext
llvm-svn: 36202
2007-04-17 17:54:12 +00:00
Chris Lattner
e4323f863a Remove use of Instruction::getNext
llvm-svn: 36201
2007-04-17 17:52:45 +00:00
Chris Lattner
e5d747e0be eliminate use of Instruction::getNext()
llvm-svn: 36200
2007-04-17 17:51:03 +00:00
Chris Lattner
7b6a5d7956 remove use of Instruction::getNext
llvm-svn: 36199
2007-04-17 17:47:54 +00:00
Chris Lattner
058a0c6977 eliminate use of Instruction::getPrev(). Patch by Gabor Greif in 2005.
llvm-svn: 36198
2007-04-17 17:38:28 +00:00
Chris Lattner
09139c7951 eliminate a use of Instruction::getPrev(), patch by Gabor Greif in 2005.
llvm-svn: 36197
2007-04-17 17:36:12 +00:00
Chris Lattner
c7109ece27 rename X86FunctionInfo to X86MachineFunctionInfo to match the header file
it is defined in.

llvm-svn: 36196
2007-04-17 17:21:52 +00:00
Anton Korobeynikov
9bc4b792bf Implemented correct stack probing on mingw/cygwin for dynamic alloca's.
Also, fixed static case in presence of eax livin. This fixes PR331

PS: Why don't we still have push/pop instructions? :)
llvm-svn: 36195
2007-04-17 09:20:00 +00:00
Chris Lattner
db7de8e497 merge several fields in GlobalValue to use the same word, move CallingConv
field into SubclassData in Value.  This shrinks GlobalVAlue from 48->40
bytes, Function from 88->76, and GlobalVariable from 76->68.  This trims
4640 bytes off my testcase, reading a bc file without materializing any
functions.

llvm-svn: 36192
2007-04-17 04:31:29 +00:00
Andrew Lenharth
c894d4e3ce Use this nifty Constraints thing and fix the inverted conditional moves
llvm-svn: 36191
2007-04-17 04:07:59 +00:00
Chris Lattner
cc56e116fe The (negative) offset from a SymbolTableListTraits-using ilist to its container
object is always constant.  As such, evaluate it at compile time instead of storing
it as an ivar in SymbolTableListTraits.  This shrinks every SymbolTableListTraits
ilist by a word, shrinking BasicBlock from 44->40 bytes, Function from 96->88 bytes,
and Module from 60->52 bytes.

llvm-svn: 36189
2007-04-17 04:04:14 +00:00
Chris Lattner
71a21677f4 Refactor SymbolTableListTraits to only have a single pointer in it, instead
of two.  This shrinkifies Function by 8 bytes (104->96) and Module by 8
bytes (68->60).  On a testcase of mine, this reduces the memory used to
read a module header from 565680b to 561024, a little over 4K.

llvm-svn: 36188
2007-04-17 03:26:42 +00:00
Chris Lattner
be225f5300 SSE4 is apparently public now.
llvm-svn: 36185
2007-04-17 00:02:37 +00:00
Reid Spencer
67ab398ba3 Make long line fit in 80 cols.
llvm-svn: 36183
2007-04-16 23:32:28 +00:00
Devang Patel
7d868316fd Fix
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070416/047888.html

llvm-svn: 36182
2007-04-16 23:03:45 +00:00
Reid Spencer
b640dc70f9 Fix problems in the PartSet lowering having to do with incorrect bit width.
llvm-svn: 36180
2007-04-16 22:21:14 +00:00