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Author SHA1 Message Date
Bill Wendling
607b3c3898 Only delete instructions once. 
llvm-svn: 138700
 2011-08-27 06:10:02 +00:00
Bill Wendling
aeeb59947e Update to new EH scheme. 
llvm-svn: 138699
 2011-08-27 04:53:41 +00:00
Bill Wendling
38b5c3a5bc Cannot have an llvm.eh.exception call in a non-landing pad block. 
llvm-svn: 138698
 2011-08-27 04:53:28 +00:00
Bill Wendling
a23e3f4f85 These splits should be done whether they are critical edges or not. 
llvm-svn: 138697
 2011-08-27 04:40:37 +00:00
Andrew Trick
e38568bc07 Fix PassManager stack depths. 
Patch by Xiaoyi Guo!

llvm-svn: 138695
 2011-08-27 02:11:03 +00:00
Andrew Trick
eb9fa3f9bc Excluding ARM JIT tests until someone can fix this compilation path. 
llvm-svn: 138676
 2011-08-26 23:39:30 +00:00
Owen Anderson
fd21da3506 Improve encoding support for BLX with immediat eoperands, and fix a BLX decoding bug this uncovered. 
llvm-svn: 138675
 2011-08-26 23:32:08 +00:00
Owen Anderson
9b85a034c9 Correct encoding of BL with immediate offset. 
llvm-svn: 138673
 2011-08-26 22:54:51 +00:00
Jim Grosbach
fb526fdc70 ARM assembly parsing tweak for pldw. 
llvm-svn: 138669
 2011-08-26 22:21:51 +00:00
Owen Anderson
f47325fc54 Spelling fail. 
llvm-svn: 138667
 2011-08-26 21:47:57 +00:00
Jim Grosbach
6071776c8a Thumb2 assembler parsing and encoding of IT instruction. 
This handles only the handling of the IT instruction itself, not the
processing and validation of the instructions in the IT block. That's next,
and will include encoding tests for IT itself.

llvm-svn: 138665
 2011-08-26 21:43:41 +00:00
Bill Wendling
21d93fcc0e Update the dominator tree with the correct dominator for the new 'unwind' block. 
llvm-svn: 138664
 2011-08-26 21:36:12 +00:00
Eli Friedman
9f95c7d381 Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction. 
llvm-svn: 138660
 2011-08-26 21:21:21 +00:00
Bill Wendling
88b318ca91 Split the landing pad block only if it's a critical edge. Also intelligently 
split it in the other place where we're splitting critical edges.

llvm-svn: 138658
 2011-08-26 21:18:55 +00:00
Owen Anderson
e7857867d6 Fix ARM codegen breakage caused by r138653. 
llvm-svn: 138657
 2011-08-26 21:12:37 +00:00
Bill Wendling
5b7cbeacad Revert r138606 until LowerInvoke has been converted to the new EH scheme. 
llvm-svn: 138656
 2011-08-26 21:11:23 +00:00
Eric Christopher
09fd6a961c Whitespace and 80-col. 
llvm-svn: 138654
 2011-08-26 21:02:40 +00:00
Owen Anderson
af51fd9868 invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons. We were failing to specify enough fixed bits of LDR_PRE/LDRB_PRE, resulting in decoding conflicts. Separate them into immediate vs. register versions, allowing us to specify the necessary fixed bits. This in turn results in the test being decoded properly, and being rejected as UNPREDICTABLE rather than a hard failure. 
llvm-svn: 138653
 2011-08-26 20:43:14 +00:00
Andrew Trick
0c3e000af1 valgrind: Always suppress tblgen leaks. 
I'll clean up the rest of the XFAIL: vg_leak lines if this works.

llvm-svn: 138652
 2011-08-26 20:41:20 +00:00
Bill Wendling
400ec8bd8f Don't sink landingpad instructions during ind-var simplification. 
llvm-svn: 138651
 2011-08-26 20:40:15 +00:00
Andrew Trick
f20e2ff394 Use %% for literals in RUN lines. 
llvm-svn: 138647
 2011-08-26 20:09:48 +00:00
Owen Anderson
7658e342c3 Update for feedback from Jim. 
llvm-svn: 138642
 2011-08-26 19:39:26 +00:00
Douglas Gregor
7d590ad966 lit: Add %T as a replacement for the output directory 
llvm-svn: 138640
 2011-08-26 19:05:18 +00:00
Benjamin Kramer
b279f20034 ARMDisassembler: Always return a size, even when disassembling fails. 
This should fix PR10772.

llvm-svn: 138636
 2011-08-26 18:21:36 +00:00
Owen Anderson
86b11d01eb Support an extension of ARM asm syntax to allow immediate operands to ADR instructions. This is helpful for disassembler testing, and indeed exposed a disassembler bug that is also fixed here. 
llvm-svn: 138635
 2011-08-26 18:09:22 +00:00
Benjamin Kramer
86d6b6f9cb We don't care if TableGen leaks memory. 
llvm-svn: 138634
 2011-08-26 17:00:30 +00:00
Kalle Raiskila
914b04c32b Don't insert branch hint lables that are never used. 
llvm-svn: 138630
 2011-08-26 10:14:56 +00:00
Owen Anderson
485eda7687 Add a testcase for r138625. 
llvm-svn: 138626
 2011-08-26 06:45:08 +00:00
Owen Anderson
87c906dabf Fix PR10755 by checking for invalid predicate codes from UNPREDICTABLE t2IT instructions when decoding their successors. 
This is the last disassembly crash detected by exhaustive Thumb2 instruction space.  Major thanks to Chandler Carruth for making this kind of exhaustive testing possible.

llvm-svn: 138625
 2011-08-26 06:19:51 +00:00
Craig Topper
b20cee1e19 Fix disassembling of VCVTSD2SI 
llvm-svn: 138623
 2011-08-26 04:49:29 +00:00
Andrew Trick
504187a152 LoopInfo::updateUnloop fix, and verify Block->Loop maps. 
Fixes an oversight, and adds verification to catch it in the unloop.ll tests.

llvm-svn: 138622
 2011-08-26 03:06:34 +00:00
Eli Friedman
802dd20495 Atomic load/store on ARM/Thumb. 
I don't really like the patterns, but I'm having trouble coming up with a
better way to handle them.

I plan on making other targets use the same legalization
ARM-without-memory-barriers is using... it's not especially efficient, but
if anyone cares, it's not that hard to fix for a given target if there's
some better lowering.

llvm-svn: 138621
 2011-08-26 02:59:24 +00:00
Benjamin Kramer
0e1a09f38c Address review comments. 
- Reword comments.
- Allow undefined behavior interfering with undefined behavior.
- Add address space checks.

llvm-svn: 138619
 2011-08-26 02:25:55 +00:00
Benjamin Kramer
dc1c57af91 SimplifyCFG: If we have a PHI node that can evaluate to NULL and do a load or store to the address returned by the PHI node then we can consider this incoming value as dead and remove the edge pointing there, unless there are instructions that can affect control flow executed in between. 
In theory this could be extended to other instructions, eg. division by zero, but it's likely that it will "miscompile" some code because people depend on div by zero not trapping. NULL pointer dereference usually leads to a crash so we should be on the safe side.

This shrinks the size of a Release clang by 16k on x86_64.

llvm-svn: 138618
 2011-08-26 01:22:29 +00:00
Bill Wendling
077e9ea84b Update to the new EH scheme. 
llvm-svn: 138606
 2011-08-25 23:48:37 +00:00
Bill Wendling
0eb4df639e Look at only the terminators of the basic block. Also, if we're using the new EH 
scheme, return 'true' so that it doesn't try to run the old EH scheme's fixup on
the new code.

llvm-svn: 138605
 2011-08-25 23:48:11 +00:00
Bill Wendling
546c7a05de Initial check in that will auto-upgrade the old EH scheme to the new EH scheme. 
This upgrade suffers from the problems of the old EH scheme - i.e., that the
calls to llvm.eh.exception() and llvm.eh.selector() can wander off and get
lost. It makes a valiant effort to reclaim these little lost lambs.

This is a first draft, so it hasn't yet been hooked up to the parser.

llvm-svn: 138602
 2011-08-25 23:22:40 +00:00
Bruno Cardoso Lopes
e6119d18de Do the same as r138461. Mark VZEROALL as clobbering all YMM registers 
llvm-svn: 138592
 2011-08-25 22:23:58 +00:00
Nick Lewycky
59cb9e0d85 Remove stray fullstop. 
llvm-svn: 138589
 2011-08-25 21:46:20 +00:00
Bruno Cardoso Lopes
5b3d2c9e17 Add support for AVX 256-bit version of MOVDDUP! 
llvm-svn: 138588
 2011-08-25 21:40:37 +00:00
Bruno Cardoso Lopes
dedd2ffa0b Make isMOVDDUP mask check more strict and update comments! 
llvm-svn: 138587
 2011-08-25 21:40:34 +00:00
David Greene
4cca5f784a Constify Comparison 
Make ConstantInt::uge() const so it may be used in const contexts.

llvm-svn: 138579
 2011-08-25 20:18:22 +00:00
Owen Anderson
d387b48b0b Port over additional encoding tests to decoding tests, and fix an operand ordering bug this exposed. 
llvm-svn: 138575
 2011-08-25 18:30:18 +00:00
Benjamin Kramer
d710063e1e Intel family 6 model 44 is Gulftown/Westmere-EP and doesn't have AVX. 
llvm-svn: 138573
 2011-08-25 18:05:56 +00:00
Andrew Trick
0dd0ae11f8 ARM fix for missing implicit operands on ldmia_ret. 
rdar://10005094: miscompile of 176.gcc

llvm-svn: 138568
 2011-08-25 17:50:53 +00:00
Andrew Trick
cd6126c2ab whitespace 
llvm-svn: 138566
 2011-08-25 17:40:54 +00:00
Jim Grosbach
e8641a3bc7 Explicitly disallow predication in Thumb1 assembly. 
llvm-svn: 138562
 2011-08-25 17:23:55 +00:00
Craig Topper
a6085b9757 Add more missing TB encodings to VEX instructions to allow them to be disassembled. Fixes remainder of PR10678. 
llvm-svn: 138553
 2011-08-25 08:11:01 +00:00
Craig Topper
5af7ba783d Give ATTR_VEX higher priority when generating the disassembler context table. Fixes disassembling of VEX instructions with 'pp'=00. Fixes subset of PR10678. 
llvm-svn: 138552
 2011-08-25 07:42:00 +00:00
Craig Topper
06ed6cb856 Add TB encoding to VEROALL, VZEROUPPER, and VCVTPS2PD to allow them to be disassembled. Fixes PR10723. 
llvm-svn: 138551
 2011-08-25 06:57:46 +00:00