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Commit Graph

2808 Commits

Author SHA1 Message Date
Bill Wendling
86f6fdc7e3 - Initialize "--no-builtin" to "false".
- Testcase for r56885.

llvm-svn: 56886
2008-09-30 21:40:30 +00:00
Bill Wendling
9ad453e943 Add the new `-no-builtin' flag. This flag is meant to mimic the GCC
`-fno-builtin' flag. Currently, it's used to replace "memset" with "_bzero"
instead of "__bzero" on Darwin10+. This arguably violates the meaning of this
flag, but is currently sufficient. The meaning of this flag should become more
specific over time.

llvm-svn: 56885
2008-09-30 21:22:07 +00:00
Dan Gohman
19530c810d Move the primary fast-isel top-level comments to FastISel.cpp, where
they'll be a little more visible. Also, update and reword them a bit.

llvm-svn: 56877
2008-09-30 20:48:29 +00:00
Dan Gohman
5a2169ee6e Optimize SelectionDAG's AssignTopologicalOrder even further.
Completely eliminate the TopOrder std::vector. Instead, sort
the AllNodes list in place. This also eliminates the need to
call AllNodes.size(), a linear-time operation, before
performing the sort.

Also, eliminate the Sources temporary std::vector, since it
essentially duplicates the sorted result as it is being
built.

This also changes the direction of the topological sort
from bottom-up to top-down. The AllNodes list starts out in
roughly top-down order, so this reduces the amount of
reordering needed. Top-down is also more convenient for
Legalize, and ISel needed only minor adjustments.

llvm-svn: 56867
2008-09-30 18:30:35 +00:00
Dale Johannesen
52987eab6e Remove misuse of ReplaceNodeResults for atomics with
valid types.  No functional change.

llvm-svn: 56808
2008-09-29 22:25:26 +00:00
Dan Gohman
f78676d0b6 Fix FastISel to not initialize the PIC-base register multiple times
in functions with PIC references from more than one basic block.

llvm-svn: 56807
2008-09-29 21:55:50 +00:00
Bill Wendling
7273078850 Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc:
/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition  -isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include  -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311.
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
{standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression
{standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
...

llvm-svn: 56703
2008-09-26 22:10:44 +00:00
Dan Gohman
989db64c93 Rename ConstantSDNode's getSignExtended to getSExtValue, for
consistancy with ConstantInt, and re-implement it in terms
of ConstantInt's getSExtValue.

llvm-svn: 56700
2008-09-26 21:54:37 +00:00
Evan Cheng
9946443460 Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0.
llvm-svn: 56683
2008-09-26 19:48:35 +00:00
Dale Johannesen
3f62c40108 Add "inreg" field to CallSDNode (doesn't increase
its size).  Adjust various lowering functions to
pass this info through from CallInst.  Use it to
implement sseregparm returns on X86.  Remove
X86_ssecall calling convention.

llvm-svn: 56677
2008-09-26 19:31:26 +00:00
Devang Patel
64dd7a2e89 Large mechanical patch.
s/ParamAttr/Attribute/g
s/PAList/AttrList/g
s/FnAttributeWithIndex/AttributeWithIndex/g
s/FnAttr/Attribute/g

This sets the stage 
- to implement function notes as function attributes and 
- to distinguish between function attributes and return value attributes.

This requires corresponding changes in llvm-gcc and clang.

llvm-svn: 56622
2008-09-25 21:00:45 +00:00
Dale Johannesen
62f64ab4c8 Accept 'inreg' attribute on x86 functions as
meaning sse_regparm (i.e. float/double values go
in XMM0 instead of ST0).  Update documentation
to reflect reality.

llvm-svn: 56619
2008-09-25 20:47:45 +00:00
Dan Gohman
9bb92ce6e9 Support for i1 XOR in FastISel. It is actually safe because
i1 operands are assumed to already by zero-extended.

llvm-svn: 56615
2008-09-25 17:22:52 +00:00
Dan Gohman
51cd436ad8 Don't print fast-isel debug messages by default. Thanks Chris!
llvm-svn: 56614
2008-09-25 17:21:42 +00:00
Dan Gohman
5ee9d9af7f Don't forget the newline in debug output.
llvm-svn: 56613
2008-09-25 17:17:27 +00:00
Dan Gohman
b63e6de501 FastISel support for debug info.
llvm-svn: 56610
2008-09-25 17:05:24 +00:00
Richard Pennington
1db9263b05 bug 2812: Segmentation fault on a big emdiam processor.
llvm-svn: 56609
2008-09-25 16:15:10 +00:00
Dan Gohman
1776533304 Fix a recent fast-isel coverage regression - don't bail out before
giving the target a chance to materialize constants.

llvm-svn: 56605
2008-09-25 01:28:51 +00:00
Dan Gohman
ed3216739e Enable DeadMachineInstructionElim when Fast-ISel is enabled.
llvm-svn: 56604
2008-09-25 01:14:49 +00:00
Evan Cheng
bac8250ba4 <rdar://problem/6234798> Assertion failed: (!OpInfo.AssignedRegs.Regs.empty() && "Couldn't allocate input reg!")
llvm-svn: 56597
2008-09-25 00:14:04 +00:00
Dale Johannesen
4184c23365 Remove SelectionDag early allocation of registers
for earlyclobbers.  Teach Local RA about earlyclobber,
and add some tests for it.

llvm-svn: 56592
2008-09-24 23:13:09 +00:00
Bill Wendling
7c60c6e7bf Reapplying r56550
llvm-svn: 56553
2008-09-24 10:25:02 +00:00
Bill Wendling
236c4d0204 Forgot this part with my last patch. Sorry about the breakage.
llvm-svn: 56552
2008-09-24 10:16:24 +00:00
Eric Christopher
8ffa64fdb5 Temporarily revert r56550 until missing commit can be added.
llvm-svn: 56551
2008-09-24 08:30:44 +00:00
Bill Wendling
456b33b615 Refactor the constant folding code into it's own function. And call it from both
the SelectionDAG and DAGCombiner code. The only functionality change is that now
the DAG combiner is performing the constant folding for these operations instead
of being a no-op.

This is *not* in response to a bug, so there isn't a testcase.

llvm-svn: 56550
2008-09-24 07:11:26 +00:00
Dale Johannesen
bc29bec7f8 Next round of earlyclobber handling. Approach the
RA problem by expanding the live interval of an
earlyclobber def back one slot.  Remove
overlap-earlyclobber throughout.  Remove 
earlyclobber bits and their handling from
live internals.

llvm-svn: 56539
2008-09-24 01:07:17 +00:00
Evan Cheng
f942615847 Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc.
llvm-svn: 56526
2008-09-24 00:05:32 +00:00
Devang Patel
a3e9bf1bca s/ParameterAttributes/Attributes/g
llvm-svn: 56513
2008-09-23 23:03:40 +00:00
Dan Gohman
01a070f9c7 Arrange for FastISel code to have access to the MachineModuleInfo
object. This will be needed to support debug info.

llvm-svn: 56508
2008-09-23 21:53:34 +00:00
Dan Gohman
52a9adb3fa Replace the LiveRegs SmallSet with a simple counter that keeps
track of the number of live registers, which is all the set was
being used for.

llvm-svn: 56498
2008-09-23 18:50:48 +00:00
Dan Gohman
28970ed355 Fix the alignment of loads from constant pool entries when the
load address has an offset from the base of the constant pool
entry.

llvm-svn: 56479
2008-09-22 22:40:08 +00:00
Dale Johannesen
3722f4c14c Make log, log2, log10, exp, exp2 use Expand by
default.

llvm-svn: 56471
2008-09-22 21:57:32 +00:00
Evan Cheng
638ae1be58 Per review feedback: Only perform
(srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c))
etc. when both "trunc" and "and" have single uses.

llvm-svn: 56452
2008-09-22 18:19:24 +00:00
Oscar Fuentes
0f25988689 Initial support for the CMake build system.
llvm-svn: 56419
2008-09-22 01:08:49 +00:00
Bill Wendling
3ee08ff81e Add helper function to get a 32-bit floating point constant. No functionality change.
llvm-svn: 56418
2008-09-22 00:44:35 +00:00
Chris Lattner
01cab96cba don't print GlobalAddressSDNode's with an offset of zero as "foo0".
llvm-svn: 56399
2008-09-21 18:38:31 +00:00
Dan Gohman
f66b3277d3 Refactor X86SelectConstAddr, folding it into X86SelectAddress. This
results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.

llvm-svn: 56371
2008-09-19 22:16:54 +00:00
Dan Gohman
b7c5b0f44b Add a new "fast" scheduler. This is currently basically just a
copy of the BURRList scheduler, but with several parts ripped
out, such as backtracking, online topological sort maintenance
(needed by backtracking), the priority queue, and Sethi-Ullman
number computation and maintenance (needed by the priority
queue). As a result of all this, it generates somewhat lower
quality code, but that's its tradeoff for running about 30%
faster than list-burr in -fast mode in many cases.

This is somewhat experimental. Moving forward, major pieces of
this can be refactored with pieces in common with
ScheduleDAGRRList.cpp.

llvm-svn: 56307
2008-09-18 16:26:26 +00:00
Dale Johannesen
99091ed94f Add a bit to mark operands of asm's that conflict
with an earlyclobber operand elsewhere.  Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way 
that conflicts with an earlyclobber.  See also comments.

llvm-svn: 56290
2008-09-17 21:13:11 +00:00
Dan Gohman
4bef47e8c3 Don't worry about clobbering physical register defs that aren't used.
llvm-svn: 56281
2008-09-17 15:25:49 +00:00
Evan Cheng
6cfbecd1fa When converting a CopyFromReg to a copy instruction, use the register class of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes.
llvm-svn: 56258
2008-09-16 23:12:11 +00:00
Dan Gohman
9cbb3f591a Change SelectionDAG::getConstantPool to always set the alignment of the
ConstantPoolSDNode, using the target's preferred alignment for the
constant type.

In LegalizeDAG, when performing loads from the constant pool, the
ConstantPoolSDNode's alignment is used in the calls to getLoad and
getExtLoad.

This change prevents SelectionDAG::getLoad/getExtLoad from incorrectly
choosing the ABI alignment for constant pool loads when Alignment == 0.
The incorrect alignment is only a performance issue when ABI alignment
does not equal preferred alignment (i.e., on x86 it was generating
MOVUPS instead of MOVAPS for v4f32 constant loads when the default ABI
alignment for 128bit vectors is forced to 1 byte.)

Patch by Paul Redmond!

llvm-svn: 56253
2008-09-16 22:05:41 +00:00
Bill Wendling
932818c75a Reverting r56249. On further investigation, this functionality isn't needed.
Apologies for the thrashing.

llvm-svn: 56251
2008-09-16 21:48:12 +00:00
Dan Gohman
6da3227304 Include the alignment value when displaying ConstantPoolSDNodes.
llvm-svn: 56250
2008-09-16 21:18:22 +00:00
Bill Wendling
1a240c8033 - Change "ExternalSymbolSDNode" to "SymbolSDNode".
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol

These changes pave the way to allowing SymbolSDNodes with non-external linkage.

llvm-svn: 56249
2008-09-16 21:12:30 +00:00
Dan Gohman
37457ca74b Don't take the time to CheckDAGForTailCallsAndFixThem when tail calls
are not enabled. Instead just omit the tail call flag when calls are
created.

llvm-svn: 56235
2008-09-16 01:42:28 +00:00
Dan Gohman
f38d63884f Re-enable SelectionDAG CSE for calls. It matters in the case of
libcalls, as in this testcase on ARM.

llvm-svn: 56226
2008-09-15 19:46:03 +00:00
Dan Gohman
3450a8252f Define CallSDNode, an SDNode subclass for use with ISD::CALL.
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.

And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.

CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.

llvm-svn: 56183
2008-09-13 01:54:27 +00:00
Dan Gohman
082879cfde Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and
ConstantFP* instead of APInt and APFloat directly.

This reduces the amount of time to create ConstantSDNode
and ConstantFPSDNode nodes when ConstantInt* and ConstantFP*
respectively are already available, as is the case in
SelectionDAGBuild.cpp. Also, it reduces the amount of time
to legalize constants into constant pools, and the amount of
time to add ConstantFP operands to MachineInstrs, due to
eliminating ConstantInt::get and ConstantFP::get calls.

It increases the amount of work needed to create new constants
in cases where the client doesn't already have a ConstantInt*
or ConstantFP*, such as legalize expanding 64-bit integer constants
to 32-bit constants. And it adds a layer of indirection for the
accessor methods. But these appear to be outweight by the benefits
in most cases.

It will also make it easier to make ConstantSDNode and
ConstantFPNode more consistent with ConstantInt and ConstantFP.

llvm-svn: 56162
2008-09-12 18:08:03 +00:00
Dale Johannesen
6395da3510 Pass "earlyclobber" bit through to machine
representation; coalescer and RA need to know
about it.  No functional change.

llvm-svn: 56161
2008-09-12 17:49:03 +00:00