RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-30 07:22:55 +01:00
Code Issues Projects Releases Wiki Activity
22,515 Commits 4 Branches 5 Tags 704 MiB
62908083eb
Commit Graph

677 Commits

Author SHA1 Message Date
Evan Cheng
1d7435f478 * Make sure complex pattern operands are selected first since their select 
functions can return false and causing the instruction pattern match to fail.
* Code clean up.

llvm-svn: 24642
 2005-12-09 00:48:42 +00:00
Evan Cheng
ed205f20a5 * Added an explicit type field to ComplexPattern. 
* Renamed MatchingNodes to RootNodes.

llvm-svn: 24636
 2005-12-08 02:14:08 +00:00
Evan Cheng
d11d31e0bd Added support for ComplexPattern. These are patterns that require C++ pattern 
matching code that is not currently auto-generated by tblgen, e.g. X86
addressing mode. Selection routines for complex patterns can return multiple operands, e.g. X86 addressing mode returns 4.

llvm-svn: 24634
 2005-12-08 02:00:36 +00:00
Evan Cheng
3d51fa3305 * Infer instruction property hasCtrlDep from pattern if it has one. 
* Fixed a bug related to hasCtrlDep property use.

llvm-svn: 24610
 2005-12-05 23:08:55 +00:00
Chris Lattner
8ef7c0297c Implement PR673: for explicit register references, use type information 
if available

llvm-svn: 24597
 2005-12-05 02:36:37 +00:00
Chris Lattner
e64b6d64d0 Add some methods 
llvm-svn: 24596
 2005-12-05 02:35:08 +00:00
Chris Lattner
5c7d4632f6 Generate code to silence bogus GCC warnings. 
llvm-svn: 24593
 2005-12-05 00:48:51 +00:00
Evan Cheng
cf4f349880 * Commit the fix (by Chris) for a tblgen type inferencing bug. 
* Enhanced tblgen to handle instructions which have chain operand and writes a
chain result.
* Enhanced tblgen to handle instructions which produces no results. Part of
the change is a temporary hack which relies on instruction property (e.g.
isReturn, isBranch). The proper fix would be to change the .td syntax to
separate results dag from ops dag.

llvm-svn: 24587
 2005-12-04 08:18:16 +00:00
Nate Begeman
811a41a87c Support multiple ValueTypes per RegisterClass, needed for upcoming vector 
work.  This change has no effect on generated code.

llvm-svn: 24563
 2005-12-01 04:51:06 +00:00
Evan Cheng
9c3508e1ab Teach tblgen to accept register source operands in patterns, e.g. 
def SHL8rCL  : I<0xD2, MRM4r, (ops R8 :$dst, R8 :$src),
                 "shl{b} {%cl, $dst|$dst, %CL}",
                 [(set R8:$dst, (shl R8:$src, CL))]>, Imp<[CL],[]>;

This generates a CopyToReg operand and added its 2nd result to the shl as
a flag operand.

llvm-svn: 24557
 2005-12-01 00:18:45 +00:00
Nate Begeman
b79a074c0a Nuke CodeGenInstruction's ValueType member, it is no longer used. 
llvm-svn: 24556
 2005-12-01 00:12:04 +00:00
Nate Begeman
466eaefd38 Stop checking the ValueType of the CodeGenInstruction. Instead, use the 
ValueType from the RegisterClass or Operands.  This step is necessary to
allow RegisterClasses to have multiple ValueTypes.

llvm-svn: 24555
 2005-12-01 00:06:14 +00:00
Nate Begeman
3935bea6c1 fit into 80 columns 
llvm-svn: 24554
 2005-11-30 23:58:18 +00:00
Chris Lattner
7678189bc6 Make the code generated by tblgen return the result of SelectNodeTo, to 
permit future changes.

llvm-svn: 24553
 2005-11-30 23:08:45 +00:00
Nate Begeman
84be54b731 No longer track value types for asm printer operands, and remove them as 
an argument to every operand printing function.  Requires some slight
tweaks to x86, the only user.

llvm-svn: 24541
 2005-11-30 18:54:35 +00:00
Nate Begeman
ed43f5159f Fix some copy and paste typos. 
llvm-svn: 24540
 2005-11-30 18:37:14 +00:00
Evan Cheng
5395a80640 Better error message when unrecognized opcode is seen. 
llvm-svn: 24519
 2005-11-29 18:44:58 +00:00
Nate Begeman
e4d7c1b7dd Add the new vector types to tablegen 
llvm-svn: 24514
 2005-11-29 06:19:38 +00:00
Chris Lattner
3727cc7ac0 Initialize this variable on all paths, fixing a crasher in windows. Thanks 
to JeffC for pointing this out.

llvm-svn: 24426
 2005-11-19 07:48:33 +00:00
Chris Lattner
a36ad00a9a Teach tblgen about instruction operands that have multiple MachineInstr 
operands, digging into them to find register values (used on X86).  Patch
by Evan Cheng!

llvm-svn: 24424
 2005-11-19 07:05:57 +00:00
Chris Lattner
6b83dcf750 Validate that the input to 'Pat' patterns is sane. 
llvm-svn: 24393
 2005-11-17 17:43:52 +00:00
Chris Lattner
464f4402cf teach tblgen to be smart enough to handle tglobaladdr nodes 
llvm-svn: 24391
 2005-11-17 07:39:45 +00:00
Chris Lattner
b545ab1ac1 fix a tblgen bug that Evan ran into, where we would lose the '$src' name 
on patterns like "(set R32:$dst, (i32 imm:$src))"

llvm-svn: 24383
 2005-11-16 23:14:54 +00:00
Chris Lattner
fdc590eec9 remove these labels, there are now bigger jumps in the graph that are unlabeled 
llvm-svn: 24365
 2005-11-15 06:44:15 +00:00
Jim Laskey
42681c1d58 1. Remove ranges from itinerary data. 
2. Tidy up the subtarget emittined code.

llvm-svn: 24172
 2005-11-03 22:47:41 +00:00
Chris Lattner
5a4c453d60 Reject integer literals that are out of range for their type. 
llvm-svn: 24162
 2005-11-03 05:46:11 +00:00
Chris Lattner
e3897f6c24 Add support for immediates directly in the pattern, this allows itanium to 
define:

def : Pat<(i1 1), (CMPEQ r0, r0)>;

llvm-svn: 24149
 2005-11-02 06:49:14 +00:00
Jim Laskey
4cb1e29b27 Allow itineraries to be passed through the Target Machine. 
llvm-svn: 24139
 2005-11-01 20:06:59 +00:00
Jeff Cohen
1a0261fe4f Keep VC++ happy. 
llvm-svn: 24137
 2005-11-01 18:04:06 +00:00
Chris Lattner
e42da1ae45 Let people who run the nightly tester specify paths to external tests, instead 
of having to hack the nightly tester script itself.

as an example, I use the following for my machine:

$HOME/llvm/utils/NightlyTest.pl -parallel -release -enable-llcbeta \
     -spec2000path /Volumes/ProjectsDisk/cvs/benchmarks/speccpu2000-llvm/benchspec/ \
     -povraypath /Volumes/ProjectsDisk/cvs/benchmarks/povray31 \
     -namdpath /Volumes/ProjectsDisk/cvs/benchmarks/namd

llvm-svn: 24136
 2005-11-01 17:59:42 +00:00
Jim Laskey
1c66d7fb02 Emit itinerary class in instruction info. 
llvm-svn: 24122
 2005-10-31 17:16:46 +00:00
Jim Laskey
d79749c8a5 Generate cpu to itinerary map. 
llvm-svn: 24121
 2005-10-31 17:16:01 +00:00
Chris Lattner
d420fe3bfa Revert an accidental commit. 
llvm-svn: 24098
 2005-10-29 17:01:41 +00:00
Chris Lattner
9fd7ba3c84 Make negative immediates in patterns work correctly, silence some warnings 
building the itanium backend.

llvm-svn: 24095
 2005-10-29 16:39:40 +00:00
Chris Lattner
d44a96088b Switch more code over to using getValueAsListOfDefs. Look at all the -'s. :) 
llvm-svn: 24074
 2005-10-28 22:59:53 +00:00
Chris Lattner
06c5e018ef Rename Record::getValueAsListDef to getValueAsListOfDefs, to more accurately 
reflect what it is.
Convert some more code over to use it.

llvm-svn: 24072
 2005-10-28 22:49:02 +00:00
Chris Lattner
dea00d4a37 Use the new interface Jim added 
llvm-svn: 24071
 2005-10-28 22:43:25 +00:00
Jim Laskey
b86d73937d Removed Mr. Smith from the code. 
llvm-svn: 24070
 2005-10-28 21:47:29 +00:00
Jim Laskey
7bfb35c1ef Added method to return a vector of records for a ListInit of Def field. This 
simplifies using list of records.

llvm-svn: 24069
 2005-10-28 21:46:31 +00:00
Chris Lattner
f3945f73db The nightly tester report doesn't report JIT code size anymore, remove it 
from the olden graph.

llvm-svn: 24057
 2005-10-28 16:35:18 +00:00
Jim Laskey
dba6376b92 Add some commentary. 
llvm-svn: 24055
 2005-10-28 15:20:43 +00:00
Jeff Cohen
744bfe72c0 Keep Visual Studio happy. 
llvm-svn: 24052
 2005-10-28 01:43:09 +00:00
Jim Laskey
1910cbd4dc Now generating instruction itineraries for scheduling. Not my best work, but... 
llvm-svn: 24050
 2005-10-27 19:47:21 +00:00
Jim Laskey
75494b3a8b Simplify. 
llvm-svn: 24015
 2005-10-26 17:49:21 +00:00
Jim Laskey
9ce53d8411 Give full control of subtarget features over to table generated code. 
llvm-svn: 24013
 2005-10-26 17:30:34 +00:00
Chris Lattner
b462de0868 Condcodes are in the ISD namespace 
llvm-svn: 24010
 2005-10-26 17:02:02 +00:00
Chris Lattner
acc8e41a83 Add support for CondCode's 
llvm-svn: 24008
 2005-10-26 16:59:37 +00:00
Chris Lattner
60d02fd01f Emit some boilerplate for targets 
llvm-svn: 23983
 2005-10-25 20:35:14 +00:00
Jim Laskey
bb03da2612 Refactored to make room for more stuff (scheduling info.) 
llvm-svn: 23975
 2005-10-25 15:16:36 +00:00
Chris Lattner
ffa72e8d79 Fix an incompatibility with GCC 4.1, thanks to Vladimir Merzliakov 
for pointing this out!

llvm-svn: 23963
 2005-10-24 15:04:15 +00:00
Chris Lattner
b621e451ba Add the needed #include, emit enums with the sizes of tables, remove 
definitions from the LLVM namespace, since they are all static.

llvm-svn: 23907
 2005-10-23 22:33:08 +00:00
Chris Lattner
fbab2de9dd Remove the obsolete instr selector emitter 
llvm-svn: 23894
 2005-10-23 05:47:52 +00:00
Jim Laskey
f0f90be71c Sort the features and processor lists for the sake of search (and maintainers.) 
llvm-svn: 23879
 2005-10-22 07:59:56 +00:00
Jim Laskey
1fbdee408d Plugin new subtarget backend into the build. 
llvm-svn: 23870
 2005-10-21 19:05:19 +00:00
Jim Laskey
c2e76396fc New TableGen backends for subtarget information. Only command line stuff 
active now.  Scheduling itinerary next.

llvm-svn: 23869
 2005-10-21 19:00:04 +00:00
Chris Lattner
b018f20c7b Make tblgen emit: 
tblgen: In ZAPNOTi: Cannot use 'IZAPX' in an input pattern!
for a bad pattern, instead of an ugly assertion.

llvm-svn: 23854
 2005-10-21 01:19:59 +00:00
Chris Lattner
1bac5bc8a3 add support for literal immediates in patterns to match, allowing us to 
write things like this:

def : Pat<(add GPRC:$in, 12),
          (ADD12 GPRC:$in)>;

Andrew: if this isn't enough or doesn't work for you, please lemme know.
llvm-svn: 23819
 2005-10-19 04:41:05 +00:00
Chris Lattner
1b8609b570 Add basic support for integer constants in pattern results. 
llvm-svn: 23817
 2005-10-19 04:30:56 +00:00
Chris Lattner
cac2ff4864 Fix some checking that was causing duraid to get a perplexing assertion 
instead of a happy error message

llvm-svn: 23816
 2005-10-19 04:12:14 +00:00
Chris Lattner
39538be7a5 Add support for patterns that have physical registers in them. Testcase: 
def : Pat<(trunc G8RC:$in),
          (OR8To4 G8RC:$in, X0)>;

Even though this doesn't make any sense on PPC :)

llvm-svn: 23815
 2005-10-19 02:07:26 +00:00
Chris Lattner
2a81cf4395 Asserting here is to violent 
llvm-svn: 23814
 2005-10-19 01:55:23 +00:00
Chris Lattner
0816495607 Nate wants to define 'Pat's which turn into instructions that don't have 
patterns.  Certainly a logical request.

llvm-svn: 23810
 2005-10-19 01:27:22 +00:00
Chris Lattner
fbf3838a61 Duraid pointed out that it is impolite to emit PPC:: into the IA64 backend 
llvm-svn: 23780
 2005-10-18 04:41:01 +00:00
Chris Lattner
a4dc9eda40 Make the generated code significantly more memory efficient, by using 
SelectNodeTo instead of getTargetNode when possible.

llvm-svn: 23758
 2005-10-16 01:41:58 +00:00
Chris Lattner
5a4ed7e8ab Implement the last major missing piece in the DAG isel generator: when emitting 
a pattern match, make sure to emit the (minimal number of) type checks that
verify the pattern matches this specific instruction.  This allows FMA32
patterns to not match double expressions for example.

llvm-svn: 23748
 2005-10-15 21:34:21 +00:00
Chris Lattner
3aa7a188b9 Now that we have int/fp lattice values, implement the SDTCisOpSmallerThanOp 
type constraint.  This lets tblgen realize that it doesn't need any dynamic
type checks for fextend/fround on PPC (and many other targets), because there
are only two fp types.

llvm-svn: 23730
 2005-10-14 06:25:00 +00:00
Chris Lattner
28621890d9 Fairly serious rework of the typing code to add new int/fp lattice values. 
Overall, no functionality change yet though.

llvm-svn: 23729
 2005-10-14 06:12:03 +00:00
Chris Lattner
c5dbaceaee simplify the code a bit 
llvm-svn: 23728
 2005-10-14 05:08:37 +00:00
Chris Lattner
d83bbd0f14 Add basic support for recognizing a new SDTCisOpSmallerThanOp type constraint 
llvm-svn: 23725
 2005-10-14 04:53:53 +00:00
Chris Lattner
81047cdfc0 Implement a couple of new (important) features. 
1. If an operation has to be int or fp and the target only supports one
   int or fp type, relize that the op has to have that type.
2. If a target has operations on multiple types, do not emit matching code
   for patterns involving those operators, since we do not emit the code to
   check for them yet.  This prevents PPC from generating FP ops currently.

Also move some code around into more logical places.

llvm-svn: 23724
 2005-10-14 04:11:13 +00:00
Chris Lattner
ee8c8e4562 Do not let getLegalValueTypes return a list with duplicates in it 
llvm-svn: 23723
 2005-10-14 03:54:49 +00:00
Patrick Meredith
120fb3b9ad Updated to be less restrictive on what is matched 
llvm-svn: 23712
 2005-10-13 17:31:30 +00:00
Chris Lattner
11f7589eaa apparently one of the makefile changes changed libprofile.so to profile.so 
llvm-svn: 23709
 2005-10-13 16:34:24 +00:00
Patrick Meredith
ea6da36ab2 This script is used to remove nodes with the label %tmp(.#)* and all 
edges associated with said node from the dot files produced by
DSA.

llvm-svn: 23708
 2005-10-13 16:26:50 +00:00
Chris Lattner
187d775d80 put the right labels on the data 
llvm-svn: 23599
 2005-10-02 21:51:38 +00:00
Chris Lattner
cccadf388c Emit the value type for each register class. 
llvm-svn: 23584
 2005-10-02 06:23:37 +00:00
Chris Lattner
c744d9398f Rename MRegisterDesc -> TargetRegisterDesc for consistency 
llvm-svn: 23564
 2005-09-30 17:49:27 +00:00
Chris Lattner
f29abb6f4a remove some more initializers 
llvm-svn: 23562
 2005-09-30 17:41:05 +00:00
Chris Lattner
6124aae803 trim down the target info structs now that we have a preferred spill register class for each callee save register 
llvm-svn: 23560
 2005-09-30 17:35:22 +00:00
Chris Lattner
2da37b0d74 Compute a preferred spill register class for each callee-save register 
llvm-svn: 23553
 2005-09-30 06:44:45 +00:00
Chris Lattner
7b69bfc7b6 Fix a warning 
llvm-svn: 23550
 2005-09-30 06:09:50 +00:00
Chris Lattner
7e3972b706 Regenerate 
llvm-svn: 23549
 2005-09-30 04:53:25 +00:00
Chris Lattner
2b7ab1f445 Refactor this a bit to move ParsingTemplateArgs to only apply to classes, 
not defs.

Implement support for forward definitions of classes.  This implements
TableGen/ForwardRef.td.

llvm-svn: 23548
 2005-09-30 04:53:04 +00:00
Chris Lattner
c0830ec129 Regenerate 
llvm-svn: 23546
 2005-09-30 04:42:56 +00:00
Chris Lattner
2e4e3a8678 Generate a parse error instead of a checked exception if template args are 
used on a def.

llvm-svn: 23545
 2005-09-30 04:42:31 +00:00
Chris Lattner
3a8b099f34 regenerate 
llvm-svn: 23543
 2005-09-30 04:11:27 +00:00
Chris Lattner
baa6d77025 Refactor the grammar a bit to implement TableGen/ForwardRef.td 
llvm-svn: 23542
 2005-09-30 04:10:49 +00:00
Chris Lattner
7be456ae2f allow regs to be in multiple reg classes 
llvm-svn: 23540
 2005-09-30 01:33:48 +00:00
Chris Lattner
10a8d57590 Teach tablegen to reassociate operators when possible. This allows it to 
find all of teh pattern matches for EQV from one definition

llvm-svn: 23529
 2005-09-29 22:36:54 +00:00
Chris Lattner
31a9d318a3 Teach tblgen to build permutations of instructions, so that the target author 
doesn't have to specify them manually.  It currently handles associativity,
e.g. knowing that (X*Y)+Z  also matches  X+(Y*Z)  and will be extended in
the future.

It is smart enough to not introduce duplicate patterns or patterns that can
never match.

llvm-svn: 23526
 2005-09-29 19:28:10 +00:00
Chris Lattner
86a339dc34 add support for an associative marker 
llvm-svn: 23502
 2005-09-28 20:58:06 +00:00
Chris Lattner
0231f57a46 Emit an error if instructions or patterns are defined but can never match. 
Currently we check that immediate values live on the RHS of commutative
operators.  Defining ORI like this, for example:

def ORI   : DForm_4<24, (ops GPRC:$dst, GPRC:$src1, u16imm:$src2),
                    "ori $dst, $src1, $src2",
                    [(set GPRC:$dst, (or immZExt16:$src2, GPRC:$src1))]>;

results in:

tblgen: In ORI: Instruction can never match: Immediate values must be on the RHS of commutative operators!
llvm-svn: 23501
 2005-09-28 19:27:25 +00:00
Chris Lattner
18ccb532b5 collect commutativity information 
llvm-svn: 23499
 2005-09-28 18:28:29 +00:00
Chris Lattner
5dae8ab260 Prefer cheaper patterns to more expensive ones. Print the costs to the generated 
file

llvm-svn: 23492
 2005-09-28 17:57:56 +00:00
Chris Lattner
eeead91a84 Select Constant nodes to TargetConstant nodes 
llvm-svn: 23488
 2005-09-28 16:58:06 +00:00
Chris Lattner
cdeed56e4e memoize the assert results 
llvm-svn: 23457
 2005-09-26 22:10:24 +00:00
Chris Lattner
5c061685a2 Emit the switch stmt cases in alphabetical order instead of pointer order, 
which is not stable.

llvm-svn: 23456
 2005-09-26 21:59:35 +00:00
Chris Lattner
ad79bd3f47 implement a fixme: only select values once, even if used multiple times. 
llvm-svn: 23454
 2005-09-26 21:53:26 +00:00
Jeff Cohen
a5c4ff5a96 Fix VC++ build errors. 
llvm-svn: 23431
 2005-09-25 19:04:43 +00:00
Chris Lattner
fc89cbf740 memoize translations 
llvm-svn: 23419
 2005-09-24 00:50:51 +00:00
Chris Lattner
9e2188cf4e Teach the DAG isel generator to emit code that creates nodes. 
Fix a few corner cases parsing things like (i32 imm:$foo)

llvm-svn: 23417
 2005-09-24 00:40:24 +00:00
Chris Lattner
7c7fbdc7e1 Emit better code (no more copies for var references), and support DAG patterns 
(e.g. things like rotates).

llvm-svn: 23416
 2005-09-23 23:16:51 +00:00
Chris Lattner
8c19aa13c8 Fix a fixme by passing around SDOperand's instead of SDNode*'s 
llvm-svn: 23415
 2005-09-23 21:53:45 +00:00
Chris Lattner
6c5dfefcb3 Emit code that matches the incoming DAG pattern and checks predicates. 
This does not check that types match yet, but PPC only has one integer type
;-).

This also doesn't have the code to build the resultant dag.

llvm-svn: 23414
 2005-09-23 21:33:23 +00:00
Chris Lattner
9949ef9748 emit information about the order patterns are to be matched. 
llvm-svn: 23413
 2005-09-23 20:52:47 +00:00
Chris Lattner
d9b4002bac start filling in the switch stmt 
llvm-svn: 23412
 2005-09-23 19:36:15 +00:00
Chris Lattner
2e3569b604 Fix a minor bug, add comments 
llvm-svn: 23370
 2005-09-16 00:29:46 +00:00
Chris Lattner
4c1ec1c784 teach the type inference code how to infer types for instructions and node 
xforms.  Run type inference on result patterns, so we always have fully typed
results (and to catch errors in .td files).

llvm-svn: 23369
 2005-09-15 22:23:50 +00:00
Chris Lattner
07b63eafa1 put instructions into a map instead of a vector for quick lookup 
llvm-svn: 23368
 2005-09-15 21:57:35 +00:00
Chris Lattner
335614b54a when parsing instructions remember information about the types taken and 
returned.

llvm-svn: 23367
 2005-09-15 21:51:12 +00:00
Chris Lattner
66c08682d9 Start parsing "Pattern" nodes 
llvm-svn: 23365
 2005-09-15 21:42:00 +00:00
Chris Lattner
fe7a70834b rename a couple of methods, add structure for pattern parsing 
llvm-svn: 23364
 2005-09-15 02:38:02 +00:00
Chris Lattner
ab6886a31d Verify that xform functions only occur in logical places 
llvm-svn: 23363
 2005-09-14 23:05:13 +00:00
Chris Lattner
6f94c802a2 Promote xform fns to be explicit nodes in result patterns, and clean off 
predicates since they will have already matched at this point.

llvm-svn: 23362
 2005-09-14 23:01:59 +00:00
Chris Lattner
57cae81b5e start building the instruction dest pattern correctly. Change the xform 
functions to preserve the Record for the xform instead of making it into a
function name.

llvm-svn: 23361
 2005-09-14 22:55:26 +00:00
Chris Lattner
a6a0d51065 catch unnamed inputs 
llvm-svn: 23360
 2005-09-14 22:06:36 +00:00
Chris Lattner
f749a0ef7c check that there are no unexpected operands 
llvm-svn: 23359
 2005-09-14 21:59:34 +00:00
Chris Lattner
9c196b02fa force all instruction operands to be named. 
llvm-svn: 23358
 2005-09-14 21:13:50 +00:00
Chris Lattner
c19f24f3d7 Check that operands have unique names. REJECT instructions with broken operand 
lists: only don't parse them if they are entirely missing (sparcv9).

llvm-svn: 23355
 2005-09-14 21:05:02 +00:00
Chris Lattner
3cbcb9f5d6 fix a broke range check 
llvm-svn: 23354
 2005-09-14 21:04:12 +00:00
Chris Lattner
a5ba887c02 Parse significantly more of the instruction pattern, now collecting and 
verifying information about the operands.

llvm-svn: 23353
 2005-09-14 20:53:42 +00:00
Chris Lattner
901ddab7b1 Verify that set destinations occur first in the instruction operand list. 
llvm-svn: 23351
 2005-09-14 18:19:25 +00:00
Chris Lattner
76f1dae1af add an accessor 
llvm-svn: 23349
 2005-09-14 18:02:53 +00:00
Chris Lattner
72cfebc71b remove some code that isn't ready for prime time 
llvm-svn: 23346
 2005-09-14 06:03:10 +00:00
Chris Lattner
c4ae94aa32 Switch to a slightly more structured representation for instructions 
llvm-svn: 23345
 2005-09-14 04:03:16 +00:00
Chris Lattner
77cc161bd5 Add some more checking/verification code 
llvm-svn: 23344
 2005-09-14 02:11:12 +00:00
Chris Lattner
9ab561788e start parsing instructions into patterns, start doing many more checks of 
'set's.

llvm-svn: 23343
 2005-09-14 00:09:24 +00:00
Chris Lattner
e2591652a2 don't emit the namespace inside the class! 
llvm-svn: 23341
 2005-09-13 22:05:02 +00:00
Chris Lattner
1da656efd4 Emit code suitable for emission into the ISel class, allowing us to use/define 
methods.

llvm-svn: 23340
 2005-09-13 22:03:37 +00:00
Chris Lattner
9bb7fff501 continue xform function parsing 
llvm-svn: 23338
 2005-09-13 21:59:15 +00:00
Chris Lattner
abc740453c Start parsing node transformation information 
llvm-svn: 23337
 2005-09-13 21:51:00 +00:00
Chris Lattner
0dd99c9aaf Add a new Record::getValueAsCode method to mirror the other getValueAs* 
methods.  Use it to simplify some code.

llvm-svn: 23336
 2005-09-13 21:44:28 +00:00
Chris Lattner
4e59482982 completely eliminate TreePattern::PatternType 
llvm-svn: 23335
 2005-09-13 21:20:49 +00:00
Chris Lattner
773456a944 Regenerate 
llvm-svn: 23311
 2005-09-12 05:30:06 +00:00
Chris Lattner
8b34f3d20d Rearrange two rules, which apparently makes some versions of bison happier. 
llvm-svn: 23310
 2005-09-12 05:29:43 +00:00
Jeff Cohen
7e6b5c60fc Fix miscellaneous Visual Studio build problems. 
llvm-svn: 23307
 2005-09-10 02:00:02 +00:00
Chris Lattner
ada7ac14a1 add an accessor to provide more checking 
llvm-svn: 23289
 2005-09-09 01:15:01 +00:00
Chris Lattner
2490f8f606 use new accessors to simplify code. Add checking to make sure top-level instr 
definitions are void

llvm-svn: 23288
 2005-09-09 01:11:44 +00:00
Chris Lattner
2b656c6102 add some accessors 
llvm-svn: 23287
 2005-09-09 01:11:17 +00:00
Chris Lattner
334e21eb98 Fix incorrect comment 
llvm-svn: 23285
 2005-09-08 23:26:30 +00:00
Chris Lattner
a6d21c974c Implement a complete type inference system for dag patterns, based on the 
constraints defined in the DAG node definitions in the .td files.  This
allows us to infer (and check!) the types for all nodes in the current
ppc .td file.  For example, instead of:

Inst pattern EQV:       (set GPRC:i32:$rT, (xor (xor GPRC:i32:$rA, GPRC:i32:$rB), (imm)<<Predicate_immAllOnes>>))

we now fully infer:

Inst pattern EQV:       (set:void GPRC:i32:$rT, (xor:i32 (xor:i32 GPRC:i32:$rA, GPRC:i32:$rB), (imm:i32)<<Predicate_immAllOnes>>))

from:  (set GPRC:$rT, (not (xor GPRC:$rA, GPRC:$rB)))
llvm-svn: 23284
 2005-09-08 23:22:48 +00:00
Chris Lattner
e2fb8f3a77 Compute the value types that are natively supported by a target. 
llvm-svn: 23282
 2005-09-08 21:43:21 +00:00
Chris Lattner
152a72de2c Parse information about type constraints on SDNodes 
llvm-svn: 23281
 2005-09-08 21:27:15 +00:00
Chris Lattner
ef07fffe37 use node info in the one place we currently use it 
llvm-svn: 23280
 2005-09-08 21:04:46 +00:00
Chris Lattner
d9930002aa start parsing SDNode info records 
llvm-svn: 23279
 2005-09-08 21:03:01 +00:00
Chris Lattner
515c19f56d Fix indentation 
llvm-svn: 23276
 2005-09-08 19:47:28 +00:00
Chris Lattner
b07d2cc2eb regenerate 
llvm-svn: 23275
 2005-09-08 18:48:47 +00:00
Chris Lattner
df9876cdb7 Add support for automatically created anonymous definitions. 
This implements Regression/TableGen/AnonDefinitionOnDemand.td

llvm-svn: 23274
 2005-09-08 18:48:23 +00:00
Chris Lattner
9e7e8d43e8 regenerate 
llvm-svn: 23271
 2005-09-08 18:22:57 +00:00
Chris Lattner
2e3ed074d8 Tabs to spaces. 
llvm-svn: 23270
 2005-09-08 18:22:35 +00:00