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Author SHA1 Message Date
Owen Anderson
62faf296dd Tighten operand checking on memory barrier instructions. 
llvm-svn: 137176
 2011-08-09 23:25:42 +00:00
NAKAMURA Takumi
604b538820 VMCore/BasicBlock.cpp: Don't assume BasicBlock::iterator might end with a non-PHInode Instruction in successors. 
Frontends(eg. clang) might pass incomplete form of IR, to step off the way beyond iterator end. In the case I had met, it took infinite loop due to meeting bogus PHInode.

Thanks to Jay Foad and John McCall.

llvm-svn: 137175
 2011-08-09 23:13:05 +00:00
NAKAMURA Takumi
9c7aa146af Fix whitespace. 
llvm-svn: 137174
 2011-08-09 23:12:56 +00:00
Owen Anderson
869ce85500 Tighten operand checking on CPS instructions. 
llvm-svn: 137172
 2011-08-09 23:05:39 +00:00
Owen Anderson
c85618de24 Fix an oversight in the FixedLenDecoderEmitter where we weren't correctly checking the success result of custom decoder hooks on singleton decodings. 
llvm-svn: 137171
 2011-08-09 23:05:23 +00:00
Eli Friedman
5a2d27800e Representation of 'atomic load' and 'atomic store' in IR. 
llvm-svn: 137170
 2011-08-09 23:02:53 +00:00
Owen Anderson
8ad37f68a2 Create a new register class for the set of all GPRs except the PC. Use it to tighten our decoding of BFI. 
llvm-svn: 137168
 2011-08-09 22:48:45 +00:00
Bruno Cardoso Lopes
7461b930f3 Add v16i16 and v32i8 store patterns 
llvm-svn: 137166
 2011-08-09 22:39:53 +00:00
Chad Rosier
8f9a9969d0 Fix 80-column violations. 
llvm-svn: 137163
 2011-08-09 22:23:40 +00:00
Rafael Espindola
0e580ecc63 Add missing file. 
llvm-svn: 137162
 2011-08-09 22:19:52 +00:00
Bruno Cardoso Lopes
028c6aa951 Use fp unpack instructions to unpack int types. Until we have AVX2, this 
is the best we can do for these patterns. This fix PR10554.

llvm-svn: 137161
 2011-08-09 22:18:37 +00:00
Eli Friedman
44fd5b2b59 Fix a couple ridiculous copy-paste errors. rdar://9914773 . 
llvm-svn: 137160
 2011-08-09 22:17:39 +00:00
Rafael Espindola
48a85d74bb Add a C interface to PassManagerBuilder. It is missing the addExtension 
functionality since in the C api a pass is created and added to a pass
manager in a single call.

llvm-svn: 137159
 2011-08-09 22:17:34 +00:00
Jim Grosbach
5a837d70a5 Don't truncate MachO addresses. 
Assigned symbol addresses get truncated to 32-bits, even on 64-bit platforms.
That's obviously bogus.
For example,

 .globl _foo
 .equ _foo, 0x987654321ULL


rdar://9922863

llvm-svn: 137158
 2011-08-09 22:12:37 +00:00
Benjamin Kramer
ca48bdfd5b ARM Disassembler: sign extend branch immediates. 
Not sure about BLXi, but this is what the old disassembler did.

llvm-svn: 137156
 2011-08-09 22:02:50 +00:00
Owen Anderson
4232cf9141 Silence an false-positive warning. 
llvm-svn: 137154
 2011-08-09 21:38:14 +00:00
Owen Anderson
09d5afaefa Don't generate the old-style disassembler in CMake builds either. 
llvm-svn: 137153
 2011-08-09 21:36:11 +00:00
Benjamin Kramer
ed2b147693 The new ARM disassembler disassembles "bx lr" as a special BX_ret instruction so target specific analysis isn't needed anymore. 
llvm-svn: 137151
 2011-08-09 21:34:19 +00:00
Owen Anderson
2443a29f51 Don't continue generating the old-style decoder file. 
llvm-svn: 137150
 2011-08-09 21:30:29 +00:00
Jim Grosbach
d47981e34a ARM fix typo in pre-indexed store lowering. 
rdar://9915869

llvm-svn: 137148
 2011-08-09 21:22:41 +00:00
Owen Anderson
433265b44e Attempt to fix CMake build. 
llvm-svn: 137147
 2011-08-09 21:09:59 +00:00
Owen Anderson
2aa4c7e391 Tighten Thumb1 branch predicate decoding. 
llvm-svn: 137146
 2011-08-09 21:07:45 +00:00
Eli Friedman
5927cb56e3 First draft of the practical guide to atomics. 
This is mostly descriptive of the intended state once atomic load and store have landed.  

llvm-svn: 137145
 2011-08-09 21:07:10 +00:00
Owen Anderson
ffe1c55752 Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter. 
This new disassembler can correctly decode all the testcases that the old one did, though
some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in
operand checking as the old one was.

llvm-svn: 137144
 2011-08-09 20:55:18 +00:00
Bob Wilson
1ac635c712 Put Darwin-specific code inside an __APPLE__ ifdef. 
llvm-svn: 137137
 2011-08-09 19:54:32 +00:00
Bill Wendling
250ea7930e Revert r137134. It breaks some code as Eli pointed out. 
llvm-svn: 137135
 2011-08-09 18:56:35 +00:00
Bill Wendling
ca256c0d2d Print out the variable declaration only if it is a declaration. Otherwise, a 
'static' variable will be emitted twice.
PR10081

llvm-svn: 137134
 2011-08-09 18:31:50 +00:00
Jakob Stoklund Olesen
e43aca1c39 Inflate register classes after coalescing. 
Coalescing can remove copy-like instructions with sub-register operands
that constrained the register class.  Examples are:

  x86: GR32_ABCD:sub_8bit_hi -> GR32
  arm: DPR_VFP2:ssub0 -> DPR

Recompute the register class of any virtual registers that are used by
less instructions after coalescing.

This affects code generation for the Cortex-A8 where we use NEON
instructions for f32 operations, c.f. fp_convert.ll:

  vadd.f32  d16, d1, d0
  vcvt.s32.f32  d0, d16

The register allocator is now free to use d16 for the temporary, and
that comes first in the allocation order because it doesn't interfere
with any s-registers.

llvm-svn: 137133
 2011-08-09 18:19:41 +00:00
Bruno Cardoso Lopes
633400ee00 Reapply a more appropriate solution than in r137114. AVX supports 
v4f64 = sitofp v4i32. This fix PR10559.
Also add support for v4i32 = fptosi v4f64.

llvm-svn: 137128
 2011-08-09 17:39:13 +00:00
Bruno Cardoso Lopes
1962a341d8 Revert r137114 
llvm-svn: 137127
 2011-08-09 17:39:01 +00:00
Justin Holewinski
021ab783b7 PTX: Add initial support for device function calls 
- Calls are supported on SM 2.0+ for function with no return values

llvm-svn: 137125
 2011-08-09 17:36:31 +00:00
Jakob Stoklund Olesen
cbd8bcf3b8 Move CalculateRegClass to MRI::recomputeRegClass. 
This function doesn't have anything to do with spill weights, and MRI
already has functions for manipulating the register class of a virtual
register.

llvm-svn: 137123
 2011-08-09 16:46:27 +00:00
Renato Golin
dc14179294 Emitting ARM build attributes and values as ULEB, rather than char. 
llvm-svn: 137115
 2011-08-09 09:50:10 +00:00
Bruno Cardoso Lopes
5dac86dac6 Handle sitofp between v4f64 <- v4i32. Fix PR10559 
llvm-svn: 137114
 2011-08-09 05:48:01 +00:00
Bob Wilson
a97bb9535d Recognize the UNAME_RELEASE environment variable to match Darwin's uname. 
When this variable is set, "uname -r" will return its value instead of the
real OS version.  Make this affect LLVM's triple for consistency.
<rdar://problem/9919167>

llvm-svn: 137111
 2011-08-09 05:13:36 +00:00
Andrew Trick
b9ef7f9e3e LoopUnroll looks like it has some stale code. Remove it to prove my sanity and avoid further confusion. 
llvm-svn: 137106
 2011-08-09 03:11:29 +00:00
Bruno Cardoso Lopes
d521431558 Add support for avx vector fextend 
llvm-svn: 137105
 2011-08-09 03:04:29 +00:00
Bruno Cardoso Lopes
09a727298f Add AVX versions of 128-bit sitofp and fptosi 
llvm-svn: 137104
 2011-08-09 03:04:25 +00:00
Bruno Cardoso Lopes
81534df169 Rename and tidy up tests 
llvm-svn: 137103
 2011-08-09 03:04:23 +00:00
Bruno Cardoso Lopes
1025d1eb3b Add two patterns to match special vmovss and vmovsd cases. Also fix 
the patterns already there to be more strict regarding the predicate.
This fixes PR10558

llvm-svn: 137100
 2011-08-09 01:43:09 +00:00
Bill Wendling
e3f1ab16df There is only one instance of this placeholder being created. Just use that 
instead of a vector.

llvm-svn: 137099
 2011-08-09 01:17:10 +00:00
Bill Wendling
23cae0966d Remove an instance where the 'unwind' instruction was created. 
The 'unwind' instruction was acting essentially as a placeholder, because it
would be replaced at the end of this function by a branch to the "unwind
handler". The 'unwind' instruction is going away, so use 'unreachable' instead,
which serves the same purpose as a placeholder.

llvm-svn: 137098
 2011-08-09 01:09:21 +00:00
Devang Patel
4e5d42a98e Print variable's inline location in debug output. 
llvm-svn: 137096
 2011-08-09 01:03:35 +00:00
Devang Patel
1d038e6e01 Provide method to print variable's extended name which includes inline location. 
llvm-svn: 137095
 2011-08-09 01:03:14 +00:00
Jakob Stoklund Olesen
4872d9f414 Rename member variables to follow coding standards. 
No functional change.

llvm-svn: 137094
 2011-08-09 01:01:27 +00:00
Bill Wendling
0359c2012c Add missing attributes to the C++ backend's output. 
llvm-svn: 137091
 2011-08-09 00:47:30 +00:00
Bruno Cardoso Lopes
d7eac41193 Make LowerVSETCC aware of AVX types and add patterns to match them. 
llvm-svn: 137090
 2011-08-09 00:46:57 +00:00
Jakob Stoklund Olesen
ef49b7bc1a Move the RegisterCoalescer private to its implementation file. 
RegisterCoalescer.h still has the CoalescerPair class interface.

llvm-svn: 137088
 2011-08-09 00:43:37 +00:00
Dan Gohman
a716e5c67e Tidy up these testcases to look more like real code does. 
llvm-svn: 137085
 2011-08-09 00:33:11 +00:00
Jakob Stoklund Olesen
2f58336f2f Refer to the RegisterCoalescer pass by ID. 
A public interface is no longer needed since RegisterCoalescer is not an
analysis any more.

llvm-svn: 137082
 2011-08-09 00:29:53 +00:00