2 Commits

Author	SHA1	Message	Date
Owen Anderson	ffe1c55752	Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter. ... This new disassembler can correctly decode all the testcases that the old one did, though some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in operand checking as the old one was. llvm-svn: 137144	2011-08-09 20:55:18 +00:00
Johnny Chen	96fd9620c8	A8.6.92 MCR (Encoding A1): if coproc == '101x' then SEE "Advanced SIMD and VFP" ... Since these "Advanced SIMD and VFP" instructions have more specfic encoding bits specified, if coproc == 10 or 11, we should reject the insn as invalid. rdar://problem/9239922 rdar://problem/9239596 llvm-svn: 129027	2011-04-06 20:49:02 +00:00