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Commit Graph

101663 Commits

Author SHA1 Message Date
Daniel Sanders
63d91193e2 [mips] Added a full set of instruction test cases for all ISA's (but not ASE's).
Summary:
Where those ISA's are not currently supported, the test is run with the smallest
superset of that ISA.

Some instructions are valid but don't pass yet. These have been placed in the
valid-xfail.s's which will XPASS if _any_ instruction starts working.

The valid.s's do not verify the encoding yet. There are also no tests checking that instructions from neighbouring ISA's are not accepted.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3214

llvm-svn: 205180
2014-03-31 12:13:12 +00:00
Hal Finkel
724ed34f6e Look at shuffles of build_vectors in DAGCombiner::visitEXTRACT_VECTOR_ELT
When the loop vectorizer vectorizes code that uses the loop induction variable,
we often end up with IR like this:

  %b1 = insertelement <2 x i32> undef, i32 %v, i32 0
  %b2 = shufflevector <2 x i32> %b1, <2 x i32> undef, <2 x i32> zeroinitializer
  %i = add <2 x i32> %b2, <i32 2, i32 3>

If the add in this example is not legal (as is the case on PPC with VSX), it
will be scalarized, and we'll end up with a number of extract_vector_elt nodes
with the vector shuffle as the input operand, and that vector shuffle is fed by
one or more build_vector nodes. By the time that vector operations are
expanded, visitEXTRACT_VECTOR_ELT will not create new extract_vector_elt by
looking through the vector shuffle (to make sure that no illegal operations are
created), and so the extract_vector_elt -> vector shuffle -> build_vector is
never simplified to an operand of the build vector.

By looking at build_vectors through a shuffle we fix this particular situation,
preventing a vector from being built, only to be deconstructed again (for the
scalarized add) -- an expensive proposition when this all needs to be done via
the stack. We probably want a more comprehensive fix here where we look back
recursively through any shuffles to any build_vectors or scalar_to_vectors,
etc. but that can come later.

llvm-svn: 205179
2014-03-31 11:43:19 +00:00
Daniel Sanders
2dfa220035 [mips] Check emitted code for llvm.bswap.i32 on MIPS16/MIPS64 and llvm.bswap.i64 on MIPS16.
While reviewing r204163, I noticed that the MIPS16 test only checked for a .ent
directive and didn't actually check the code emitted. Fixed this and added a
check for llvm.bswap.i32 on MIPS64 at the same time.

llvm-svn: 205177
2014-03-31 11:00:04 +00:00
Tim Northover
8d0c0b6850 ARM64: fix a couple of signed/unsigned comparison warnings.
llvm-svn: 205174
2014-03-31 10:21:36 +00:00
Daniel Sanders
9a1bf52b88 [yaml2obj] Add support for ELF e_flags.
Summary:
The FileHeader mapping now accepts an optional Flags sequence that accepts
the EF_<arch>_<flag> constants. When not given, Flags defaults to zero.

Reviewers: atanasyan

Reviewed By: atanasyan

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D3213

llvm-svn: 205173
2014-03-31 09:44:05 +00:00
Alexey Samsonov
fd7b45ab3e Try to fix MSan bootstrap bot: make ARM64Disassembler::getInstruction() always initialize Size argument.
llvm-svn: 205171
2014-03-31 07:59:33 +00:00
Yaron Keren
c87d06f1b7 Correct OS conditionals following r204977 and r204978.
Previously, MinGW OS was Triple::MinGW and Cygwin was Triple::Cygwin
and now it is Triple::Win32 with Environment being GNU or Cygwin.
So,

  TheTriple.getOS() == Triple::Win32 
  
is replaced by

  TheTriple.isWindowsMSVCEnvironment()

and

  (TheTriple.getOS() == Triple::MinGW32 || TheTriple.getOS() == Triple::Cygwin)
  
is replaced by

  TheTriple.isOSCygMing()

llvm-svn: 205170
2014-03-31 07:59:14 +00:00
Craig Topper
5cb50d052d [C++11] Mark more classes in the X86 target as 'final'.
llvm-svn: 205166
2014-03-31 06:53:13 +00:00
Craig Topper
cad9e27028 Mark a couple of the X86 target classes as final. Allows the compiler to de-virtualize some internal calls.
llvm-svn: 205165
2014-03-31 06:22:15 +00:00
NAKAMURA Takumi
9ec6d57e94 ARM64CollectLOH.cpp: Tweak \param. [-Wdocumentation]
llvm-svn: 205162
2014-03-31 01:10:26 +00:00
Chandler Carruth
033870861c [ARM64] Fix materialization of an fp128 zero immediate. There currently
is not a pattern to lower this with clever instructions that zero the
register, so restrict the zero immediate legality special case to f64
and f32 (the only two sizes which fmov seems to directly support). Fixes
backend errors when building code such as libxml.

llvm-svn: 205161
2014-03-31 00:02:10 +00:00
Adam Nemet
de2e9c69f3 [X86] Adjust cost of FP_TO_UINT v8f32->v8i32
There is no direct AVX instruction to convert to unsigned.  I have some ideas
how we may be able to do this with three vector instructions but the current
backend just bails on this to get it scalarized.

See the comment why we need to adjust the cost returned by BasicTTI.

The test is a bit roundabout (and checks assembly rather than bit code) because
I'd like it to work even if at some point we could vectorize this conversion.

Fixes <rdar://problem/16371920>

llvm-svn: 205159
2014-03-30 18:07:13 +00:00
Stepan Dyatkovskiy
65d1d46cc9 PR18929:
According to ARM assembler language hash symbol is optional before immediates.
For example, see here for more details:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0473j/dom1359731154529.html

llvm-svn: 205157
2014-03-30 17:09:54 +00:00
Hal Finkel
fd9ad7080e Make use of previously generated stores in SelectionDAGLegalize::ExpandExtractFromVectorThroughStack
When expanding EXTRACT_VECTOR_ELT and EXTRACT_SUBVECTOR using
SelectionDAGLegalize::ExpandExtractFromVectorThroughStack, we store the entire
vector and then load the piece we want. This is fine in isolation, but
generating a new store (and corresponding stack slot) for each extraction ends
up producing code of poor quality. When we scalarize a vector operation (using
SelectionDAG::UnrollVectorOp for example) we generate one EXTRACT_VECTOR_ELT
for each element in the vector. This used to generate one stored copy of the
vector for each element in the vector. Now we search the uses of the vector for
a suitable store before generating a new one, which results in much more
efficient scalarization code.

llvm-svn: 205153
2014-03-30 15:10:18 +00:00
NAKAMURA Takumi
d543658edf llvm/test/MC/ELF/nocompression.s: Loosen an expression to match "llvm-mc.EXE".
llvm-svn: 205148
2014-03-30 14:04:00 +00:00
Hal Finkel
d7201e5971 [PowerPC] Handle VSX v2i64 SIGN_EXTEND_INREG
sitofp from v2i32 to v2f64 ends up generating a SIGN_EXTEND_INREG v2i64 node
(and similarly for v2i16 and v2i8). Even though there are no sign-extension (or
algebraic shifts) for v2i64 types, we can handle v2i32 sign extensions by
converting two and from v2i64. The small trick necessary here is to shift the
i32 elements into the right lanes before the i32 -> f64 step. This is because
of the big Endian nature of the system, we need the i32 portion in the high
word of the i64 elements.

For v2i16 and v2i8 we can do the same, but we first use the default Altivec
shift-based expansion from v2i16 or v2i8 to v2i32 (by casting to v4i32) and
then apply the above procedure.

llvm-svn: 205146
2014-03-30 13:22:59 +00:00
Chandler Carruth
a46b65cb1f [Allocator] Lift the slab size and size threshold into template
parameters rather than runtime parameters.

There is only one user of these parameters and they are compile time for
that user. Making these compile time seems to better reflect their
intended usage as well.

llvm-svn: 205143
2014-03-30 12:07:07 +00:00
Chandler Carruth
412ffb7e6f [Allocator] Simplify unittests by using the default size parameters in
more places.

llvm-svn: 205141
2014-03-30 11:36:32 +00:00
Chandler Carruth
d37eb83879 [Allocator] Stop forward-declaring BumpPtrAllocator in a few places.
This is a necessary step to lifting some of its configuration into
template parameters rather than runtime parameters.

llvm-svn: 205140
2014-03-30 11:36:29 +00:00
Chandler Carruth
d14cbcc2fb Don't mark the declarations of the TSan annotation functions as weak.
That causes references to them to be weak references which can collapse
to null if no definition is provided. We call these functions
unconditionally, so a definition *must* be provided. Make the
definitions provided in the .cpp file weak by re-declaring them as weak
just prior to defining them. This should keep compilers which cannot
attach the weak attribute to the definition happy while actually
resolving the symbols correctly during the link.

You might ask yourself upon reading this commit log: how did *any* of
this work before? Well, fun story. It turns out we have some code in
Support (BumpPtrAllocator) which both uses virtual dispatch and has
out-of-line vtables used by that virtual dispatch. If you move the
virtual dispatch into its header in *just* the right way, the optimizer
gets to devirtualize, and remove all references to the vtable. Then the
sad part: the references to this one vtable were the only strong symbol
uses in the support library for llvm-tblgen AFAICT. At least, after
doing something just like this, these symbols stopped getting their weak
definition and random calls to them would segfault instead.

Yay software.

llvm-svn: 205137
2014-03-30 11:20:25 +00:00
Chandler Carruth
df30ec68b3 [ARM64] Fix a heap-use-after-free spotted by ASan.
StringRef::lower() returns a std::string. Better yet, we can now stop
thinking about what it returns and write 'auto'. It does the right
thing. =]

llvm-svn: 205135
2014-03-30 09:08:07 +00:00
Tim Northover
27606885ae ARM64: uncopy/paste helper function
It was doing functional but highly suspect operations on bools due to
the more limited shifting operands supported by memory instructions.

Should fix some MSVC warnings.

llvm-svn: 205134
2014-03-30 08:30:28 +00:00
Tim Northover
f0dffde849 ARM64: remove unused variables
llvm-svn: 205133
2014-03-30 07:35:48 +00:00
Tim Northover
15a133dcd6 ARM64: remove -m32/-m64 mapping with ARM.
This is causing the ARM build-bots to fail since they only include
the ARM backend and can't create an ARM64 target.

llvm-svn: 205132
2014-03-30 07:25:23 +00:00
Tim Northover
b62d7cbb5e ARM64: override all the things.
Actually, mostly only those in the top-level directory that already
had a "virtual" attached. But it's the thought that counts and it's
been a long day.

llvm-svn: 205131
2014-03-30 07:25:18 +00:00
Saleem Abdulrasool
e7827c151a Support: correct Windows normalisation
If the environment is unknown and no object file is provided, then assume an
"MSVC" environment, otherwise, set the environment to the object file format.

In the case that we have a known environment but a non-native file format for
Windows (COFF) which is used for MCJIT, then append the custom file format to
the triple as an additional component.

This fixes the MCJIT tests on Windows.

llvm-svn: 205130
2014-03-30 07:19:31 +00:00
NAKAMURA Takumi
735b5fcf3b Suppress llvm/test/CodeGen/ARM64 for targeting pecoff. ARM64 is unaware of that.
FIXME: Could we support them?
llvm-svn: 205126
2014-03-30 05:01:17 +00:00
NAKAMURA Takumi
28956d42b5 llvm/test/Transforms/LoopStrengthReduce/ARM64/lsr-*.ll: Add explicit triple arm64-unknown for targeting pecoff.
llvm-svn: 205125
2014-03-30 05:01:04 +00:00
NAKAMURA Takumi
81cbcfd543 X86Subtarget.h: isTargetWindows() should tell whether he is targeting msvc.
FYI, !isWindowsGNUEnvironment() is insufficient. It missed cygwin.

FIXME: The name "isTargetWindows" should be fixed.
llvm-svn: 205124
2014-03-30 04:35:00 +00:00
Lang Hames
2e92c81970 [MC] Remove an unused (and broken) variant of the setupForSymbolicDisassembly
method in MCDisassembler.

llvm-svn: 205123
2014-03-30 04:27:33 +00:00
Lang Hames
5783095348 [PBQP] Move invalid graph nodeId/edgeId methods into base class.
llvm-svn: 205122
2014-03-30 03:47:00 +00:00
Rafael Espindola
18c992ab85 Add a missing break.
Patch by Tobias Güntner.

I tried to write a test, but the only difference is the Changed value that
gets returned. It can be tested with "opt -debug-pass=Executions -functionattrs,
but that doesn't seem worth it.

llvm-svn: 205121
2014-03-30 03:26:17 +00:00
Saleem Abdulrasool
960aa13461 Support: normalize the default triple on Unix
This will fix cross-compiling buildbots (e.g. cygwin).  This is in the same vein
as SVN r205070.  Apply this to fix the cross-compiling scenario, even though the
preferred solution is to update the build system to normalize the embedded
triple rather than perform this at runtime every time.  This is meant to tide us
over until that approach is fleshed out and applied.

llvm-svn: 205120
2014-03-30 03:22:37 +00:00
Rafael Espindola
1dc08ab053 Remove dead declarations.
Patch by Tobias Güntner.

llvm-svn: 205119
2014-03-30 02:33:01 +00:00
Benjamin Kramer
a8b67d7c4e Remove outdated comment.
llvm-svn: 205117
2014-03-29 20:16:23 +00:00
Dmitri Gribenko
98f86352d1 Fix a few -Wdocumentation warnings
llvm-svn: 205116
2014-03-29 19:40:32 +00:00
Benjamin Kramer
d93b192769 Detemplatize LOHDirective.
The ARM64 backend uses it only as a container to keep an MCLOHType and
Arguments around so give it its own little copy. The other functionality
isn't used and we had a crazy method specialization hack in place to
keep it working. Unfortunately that was incompatible with MSVC.

Also range-ify a couple of loops while at it.

llvm-svn: 205114
2014-03-29 19:21:20 +00:00
Benjamin Kramer
7263b8300e ARM64: Remove unused helper function, make others static.
llvm-svn: 205112
2014-03-29 18:00:49 +00:00
Benjamin Kramer
01905c7640 tblgen: Twinify PrintFatalError.
No functionality change.

llvm-svn: 205110
2014-03-29 17:17:15 +00:00
Tim Northover
5ea8175a7d TableGen: don't save a StringRef to a local std::string.
This caused a failure in some Windows builds.

llvm-svn: 205109
2014-03-29 16:59:27 +00:00
Benjamin Kramer
d28ce2f31e Avoid storing Twines.
While there nested ifs into a helper function. No functionality change.

llvm-svn: 205108
2014-03-29 16:54:29 +00:00
Hal Finkel
92fc087786 [PowerPC] Handle v2i64 comparisons
v2i64 is a legal type under VSX, however we don't have native vector
comparisons. We can handle eq/ne by casting it to an Altivec type, but
everything else must be expanded.

llvm-svn: 205106
2014-03-29 16:04:40 +00:00
Tim Northover
f68729069b ARM64: format register strings without creating a local Twine.
It was causing horrible failures on some build-bots.

llvm-svn: 205105
2014-03-29 15:35:57 +00:00
Logan Chien
89595e832f llvm-mc: Fix build breakage caused by r205050.
When LLVM is not built with zlib, nocompression.s will test
for the error message.  But this test case will cause breakage
because the exit code is non-zero.  This commit fix this issue
by adding "not" to the command.

llvm-svn: 205102
2014-03-29 15:10:22 +00:00
Hal Finkel
bac4772857 [PowerPC] VSX instruction latency corrections
The vector divide and sqrt instructions have high latencies, and the scalar
comparisons are like all of the others. On the P7, permutations take an extra
cycle over purely-simple vector ops.

llvm-svn: 205096
2014-03-29 13:20:31 +00:00
Stepan Dyatkovskiy
3d2354b78a Recommitted fix for PR18931, with extended tests set.
Issue subject: Crash using integrated assembler with immediate arithmetic

Fix description:
Expressions like 'cmp r0, #(l1 - l2) >> 3' could not be evaluated on asm parsing stage,
since it is impossible to resolve labels on this stage. In the end of stage we still have
expression (MCExpr).
Then, when we want to encode it, we expect it to be an immediate, but it still an expression.
Patch introduces a Fixup (MCFixup instance), that is processed after main encoding stage.

llvm-svn: 205094
2014-03-29 13:12:40 +00:00
Tim Northover
cfbe18c101 ARM64: use 64-bit constant even on 32-bit machines
Another existing bot failure so no tests.

llvm-svn: 205093
2014-03-29 11:51:49 +00:00
Tim Northover
e41e9d23ba ARM64: change format specifier to work on 32-bit targets
Existing tests were failing.

llvm-svn: 205092
2014-03-29 11:47:07 +00:00
Chandler Carruth
e47441ef1d [ARM64] Fix 'assert("...")' to be 'assert(0 && "...")'. Otherwise, it is
no assert at all. ;] Some of these should probably be switched to
llvm_unreachable, but I didn't want to perturb the behavior in this
patch.

Found by -Wstring-conversion, which I'll try to turn on in CMake builds
at least as it is finding useful things.

llvm-svn: 205091
2014-03-29 11:07:40 +00:00
Tim Northover
2f13163a84 ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

llvm-svn: 205090
2014-03-29 10:18:08 +00:00