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3698 Commits

Author SHA1 Message Date
Bill Wendling
64cb4dd72d vldm and vstm are mnemonics for vldmia and vstmia resp. 
llvm-svn: 119321
 2010-11-16 02:00:24 +00:00
Bill Wendling
b450d320ec Encode the multi-load/store instructions with their respective modes ('ia', 
'db', 'ib', 'da') instead of having that mode as a separate field in the
instruction. It's more convenient for the asm parser and much more readable for
humans.
<rdar://problem/8654088>

llvm-svn: 119310
 2010-11-16 01:16:36 +00:00
Owen Anderson
686fae59e6 Add Thumb2 encodings for mov and friends. 
llvm-svn: 119295
 2010-11-16 00:29:56 +00:00
Owen Anderson
3d47a3536c Attempt to provide encodings for some miscellaneous Thumb2 encodings. 
llvm-svn: 119187
 2010-11-15 21:30:39 +00:00
Evan Cheng
4afa3a6b1f Code clean up. The peephole pass should be the one updating the instruction 
iterator, not TII->OptimizeCompareInstr.

llvm-svn: 119186
 2010-11-15 21:20:45 +00:00
Owen Anderson
db1a4541c2 Provide Thumb2 encodings for sxtb and friends. 
llvm-svn: 119185
 2010-11-15 21:12:05 +00:00
Eric Christopher
22b01f0d76 Recommit this change and remove the failing part of the test - it didn't 
pass in the first place and was masked by earlier failures not warning
and aborting the block.

llvm-svn: 119184
 2010-11-15 21:11:06 +00:00
Jim Grosbach
7aabb8c5ee ARM LDR_PRE/LDR_POST/STR_PRE/STR_POST (and the *B counterparts) binary encoding. 
llvm-svn: 119180
 2010-11-15 20:47:07 +00:00
Owen Anderson
0bb2efeb7d Add Thumb2 encodings for comparison and shift operators. 
llvm-svn: 119176
 2010-11-15 19:58:36 +00:00
Owen Anderson
5ae5db8931 Add correct Thumb2 encodings for mvn and friends. 
llvm-svn: 119170
 2010-11-15 18:45:17 +00:00
Jim Grosbach
e0122f5d54 Add FIXMEs. 
llvm-svn: 119167
 2010-11-15 18:36:48 +00:00
Jim Grosbach
a7676f5079 Nuke redundant encoding bit set. 
llvm-svn: 119164
 2010-11-15 18:17:24 +00:00
Chris Lattner
b2daeac125 add fields to the .td files unconditionally, simplifying tblgen a bit. 
Switch the ARM backend to use 'let' instead of 'set' with this change.

llvm-svn: 119120
 2010-11-15 05:19:05 +00:00
Evan Cheng
73e79b8a9c Make sure ARM multi load / store pass copies memoperands when forming ldrd / strd. pr8113. 
llvm-svn: 119109
 2010-11-15 03:30:30 +00:00
Chris Lattner
11e50c531a silence a ton of warnings from clang. 
llvm-svn: 119102
 2010-11-15 01:45:44 +00:00
Anton Korobeynikov
794259aec0 Attempt to unbreak cmake-based builds 
llvm-svn: 119098
 2010-11-15 00:48:12 +00:00
Anton Korobeynikov
76c52dcf44 First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place 
llvm-svn: 119097
 2010-11-15 00:06:54 +00:00
Chris Lattner
3bf85b2f4b trim #includes. 
llvm-svn: 119075
 2010-11-14 21:16:04 +00:00
Chris Lattner
3a01d37b66 rename LowerToMCInst -> LowerARMMachineInstrToMCInst. 
llvm-svn: 119071
 2010-11-14 21:00:02 +00:00
Chris Lattner
4dac1b2742 even more simplifications. ARM MCInstLowering is now just 
a single function instead of a class.  It doesn't need the
complexity that X86 does.

llvm-svn: 119070
 2010-11-14 20:58:38 +00:00
Chris Lattner
3ebf1f315e more shrinkification 
llvm-svn: 119068
 2010-11-14 20:41:53 +00:00
Chris Lattner
758bc06aff more simplifications. 
llvm-svn: 119067
 2010-11-14 20:40:08 +00:00
Chris Lattner
2393da7c40 simplify and tidy up 
llvm-svn: 119066
 2010-11-14 20:31:06 +00:00
Chris Lattner
d045c38bf6 stub out a powerpc MCInstPrinter implementation. 
llvm-svn: 119059
 2010-11-14 19:40:38 +00:00
Owen Anderson
ad4f83df6a Second attempt at providing correct encodings for Thumb2 binary operators. 
llvm-svn: 119029
 2010-11-14 05:37:38 +00:00
Bill Wendling
49dd03e223 Comment out the defms until they're activated. 
llvm-svn: 119000
 2010-11-13 11:20:05 +00:00
Bill Wendling
fadcb3cded Add uses of the *_ldst_multi multiclasses. These aren't used yet. 
llvm-svn: 118999
 2010-11-13 10:57:02 +00:00
Bill Wendling
184bc1368d Convert the modes to lower case. 
llvm-svn: 118998
 2010-11-13 10:43:34 +00:00
Bill Wendling
0a55425158 Minor cleanups: 
- Get the opcode once.
- Add a ParserMatchClass to reglist.

llvm-svn: 118997
 2010-11-13 10:40:19 +00:00
Bill Wendling
aa9ca6fcca Add *_ldst_mult multiclasses to the ARM back-end. These will be used in the 
future to separate out the ia, ib, da, db variants of the load/store multiple
instructions.

llvm-svn: 118995
 2010-11-13 09:09:38 +00:00
Daniel Dunbar
2ba9f79194 MC: Simplify Mach-O and ELF object writer implementations. 
- What was I thinking?????

llvm-svn: 118992
 2010-11-13 07:33:40 +00:00
Evan Cheng
239d9b439d Conditional moves are slightly more expensive than moves. 
llvm-svn: 118985
 2010-11-13 05:14:20 +00:00
Evan Cheng
a7d3c3d387 Add conditional move of large immediate. 
llvm-svn: 118968
 2010-11-13 02:25:14 +00:00
Jim Grosbach
cab8b12f7a Swap multiclass operand order for consistency with other patterns. 
llvm-svn: 118965
 2010-11-13 01:28:30 +00:00
Jim Grosbach
c8b3147ca5 Continue ARM indexed load refactoring. Multiclass for LDR{B} pre/post indexed 
instructions.

llvm-svn: 118963
 2010-11-13 01:07:20 +00:00
Jim Grosbach
03eb1993ea More ARM load/store indexed refactoring. Also fix an incorrect IndexMode 
flag for the LDRT/STRT family instructions as a side effect.

llvm-svn: 118955
 2010-11-13 00:35:48 +00:00
Evan Cheng
a08372d4b4 Fix an obvious typo which inverted an immediate. 
llvm-svn: 118951
 2010-11-13 00:27:47 +00:00
Eric Christopher
f6c7694c29 Temporarily revert this. 
llvm-svn: 118946
 2010-11-12 23:50:48 +00:00
Evan Cheng
1f5296d832 For pre-v6t2 targets, only select MOVi32imm if the immediate can be handled with movi + orr. 
llvm-svn: 118945
 2010-11-12 23:46:13 +00:00
Owen Anderson
053d9fb9b5 Revert r118939 while I work out why it broke some buildbots. 
llvm-svn: 118942
 2010-11-12 23:36:03 +00:00
Owen Anderson
f8192cf0cc Attemt to provide correct encodings for Thumb2 binary operators. 
llvm-svn: 118939
 2010-11-12 23:18:11 +00:00
Evan Cheng
f3c75f91e9 Eliminate ARM::MOVi2pieces. Just use MOVi32imm and expand it to either movi+orr or movw+movt depending on the subtarget. 
llvm-svn: 118938
 2010-11-12 23:03:38 +00:00
Eric Christopher
b8ee838424 Make this happen for ARM like x86. Don't entirely bail out when 
an address is in a different block, get it into a register and go
from there.

llvm-svn: 118936
 2010-11-12 22:52:32 +00:00
Evan Cheng
19f018a1be Add conditional mvn instructions. 
llvm-svn: 118935
 2010-11-12 22:42:47 +00:00
Jim Grosbach
e0ba69b81d Zap a copy/paste-o bit of dead code. 
llvm-svn: 118926
 2010-11-12 21:29:10 +00:00
Jim Grosbach
eaaf8294a5 Refactor to parameterize some ARM load/store encoding patterns. Preparatory 
to splitting the load/store pre/post indexed instructions into [r, r] and
[r, imm] forms.

llvm-svn: 118925
 2010-11-12 21:28:15 +00:00
Owen Anderson
f1ffc8fdc9 First stab at providing correct Thumb2 encodings, start with adc. 
llvm-svn: 118924
 2010-11-12 21:12:40 +00:00
Evan Cheng
b565d1acf9 Add some missing isel predicates on def : pat patterns to avoid generating VFP vmla / vmls (they cause stalls). Disabling them in isel is properly not a right solution, I'll look into a proper solution next. 
llvm-svn: 118922
 2010-11-12 20:32:20 +00:00
Jim Grosbach
160cc37f73 Kill more unused stuff. 
llvm-svn: 118921
 2010-11-12 19:27:45 +00:00
Jim Grosbach
8bb507dd6b Remove unused class. 
llvm-svn: 118919
 2010-11-12 19:24:53 +00:00